From: John Crispin Date: Mon, 17 Aug 2015 06:15:34 +0000 (+0000) Subject: ramips: Fix uart2/uart3 pinmux order on MT7621 X-Git-Url: http://git.lede-project.org./?a=commitdiff_plain;h=9ed654e389efe969785f7b0e4c40c9c63fed9bbe;p=openwrt%2Fstaging%2Fdangole.git ramips: Fix uart2/uart3 pinmux order on MT7621 The uart3 setting in GPIO_MODE register is before the uart2 setting. Also don't mix uart2 and uart3 function/groups. Signed-off-by: Sven Eckelmann SVN-Revision: 46643 --- diff --git a/target/linux/ramips/patches-3.18/0012-MIPS-ralink-add-MT7621-support.patch b/target/linux/ramips/patches-3.18/0012-MIPS-ralink-add-MT7621-support.patch index 771de12f17..f08ecb0326 100644 --- a/target/linux/ramips/patches-3.18/0012-MIPS-ralink-add-MT7621-support.patch +++ b/target/linux/ramips/patches-3.18/0012-MIPS-ralink-add-MT7621-support.patch @@ -555,8 +555,8 @@ Signed-off-by: John Crispin + +#define MT7621_GPIO_MODE_UART1 1 +#define MT7621_GPIO_MODE_I2C 2 -+#define MT7621_GPIO_MODE_UART2 3 -+#define MT7621_GPIO_MODE_UART3 5 ++#define MT7621_GPIO_MODE_UART3 3 ++#define MT7621_GPIO_MODE_UART2 5 +#define MT7621_GPIO_MODE_JTAG 7 +#define MT7621_GPIO_MODE_WDT_MASK 0x3 +#define MT7621_GPIO_MODE_WDT_SHIFT 8 @@ -604,8 +604,8 @@ Signed-off-by: John Crispin +static struct rt2880_pmx_group mt7621_pinmux_data[] = { + GRP("uart1", uart1_grp, 1, MT7621_GPIO_MODE_UART1), + GRP("i2c", i2c_grp, 1, MT7621_GPIO_MODE_I2C), -+ GRP("uart3", uart2_grp, 1, MT7621_GPIO_MODE_UART2), -+ GRP("uart2", uart3_grp, 1, MT7621_GPIO_MODE_UART3), ++ GRP("uart3", uart3_grp, 1, MT7621_GPIO_MODE_UART3), ++ GRP("uart2", uart2_grp, 1, MT7621_GPIO_MODE_UART2), + GRP("jtag", jtag_grp, 1, MT7621_GPIO_MODE_JTAG), + GRP_G("wdt", wdt_grp, MT7621_GPIO_MODE_WDT_MASK, + MT7621_GPIO_MODE_WDT_GPIO, MT7621_GPIO_MODE_WDT_SHIFT),