From: Vladimir Oltean Date: Sun, 18 Aug 2019 18:01:05 +0000 (+0300) Subject: spi: spi-fsl-dspi: Demistify magic value in SPI_SR_CLEAR X-Git-Url: http://git.lede-project.org./?a=commitdiff_plain;h=9e6f784e66cb865de25a1f5fd1706a45d9e298a7;p=openwrt%2Fstaging%2Fblogic.git spi: spi-fsl-dspi: Demistify magic value in SPI_SR_CLEAR This patch adds the field definitions for the SPI_SR register. The SPI status register is write-1-to-clear and this value is written at init time. Signed-off-by: Vladimir Oltean Link: https://lore.kernel.org/r/20190818180115.31114-5-olteanv@gmail.com Signed-off-by: Mark Brown --- diff --git a/drivers/spi/spi-fsl-dspi.c b/drivers/spi/spi-fsl-dspi.c index 179a9818619f..923ee414d1ae 100644 --- a/drivers/spi/spi-fsl-dspi.c +++ b/drivers/spi/spi-fsl-dspi.c @@ -57,7 +57,19 @@ #define SPI_SR 0x2c #define SPI_SR_TCFQF BIT(31) #define SPI_SR_EOQF BIT(28) -#define SPI_SR_CLEAR 0x9aaf0000 +#define SPI_SR_TFUF BIT(27) +#define SPI_SR_TFFF BIT(25) +#define SPI_SR_CMDTCF BIT(23) +#define SPI_SR_SPEF BIT(21) +#define SPI_SR_RFOF BIT(19) +#define SPI_SR_TFIWF BIT(18) +#define SPI_SR_RFDF BIT(17) +#define SPI_SR_CMDFFF BIT(16) +#define SPI_SR_CLEAR (SPI_SR_TCFQF | SPI_SR_EOQF | \ + SPI_SR_TFUF | SPI_SR_TFFF | \ + SPI_SR_CMDTCF | SPI_SR_SPEF | \ + SPI_SR_RFOF | SPI_SR_TFIWF | \ + SPI_SR_RFDF | SPI_SR_CMDFFF) #define SPI_RSER_TFFFE BIT(25) #define SPI_RSER_TFFFD BIT(24)