From: Daniel Cotey <puff65537@bansheeslibrary.com>
Date: Sat, 15 Sep 2012 13:05:51 +0000 (-0700)
Subject: Staging: silicom: bp_mod.h: checkpatch tab and space cleanup
X-Git-Url: http://git.lede-project.org./?a=commitdiff_plain;h=97ef0a461ba82cb641ae53314997ce44161b749a;p=openwrt%2Fstaging%2Fblogic.git

Staging: silicom: bp_mod.h: checkpatch tab and space cleanup

tenth chunk of bp_mod.h's cleanup

Signed-off-by: Daniel Cotey <puff65537@bansheeslibrary.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---

diff --git a/drivers/staging/silicom/bp_mod.h b/drivers/staging/silicom/bp_mod.h
index 3a97b2d483e9..2862c5790c28 100644
--- a/drivers/staging/silicom/bp_mod.h
+++ b/drivers/staging/silicom/bp_mod.h
@@ -445,22 +445,22 @@ static inline unsigned int jiffies_to_msecs(const unsigned long j)
 	 (pid == SILICOM_PE2G4BPFi35ZX_SSID))
 
 #define PEGF80_IF_SERIES(pid) \
-((pid==SILICOM_PE2G4BPFi80_SSID)|| \
-(pid==SILICOM_PE2G4BPFi80LX_SSID)|| \
-(pid==SILICOM_PE2G4BPFi80ZX_SSID)|| \
-(pid==SILICOM_PE2G4BPFi80ZX_SSID)|| \
-(pid==SILICOM_M1E2G4BPFi80_SSID)|| \
-(pid==SILICOM_M1E2G4BPFi80LX_SSID)|| \
-(pid==SILICOM_M1E2G4BPFi80ZX_SSID)|| \
-(pid==SILICOM_PE2G2BPFi80_SSID)|| \
-(pid==SILICOM_PE2G2BPFi80LX_SSID)|| \
-(pid==SILICOM_PE2G2BPFi80ZX_SSID)|| \
-(pid==SILICOM_PE2G2BPFi35_SSID)|| \
-(pid==SILICOM_PE2G2BPFi35LX_SSID)|| \
-(pid==SILICOM_PE2G2BPFi35ZX_SSID)|| \
-(pid==SILICOM_PE2G4BPFi35_SSID)|| \
-(pid==SILICOM_PE2G4BPFi35LX_SSID)|| \
-(pid==SILICOM_PE2G4BPFi35ZX_SSID))
+	((pid == SILICOM_PE2G4BPFi80_SSID) || \
+	 (pid == SILICOM_PE2G4BPFi80LX_SSID) || \
+	 (pid == SILICOM_PE2G4BPFi80ZX_SSID) || \
+	 (pid == SILICOM_PE2G4BPFi80ZX_SSID) || \
+	 (pid == SILICOM_M1E2G4BPFi80_SSID) || \
+	 (pid == SILICOM_M1E2G4BPFi80LX_SSID) || \
+	 (pid == SILICOM_M1E2G4BPFi80ZX_SSID) || \
+	 (pid == SILICOM_PE2G2BPFi80_SSID) || \
+	 (pid == SILICOM_PE2G2BPFi80LX_SSID) || \
+	 (pid == SILICOM_PE2G2BPFi80ZX_SSID) || \
+	 (pid == SILICOM_PE2G2BPFi35_SSID) || \
+	 (pid == SILICOM_PE2G2BPFi35LX_SSID) || \
+	 (pid == SILICOM_PE2G2BPFi35ZX_SSID) || \
+	 (pid == SILICOM_PE2G4BPFi35_SSID) || \
+	 (pid == SILICOM_PE2G4BPFi35LX_SSID) || \
+	 (pid == SILICOM_PE2G4BPFi35ZX_SSID))
 
 #define BP10G9_IF_SERIES(pid) \
 ((pid==INTEL_PE210G2SPI9_SSID)|| \