From: David Bauer <mail@david-bauer.net>
Date: Wed, 14 Apr 2021 21:58:25 +0000 (+0200)
Subject: ath79: fix 10 Mbit PLL data for UniFi AC
X-Git-Url: http://git.lede-project.org./?a=commitdiff_plain;h=956407292dc5fd41f2d8c7cc7e9ec77eb6444c1e;p=openwrt%2Fstaging%2Fstintel.git

ath79: fix 10 Mbit PLL data for UniFi AC

Fix the PLL register value for 10 Mbit/s link modes on the UniFi AC Lite
/ Mesh / LR. Otherwise, 10 Mbit/s links do not transfer data.

Signed-off-by: David Bauer <mail@david-bauer.net>
---

diff --git a/target/linux/ath79/dts/qca9563_ubnt_unifiac-lite.dtsi b/target/linux/ath79/dts/qca9563_ubnt_unifiac-lite.dtsi
index b9a5b55cd6..b41e90abe8 100644
--- a/target/linux/ath79/dts/qca9563_ubnt_unifiac-lite.dtsi
+++ b/target/linux/ath79/dts/qca9563_ubnt_unifiac-lite.dtsi
@@ -24,4 +24,6 @@
 	mtd-mac-address = <&art 0x0>;
 	phy-mode = "sgmii";
 	phy-handle = <&phy4>;
+
+	pll-data = <0x03000000 0x00000101 0x00001313>;
 };