From: John Crispin <john@openwrt.org>
Date: Sun, 30 Mar 2014 09:16:06 +0000 (+0000)
Subject: lantiq: add support for ZyXEL P2812HNUFX
X-Git-Tag: v19.07.0-rc1~18240
X-Git-Url: http://git.lede-project.org./?a=commitdiff_plain;h=9531390aadea49eff8d173c79787670daa97762f;p=openwrt%2Fstaging%2Fhauke.git

lantiq: add support for ZyXEL P2812HNUFX

This patch adds almost full support for this board. WiFi is still not working.
The FXS ports are not functional due to missing support for the TAPI driver on
VR9 SoC.

Signed-off-by: Antonios Vamporakis <ant@area128.com>
Tested-by: Luka Perkov <luka@openwrt.org>

SVN-Revision: 40317
---

diff --git a/target/linux/lantiq/base-files/etc/uci-defaults/02_network b/target/linux/lantiq/base-files/etc/uci-defaults/02_network
index 6e17d4dde2..4903eb92d0 100644
--- a/target/linux/lantiq/base-files/etc/uci-defaults/02_network
+++ b/target/linux/lantiq/base-files/etc/uci-defaults/02_network
@@ -109,6 +109,12 @@ P2601HNFX)
 	ucidef_add_switch "switch0" "1" "1"
 	ucidef_add_switch_vlan "switch0" "1" "1 2 3 4 5t"
 	;;
+	
+P2812HNUFX)
+	ucidef_set_interface_lan 'eth0.1'
+	ucidef_add_switch "switch0" "1" "1"
+	ucidef_add_switch_vlan "switch0" "1" "0 1 2 4 5 6t"
+	;;
 
 TDW8970)
 	lan_mac=$(mtd_get_mac_binary boardconfig 61696)
diff --git a/target/linux/lantiq/dts/P2812HNUFX.dts b/target/linux/lantiq/dts/P2812HNUFX.dts
new file mode 100644
index 0000000000..5af10d49f3
--- /dev/null
+++ b/target/linux/lantiq/dts/P2812HNUFX.dts
@@ -0,0 +1,308 @@
+/dts-v1/;
+
+/include/ "vr9.dtsi"
+
+/ {
+	model = "P2812HNUFX - ZyXEL P-2812HNU-Fx";
+	
+	chosen {
+		/*bootargs = "console=ttyLTQ0,115200 init=/etc/preinit";*/
+	};
+
+	memory@0 {
+		reg = <0x0 0x8000000>;
+	};
+	
+	fpi@10000000 {
+		#address-cells = <1>;
+		#size-cells = <1>;
+		compatible = "lantiq,fpi", "simple-bus";
+		ranges = <0x0 0x10000000 0xEEFFFFF>;
+		reg = <0x10000000 0xEF00000>;
+
+		localbus@0 {
+			#address-cells = <2>;
+			#size-cells = <1>;
+			compatible = "lantiq,localbus", "simple-bus";
+
+			nand-parts@0 {
+				compatible = "gen_nand", "lantiq,nand-xway";
+				lantiq,cs = <1>;
+				bank-width = <2>;
+				reg = <0 0x0 0x2000000>;
+				#address-cells = <1>;
+				#size-cells = <1>;
+
+				partition@0 {
+					label = "u-boot";
+					reg = <0x00000 0x40000>;
+				};
+
+				partition@40000 {
+					label = "u-boot environment";
+					reg = <0x40000 0x20000>;
+				};
+
+				partition@60000 {
+					label = "root";
+					reg = <0x60000 0x7fa0000>;
+				};
+			};
+		};
+
+		gpio: pinmux@E100B10 {
+			compatible = "lantiq,pinctrl-xr9";
+			pinctrl-names = "default";
+			pinctrl-0 = <&state_default>;
+			
+			interrupt-parent = <&icu0>;
+			interrupts = <166 135 66 40 41 42 38>;
+
+			#gpio-cells = <2>;
+			gpio-controller;
+			reg = <0xE100B10 0xA0>;
+
+			state_default: pinmux {
+				mdio {
+					lantiq,groups = "mdio";
+					lantiq,function = "mdio";
+				};
+				gphy-leds {
+					lantiq,groups = "gphy0 led1", "gphy1 led1",
+							"gphy0 led2", "gphy1 led2";
+					lantiq,function = "gphy";
+					lantiq,pull = <2>;
+					lantiq,open-drain = <0>;
+					lantiq,output = <1>;
+				};
+				stp {
+					lantiq,groups = "stp";
+					lantiq,function = "stp";
+					lantiq,pull = <2>;
+					lantiq,open-drain = <0>;
+					lantiq,output = <1>;
+				};
+				pci {
+					lantiq,groups = "gnt1", "req1";
+					lantiq,function = "pci";
+				};
+				pci-rst {
+					lantiq,pins = "io21";
+					lantiq,pull = <0>;
+					lantiq,open-drain = <0>;
+					lantiq,output = <1>;
+				};
+				ifxhcd-rst {
+					lantiq,pins = "io33";
+					lantiq,pull = <0>;
+					lantiq,open-drain = <0>;
+					lantiq,output = <1>;
+				};
+				nand {
+					lantiq,groups = "nand cle", "nand ale",
+							"nand rd", "nand cs1", "nand rdy";
+					lantiq,function = "ebu";
+					lantiq,pull = <1>;
+				};
+			};
+		};
+
+		eth@E108000 {
+			#address-cells = <1>;
+			#size-cells = <0>;
+			compatible = "lantiq,xrx200-net";
+			reg = <	0xE108000 0x3000 /* switch */
+				0xE10B100 0x70 /* mdio */
+				0xE10B1D8 0x30 /* mii */
+				0xE10B308 0x30 /* pmac */
+			>;
+			interrupt-parent = <&icu0>;
+			interrupts = <73 72>;
+
+			lan: interface@0 {
+				compatible = "lantiq,xrx200-pdi";
+				#address-cells = <1>;
+				#size-cells = <0>;
+				reg = <0>;
+				mac-address = [ 00 11 22 33 44 55 ];
+				lantiq,switch;
+
+				ethernet@0 {
+					compatible = "lantiq,xrx200-pdi-port";
+					reg = <0>;
+					phy-mode = "rgmii";
+					phy-handle = <&phy0>;
+				};
+				ethernet@1 {
+					compatible = "lantiq,xrx200-pdi-port";
+					reg = <1>;
+					phy-mode = "rgmii";
+					phy-handle = <&phy1>;
+				};
+				ethernet@2 {
+					compatible = "lantiq,xrx200-pdi-port";
+					reg = <2>;
+					phy-mode = "gmii";
+					phy-handle = <&phy11>;
+				};
+				ethernet@4 {
+					compatible = "lantiq,xrx200-pdi-port";
+					reg = <4>;
+					phy-mode = "gmii";
+					phy-handle = <&phy13>;
+				};
+				ethernet@5 {
+					compatible = "lantiq,xrx200-pdi-port";
+					reg = <5>;
+					phy-mode = "rgmii";
+					phy-handle = <&phy5>;
+				};
+			};
+
+			mdio@0 {
+				#address-cells = <1>;
+				#size-cells = <0>;
+				compatible = "lantiq,xrx200-mdio";
+				phy0: ethernet-phy@0 {
+					reg = <0x0>;
+					compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
+				};
+				phy1: ethernet-phy@1 {
+					reg = <0x1>;
+					compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
+				};
+				phy5: ethernet-phy@5 {
+					reg = <0x5>;
+					compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
+				};
+				phy11: ethernet-phy@11 {
+					reg = <0x11>;
+					compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
+				};
+				phy13: ethernet-phy@13 {
+					reg = <0x13>;
+					compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
+				};
+			};
+		};
+
+		stp: stp@E100BB0 {
+			compatible = "lantiq,gpio-stp-xway";
+			reg = <0xE100BB0 0x40>;
+			#gpio-cells = <2>;
+			gpio-controller;
+
+			lantiq,shadow = <0xffffff>;
+			lantiq,groups = <0x7>;
+			/*
+			lantiq,dsl = <0x3>;
+			lantiq,phy1 = <0x7>;
+			lantiq,phy2 = <0x7>;
+			*/
+		};
+
+		ifxhcd@E101000 {
+			status = "okay";
+			gpios = <&gpio 33 0>;
+			lantiq,portmask = <0x3>;
+		};
+
+		pci@E105400 {
+			lantiq,bus-clock = <33333333>;
+			/* lantiq,external-clock; */
+			lantiq,delay-hi = <0>; /* 0ns delay */
+			lantiq,delay-lo = <0>; /* 0.0ns delay */
+			interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
+			interrupt-map = <
+				0x7000 0 0 1 &icu0 29 //1 // slot 14, irq 29
+				>;
+			gpio-reset = <&gpio 21 0>;
+			req-mask = <0x1>;	/* GNT1 */
+			status = "okay";
+		};
+	};
+
+	gphy-xrx200 {
+		compatible = "lantiq,phy-xrx200";
+		firmware = "lantiq/vr9_phy11g_a1x.bin";
+		phys = [ 00 01 ];
+	};
+
+	gpio-keys-polled {
+		compatible = "gpio-keys-polled";
+		#address-cells = <1>;
+		#size-cells = <0>;
+		poll-interval = <100>;
+		reset {
+			label = "reset";
+			gpios = <&gpio 39 1>;
+			linux,code = <0x198>;
+		};
+		rfkill {
+			label = "rfkill";
+			gpios = <&gpio 1 1>;
+			linux,code = <0xf7>;
+		};
+	};
+
+	gpio-leds {
+		compatible = "gpio-leds";
+
+		internet2 {
+			label = "internet2";
+			gpios = <&stp 16 1>;
+		};
+		internet {
+			label = "internet";
+			gpios = <&stp 17 1>;
+		};
+		dsl {
+			label = "dsl";
+			gpios = <&stp 18 1>;
+		};
+		dsl2 {
+			label = "dsl2";
+			gpios = <&stp 19 1>;
+		};
+		wifi2 {
+			label = "wifi2";
+			gpios = <&stp 20 1>;
+		};
+		wlan {
+			label = "wifi";
+			gpios = <&stp 21 1>;
+		};
+		power2 {
+			label = "power2";
+			gpios = <&stp 22 1>;
+		};
+		power {
+			label = "power";
+			gpios = <&stp 23 1>;
+		};
+		usb1 {
+			label = "usb";
+			gpios = <&gpio 38 1>;
+		};
+		usb2 {
+			label = "usb2";
+			gpios = <&gpio 44 1>;
+		};
+		phone1 {
+			label = "phone1";
+			gpios = <&gpio 11 1>;
+		};
+		phone1warn {
+			label = "phone1warn";
+			gpios = <&gpio 12 1>;
+		};
+		phone2 {
+			label = "phone2";
+			gpios = <&gpio 28 1>;
+		};
+		phone2warn {
+			label = "phone2warn";
+			gpios = <&gpio 26 1>;
+		};
+	};
+};
diff --git a/target/linux/lantiq/image/Makefile b/target/linux/lantiq/image/Makefile
index 98f82369b1..4550fc4619 100644
--- a/target/linux/lantiq/image/Makefile
+++ b/target/linux/lantiq/image/Makefile
@@ -310,6 +310,10 @@ endif
 ifeq ($(CONFIG_TARGET_lantiq_xrx200),y)
 
 # VR9
+Image/BuildKernel/Profile/P2812HNUFX=$(call Image/BuildKernel/Template,P2812HNUFX)
+Image/InstallKernel/Template/P2812HNUFX=$(call Image/InstallKernel/Template,P2812HNUFX)
+Image/Build/Profile/P2812HNUFX=$(call Image/Build/$(1),$(1),P2812HNUFX)
+
 Image/BuildKernel/Profile/EASY80920NAND=$(call Image/BuildKernel/Template,EASY80920NAND)
 Image/Build/Profile/EASY80920NAND=$(call Image/Build/$(1),$(1),EASY80920NAND)
 
diff --git a/target/linux/lantiq/xrx200/profiles/zyxel.mk b/target/linux/lantiq/xrx200/profiles/zyxel.mk
new file mode 100644
index 0000000000..e758a50360
--- /dev/null
+++ b/target/linux/lantiq/xrx200/profiles/zyxel.mk
@@ -0,0 +1,14 @@
+define Profile/P2812HNUFX
+  NAME:=ZyXEL P-2812HNU-Fx
+  PACKAGES:=kmod-rt2800-pci wpad-mini \
+	kmod-ltq-deu-vr9 kmod-ltq-hcd-vr9 \
+	kmod-ltq-vdsl-vr9-mei kmod-ltq-vdsl-vr9 \
+	kmod-ltq-atm-vr9 ltq-vdsl-vr9-fw-installer \
+	ltq-vdsl-app ppp-mod-pppoa \
+	swconfig
+endef
+
+P2812HNUFX_UBIFS_OPTS:="-m 2048 -e 126KiB -c 4096"
+P2812HNUFX_UBI_OPTS:="-m 2048 -p 128KiB -s 512"
+
+$(eval $(call Profile,P2812HNUFX))