From: Pavel Kubelun Date: Thu, 12 Feb 2015 01:49:08 +0000 (+0800) Subject: net: ar8327: modify some configuration of switch X-Git-Url: http://git.lede-project.org./?a=commitdiff_plain;h=94e4ee5395b437e9ddaec8cdea47c1a4a9ba0c01;p=openwrt%2Fstaging%2F981213.git net: ar8327: modify some configuration of switch Imported from https://source.codeaurora.org/quic/qsdk/system/openwrt/commit/?h=korg/linux-3.4.y/release/arugula_bb_cs&id=2be4f8a8b205ae1a37db44839864451ebe893e6e Signed-off-by: Pavel Kubelun Enable flow control of LAN and WAN ports to get better performance. Setup pvid as 0 for all ports during initialisation to avoid confusion during system or switch INIT. Disable PORT MAC before config MAC to avoid it work abnormal. This change is for IR-054144, IR-057315. Change-Id: I345f3dffa59ad3f97150e09692723da12a7b1067 Signed-off-by: Zou Shunxiang Signed-off-by: xiaofeis --- diff --git a/target/linux/generic/files/drivers/net/phy/ar8216.h b/target/linux/generic/files/drivers/net/phy/ar8216.h index 6a3fd8db01..d9508b9ff8 100644 --- a/target/linux/generic/files/drivers/net/phy/ar8216.h +++ b/target/linux/generic/files/drivers/net/phy/ar8216.h @@ -154,6 +154,7 @@ #define AR8216_PORT_STATUS_LINK_UP BIT(8) #define AR8216_PORT_STATUS_LINK_AUTO BIT(9) #define AR8216_PORT_STATUS_LINK_PAUSE BIT(10) +#define AR8216_PORT_STATUS_FLOW_CONTROL BIT(12) #define AR8216_REG_PORT_CTRL(_i) (AR8216_PORT_OFFSET(_i) + 0x0004) diff --git a/target/linux/generic/files/drivers/net/phy/ar8327.c b/target/linux/generic/files/drivers/net/phy/ar8327.c index d2a5a5b6be..74c80d4452 100644 --- a/target/linux/generic/files/drivers/net/phy/ar8327.c +++ b/target/linux/generic/files/drivers/net/phy/ar8327.c @@ -685,12 +685,20 @@ ar8327_init_port(struct ar8xxx_priv *priv, int port) else t = AR8216_PORT_STATUS_LINK_AUTO; - ar8xxx_write(priv, AR8327_REG_PORT_STATUS(port), t); + if (port != AR8216_PORT_CPU && port != 6) { + /*hw limitation:if configure mac when there is traffic, + port MAC may work abnormal. Need disable lan&wan mac at fisrt*/ + ar8xxx_write(priv, AR8327_REG_PORT_STATUS(port), 0); + msleep(100); + t |= AR8216_PORT_STATUS_FLOW_CONTROL; + ar8xxx_write(priv, AR8327_REG_PORT_STATUS(port), t); + } else { + ar8xxx_write(priv, AR8327_REG_PORT_STATUS(port), t); + } + ar8xxx_write(priv, AR8327_REG_PORT_HEADER(port), 0); - t = 1 << AR8327_PORT_VLAN0_DEF_SVID_S; - t |= 1 << AR8327_PORT_VLAN0_DEF_CVID_S; - ar8xxx_write(priv, AR8327_REG_PORT_VLAN0(port), t); + ar8xxx_write(priv, AR8327_REG_PORT_VLAN0(port), 0); t = AR8327_PORT_VLAN1_OUT_MODE_UNTOUCH << AR8327_PORT_VLAN1_OUT_MODE_S; ar8xxx_write(priv, AR8327_REG_PORT_VLAN1(port), t);