From: Michael Büsch Date: Fri, 2 Jan 2009 00:51:54 +0000 (+0000) Subject: moko: Add 2.6.28 (doesn't boot :( ) X-Git-Tag: reboot~24895 X-Git-Url: http://git.lede-project.org./?a=commitdiff_plain;h=90bbba6996915da312bf2d7c113a6ab91221147a;p=openwrt%2Fstaging%2Fblogic.git moko: Add 2.6.28 (doesn't boot :( ) SVN-Revision: 13801 --- diff --git a/target/linux/s3c24xx/config-2.6.28 b/target/linux/s3c24xx/config-2.6.28 new file mode 100644 index 000000000000..5a51d412c22f --- /dev/null +++ b/target/linux/s3c24xx/config-2.6.28 @@ -0,0 +1,898 @@ +CONFIG_AEABI=y +CONFIG_ALIGNMENT_TRAP=y +CONFIG_ANDROID_BINDER_IPC=y +CONFIG_ANDROID_LOGGER=y +# CONFIG_ANDROID_PARANOID_NETWORK is not set +CONFIG_ANDROID_POWER=y +CONFIG_ANDROID_POWER_ALARM=y +CONFIG_ANDROID_POWER_STAT=y +# CONFIG_ANDROID_RAM_CONSOLE is not set +# CONFIG_ANDROID_TIMED_GPIO is not set +CONFIG_APM_EMULATION=y +CONFIG_APM_POWER=y +CONFIG_AR6000_WLAN=y +# CONFIG_ARCH_AAEC2000 is not set +# CONFIG_ARCH_AT91 is not set +# CONFIG_ARCH_BAST is not set +# CONFIG_ARCH_CLPS711X is not set +# CONFIG_ARCH_CLPS7500 is not set +# CONFIG_ARCH_DAVINCI is not set +# CONFIG_ARCH_EBSA110 is not set +# CONFIG_ARCH_EP93XX is not set +CONFIG_ARCH_FLATMEM_HAS_HOLES=y +# CONFIG_ARCH_FOOTBRIDGE is not set +# CONFIG_ARCH_H1940 is not set +# CONFIG_ARCH_H720X is not set +# CONFIG_ARCH_HAS_ILOG2_U32 is not set +# CONFIG_ARCH_HAS_ILOG2_U64 is not set +# CONFIG_ARCH_IMX is not set +# CONFIG_ARCH_INTEGRATOR is not set +# CONFIG_ARCH_IOP13XX is not set +# CONFIG_ARCH_IOP32X is not set +# CONFIG_ARCH_IOP33X is not set +# CONFIG_ARCH_IXP2000 is not set +# CONFIG_ARCH_IXP23XX is not set +# CONFIG_ARCH_IXP4XX is not set +# CONFIG_ARCH_KIRKWOOD is not set +# CONFIG_ARCH_KS8695 is not set +# CONFIG_ARCH_L7200 is not set +# CONFIG_ARCH_LH7A40X is not set +# CONFIG_ARCH_LOKI is not set +# CONFIG_ARCH_MSM is not set +# CONFIG_ARCH_MV78XX0 is not set +# CONFIG_ARCH_MXC is not set +# CONFIG_ARCH_NETX is not set +# CONFIG_ARCH_NS9XXX is not set +# CONFIG_ARCH_OMAP is not set +# CONFIG_ARCH_ORION5X is not set +# CONFIG_ARCH_PNX4008 is not set +# CONFIG_ARCH_PXA is not set +# CONFIG_ARCH_REALVIEW is not set +CONFIG_ARCH_REQUIRE_GPIOLIB=y +# CONFIG_ARCH_RPC is not set +CONFIG_ARCH_S3C2410=y +CONFIG_ARCH_S3C2440=y +# CONFIG_ARCH_S3C64XX is not set +# CONFIG_ARCH_SA1100 is not set +# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set +# CONFIG_ARCH_SHARK is not set +# CONFIG_ARCH_SMDK2410 is not set +# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set +# CONFIG_ARCH_SUPPORTS_MSI is not set +CONFIG_ARCH_SUSPEND_POSSIBLE=y +# CONFIG_ARCH_VERSATILE is not set +CONFIG_ARM=y +CONFIG_ARM_THUMB=y +# CONFIG_ARPD is not set +CONFIG_ASHMEM=y +CONFIG_ATAGS_PROC=y +# CONFIG_ATM is not set +CONFIG_BACKLIGHT_CLASS_DEVICE=y +CONFIG_BACKLIGHT_CORGI=y +CONFIG_BACKLIGHT_LCD_SUPPORT=y +# CONFIG_BACKLIGHT_PWM is not set +# CONFIG_BACKTRACE_SELF_TEST is not set +CONFIG_BASE_SMALL=0 +CONFIG_BATTERY_BQ27000_HDQ=y +# CONFIG_BATTERY_BQ27x00 is not set +# CONFIG_BATTERY_DS2760 is not set +# CONFIG_BINFMT_AOUT is not set +CONFIG_BITREVERSE=y +CONFIG_BLK_DEV_DM=m +# CONFIG_BLK_DEV_MD is not set +CONFIG_BLK_DEV_RAM=y +CONFIG_BLK_DEV_RAM_COUNT=16 +CONFIG_BLK_DEV_RAM_SIZE=4096 +CONFIG_BLK_DEV_SD=y +CONFIG_BLK_DEV_SR=y +# CONFIG_BLK_DEV_SR_VENDOR is not set +CONFIG_BLK_DEV_UB=m +# CONFIG_BLK_DEV_XIP is not set +# CONFIG_BONDING is not set +CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC=y +CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=1 +# CONFIG_BOOT_PRINTK_DELAY is not set +# CONFIG_BOOT_TRACER is not set +# CONFIG_BRIDGE_EBT_NFLOG is not set +CONFIG_BRIDGE_NETFILTER=y +# CONFIG_BSD_DISKLABEL is not set +# CONFIG_BSD_PROCESS_ACCT is not set +CONFIG_BT=y +CONFIG_BT_BNEP=y +# CONFIG_BT_HCIBCM203X is not set +# CONFIG_BT_HCIBFUSB is not set +# CONFIG_BT_HCIBPA10X is not set +CONFIG_BT_HCIBTUSB=y +# CONFIG_BT_HCIUART is not set +# CONFIG_BT_HCIVHCI is not set +CONFIG_BT_HIDP=y +CONFIG_BT_L2CAP=y +CONFIG_BT_RFCOMM=y +CONFIG_BT_SCO=y +CONFIG_CHARGER_PCF50633=y +CONFIG_CHR_DEV_SG=y +# CONFIG_CIFS_STATS is not set +CONFIG_CLASSIC_RCU=y +CONFIG_CMDLINE="unused -- bootloader passes ATAG list" +CONFIG_COMPAT_BRK=y +CONFIG_CONFIGFS_FS=m +CONFIG_CONNECTOR=m +CONFIG_CONSOLE_TRANSLATIONS=y +CONFIG_CPU_32=y +CONFIG_CPU_32v4T=y +CONFIG_CPU_ABRT_EV4T=y +CONFIG_CPU_ARM920T=y +CONFIG_CPU_CACHE_V4WT=y +CONFIG_CPU_CACHE_VIVT=y +CONFIG_CPU_COPY_V4WB=y +CONFIG_CPU_CP15=y +CONFIG_CPU_CP15_MMU=y +# CONFIG_CPU_DCACHE_WRITETHROUGH is not set +# CONFIG_CPU_ICACHE_DISABLE is not set +CONFIG_CPU_IDLE=y +CONFIG_CPU_IDLE_GOV_LADDER=y +CONFIG_CPU_LLSERIAL_S3C2410=y +CONFIG_CPU_LLSERIAL_S3C2440=y +CONFIG_CPU_PABRT_NOIFAR=y +CONFIG_CPU_S3C2410=y +CONFIG_CPU_S3C2410_DMA=y +CONFIG_CPU_S3C2440=y +CONFIG_CPU_S3C2442=y +CONFIG_CPU_S3C244X=y +CONFIG_CPU_TLB_V4WBI=y +CONFIG_CRAMFS=y +CONFIG_CRC16=y +CONFIG_CRC_CCITT=y +# CONFIG_CRC_ITU_T is not set +CONFIG_CRC_T10DIF=y +CONFIG_CRYPTO_AEAD2=y +CONFIG_CRYPTO_AES=y +CONFIG_CRYPTO_ALGAPI=y +CONFIG_CRYPTO_ALGAPI2=y +CONFIG_CRYPTO_ANSI_CPRNG=y +CONFIG_CRYPTO_ARC4=y +CONFIG_CRYPTO_BLKCIPHER=y +CONFIG_CRYPTO_BLKCIPHER2=y +CONFIG_CRYPTO_CBC=y +CONFIG_CRYPTO_DES=y +CONFIG_CRYPTO_ECB=y +CONFIG_CRYPTO_FCRYPT=m +CONFIG_CRYPTO_FIPS=y +CONFIG_CRYPTO_GF128MUL=m +CONFIG_CRYPTO_HASH=y +CONFIG_CRYPTO_HASH2=y +CONFIG_CRYPTO_HMAC=y +CONFIG_CRYPTO_HW=y +CONFIG_CRYPTO_LRW=m +CONFIG_CRYPTO_MANAGER=y +CONFIG_CRYPTO_MANAGER2=y +CONFIG_CRYPTO_MD5=y +CONFIG_CRYPTO_PCBC=m +CONFIG_CRYPTO_RNG=y +CONFIG_CRYPTO_RNG2=y +CONFIG_CRYPTO_SHA1=y +CONFIG_CRYPTO_XCBC=m +CONFIG_DAB=y +# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set +CONFIG_DEBUG_BUGVERBOSE=y +# CONFIG_DEBUG_DEVRES is not set +# CONFIG_DEBUG_DRIVER is not set +CONFIG_DEBUG_ERRORS=y +CONFIG_DEBUG_GPIO=y +CONFIG_DEBUG_INFO=y +CONFIG_DEBUG_KERNEL=y +# CONFIG_DEBUG_KOBJECT is not set +# CONFIG_DEBUG_LIST is not set +# CONFIG_DEBUG_LL is not set +CONFIG_DEBUG_LOCKDEP=y +# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set +CONFIG_DEBUG_LOCK_ALLOC=y +CONFIG_DEBUG_MEMORY_INIT=y +CONFIG_DEBUG_MUTEXES=y +# CONFIG_DEBUG_OBJECTS is not set +CONFIG_DEBUG_PREEMPT=y +# CONFIG_DEBUG_RT_MUTEXES is not set +CONFIG_DEBUG_S3C_UART=2 +CONFIG_DEBUG_SG=y +CONFIG_DEBUG_SHIRQ=y +# CONFIG_DEBUG_SLAB is not set +CONFIG_DEBUG_SPINLOCK=y +CONFIG_DEBUG_SPINLOCK_SLEEP=y +# CONFIG_DEBUG_STACK_USAGE is not set +# CONFIG_DEBUG_USER is not set +# CONFIG_DEBUG_VM is not set +# CONFIG_DEBUG_WRITECOUNT is not set +CONFIG_DEFAULT_TCP_CONG="cubic" +CONFIG_DETECT_SOFTLOCKUP=y +CONFIG_DISPLAY_JBT6K74=y +CONFIG_DISPLAY_SUPPORT=y +# CONFIG_DM9000 is not set +CONFIG_DMADEVICES=y +CONFIG_DM_CRYPT=m +# CONFIG_DM_DEBUG is not set +# CONFIG_DM_DELAY is not set +# CONFIG_DM_MIRROR is not set +# CONFIG_DM_MULTIPATH is not set +CONFIG_DM_SNAPSHOT=m +# CONFIG_DM_UEVENT is not set +# CONFIG_DM_ZERO is not set +CONFIG_DNOTIFY=y +CONFIG_DUMMY_CONSOLE=y +CONFIG_DYNAMIC_PRINTK_DEBUG=y +# CONFIG_EEPROM_93CX6 is not set +CONFIG_ELF_CORE=y +# CONFIG_EMBEDDED is not set +CONFIG_ENABLE_MUST_CHECK=y +CONFIG_EXPORTFS=y +CONFIG_EXT2_FS=y +CONFIG_EXT3_FS=y +CONFIG_EXT4DEV_COMPAT=y +CONFIG_EXT4_FS=y +# CONFIG_EXT4_FS_POSIX_ACL is not set +CONFIG_EXT4_FS_SECURITY=y +CONFIG_EXT4_FS_XATTR=y +CONFIG_FAT_FS=y +# CONFIG_FAULT_INJECTION is not set +CONFIG_FB=y +# CONFIG_FB_BACKLIGHT is not set +# CONFIG_FB_BOOT_VESA_SUPPORT is not set +CONFIG_FB_CFB_COPYAREA=y +CONFIG_FB_CFB_FILLRECT=y +CONFIG_FB_CFB_IMAGEBLIT=y +# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set +# CONFIG_FB_DDC is not set +# CONFIG_FB_FOREIGN_ENDIAN is not set +# CONFIG_FB_MACMODES is not set +# CONFIG_FB_MB862XX is not set +# CONFIG_FB_METRONOME is not set +# CONFIG_FB_MODE_HELPERS is not set +# CONFIG_FB_S1D13XXX is not set +CONFIG_FB_S3C2410=y +# CONFIG_FB_S3C2410_DEBUG is not set +# CONFIG_FB_SVGALIB is not set +# CONFIG_FB_SYS_COPYAREA is not set +# CONFIG_FB_SYS_FILLRECT is not set +# CONFIG_FB_SYS_FOPS is not set +# CONFIG_FB_SYS_IMAGEBLIT is not set +# CONFIG_FB_TILEBLITTING is not set +# CONFIG_FB_UVESA is not set +# CONFIG_FB_VIRTUAL is not set +CONFIG_FIQ=y +# CONFIG_FIRMWARE_EDID is not set +CONFIG_FONTS=y +# CONFIG_FONT_10x18 is not set +CONFIG_FONT_6x11=y +# CONFIG_FONT_7x14 is not set +# CONFIG_FONT_8x16 is not set +# CONFIG_FONT_8x8 is not set +# CONFIG_FONT_ACORN_8x8 is not set +# CONFIG_FONT_MINI_4x6 is not set +# CONFIG_FONT_PEARL_8x8 is not set +# CONFIG_FONT_SUN12x22 is not set +# CONFIG_FONT_SUN8x16 is not set +# CONFIG_FPE_FASTFPE is not set +CONFIG_FPE_NWFPE=y +# CONFIG_FPE_NWFPE_XP is not set +CONFIG_FRAMEBUFFER_CONSOLE=y +# CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set +# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set +CONFIG_FRAME_POINTER=y +CONFIG_FREEZER=y +CONFIG_FS_MBCACHE=y +CONFIG_FS_POSIX_ACL=y +# CONFIG_FUNCTION_TRACER is not set +CONFIG_FUSE_FS=m +# CONFIG_GENERIC_CLOCKEVENTS is not set +CONFIG_GENERIC_GPIO=y +CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y +# CONFIG_GENERIC_TIME is not set +CONFIG_GPIOLIB=y +# CONFIG_GPIO_MAX7301 is not set +# CONFIG_GPIO_MAX732X is not set +CONFIG_GPIO_SYSFS=y +CONFIG_GTA02_HDQ=y +# CONFIG_HAMRADIO is not set +CONFIG_HARDIRQS_SW_RESEND=y +CONFIG_HAS_DMA=y +CONFIG_HAS_IOMEM=y +CONFIG_HAVE_AOUT=y +CONFIG_HAVE_ARCH_KGDB=y +CONFIG_HAVE_CLK=y +CONFIG_HAVE_FUNCTION_TRACER=y +CONFIG_HAVE_GENERIC_DMA_COHERENT=y +CONFIG_HAVE_IDE=y +CONFIG_HAVE_KPROBES=y +CONFIG_HAVE_KRETPROBES=y +CONFIG_HAVE_LATENCYTOP_SUPPORT=y +CONFIG_HAVE_OPROFILE=y +CONFIG_HAVE_PWM=y +# CONFIG_HFSPLUS_FS is not set +# CONFIG_HFS_FS is not set +CONFIG_HID=y +CONFIG_HID_A4TECH=y +CONFIG_HID_APPLE=y +CONFIG_HID_BELKIN=y +CONFIG_HID_BRIGHT=y +CONFIG_HID_CHERRY=y +CONFIG_HID_CHICONY=y +CONFIG_HID_COMPAT=y +CONFIG_HID_CYPRESS=y +CONFIG_HID_DELL=y +CONFIG_HID_EZKEY=y +CONFIG_HID_GYRATION=y +CONFIG_HID_LOGITECH=y +CONFIG_HID_MICROSOFT=y +CONFIG_HID_MONTEREY=y +CONFIG_HID_PANTHERLORD=y +CONFIG_HID_PETALYNX=y +CONFIG_HID_PID=y +CONFIG_HID_SAMSUNG=y +CONFIG_HID_SONY=y +CONFIG_HID_SUNPLUS=y +CONFIG_HID_SUPPORT=y +# CONFIG_HTC_EGPIO is not set +CONFIG_HWMON=y +# CONFIG_HWMON_DEBUG_CHIP is not set +CONFIG_HW_CONSOLE=y +# CONFIG_HW_RANDOM is not set +CONFIG_HZ=200 +CONFIG_I2C=y +CONFIG_I2C_BOARDINFO=y +CONFIG_I2C_CHARDEV=y +CONFIG_I2C_HELPER_AUTO=y +CONFIG_I2C_S3C2410=y +# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set +# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set +# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set +# CONFIG_IDE is not set +# CONFIG_IEEE80211 is not set +CONFIG_IKCONFIG=y +CONFIG_IKCONFIG_PROC=y +CONFIG_INET_DIAG=y +CONFIG_INET_TCP_DIAG=y +CONFIG_INITRAMFS_SOURCE="" +CONFIG_INOTIFY=y +CONFIG_INOTIFY_USER=y +CONFIG_INPUT=y +# CONFIG_INPUT_CM109 is not set +CONFIG_INPUT_EVDEV=y +# CONFIG_INPUT_GPIO_BUTTONS is not set +CONFIG_INPUT_KEYBOARD=y +CONFIG_INPUT_LIS302DL=y +CONFIG_INPUT_MISC=y +CONFIG_INPUT_MOUSE=y +CONFIG_INPUT_MOUSEDEV=y +# CONFIG_INPUT_MOUSEDEV_PSAUX is not set +CONFIG_INPUT_MOUSEDEV_SCREEN_X=480 +CONFIG_INPUT_MOUSEDEV_SCREEN_Y=640 +CONFIG_INPUT_PCF50633_PMU=y +CONFIG_INPUT_TOUCHSCREEN=y +CONFIG_INPUT_UINPUT=m +# CONFIG_INPUT_YEALINK is not set +CONFIG_IOSCHED_AS=m +CONFIG_IOSCHED_CFQ=m +CONFIG_IP6_NF_MANGLE=m +CONFIG_IP6_NF_MATCH_EUI64=m +CONFIG_IP6_NF_MATCH_FRAG=m +CONFIG_IP6_NF_MATCH_HL=m +CONFIG_IP6_NF_MATCH_IPV6HEADER=m +CONFIG_IP6_NF_MATCH_OPTS=m +CONFIG_IP6_NF_MATCH_RT=m +# CONFIG_IP6_NF_QUEUE is not set +# CONFIG_IP6_NF_RAW is not set +CONFIG_IP6_NF_TARGET_LOG=m +CONFIG_IPV6_TUNNEL=m +CONFIG_IP_NF_MATCH_ADDRTYPE=m +CONFIG_IP_NF_MATCH_ECN=m +# CONFIG_IP_NF_QUEUE is not set +# CONFIG_IP_NF_RAW is not set +CONFIG_IP_NF_TARGET_ECN=m +CONFIG_IP_NF_TARGET_LOG=m +# CONFIG_IP_NF_TARGET_REDIRECT is not set +CONFIG_IP_NF_TARGET_TTL=m +CONFIG_IP_NF_TARGET_ULOG=m +CONFIG_IP_PNP=y +# CONFIG_IP_PNP_BOOTP is not set +# CONFIG_IP_PNP_DHCP is not set +# CONFIG_IP_PNP_RARP is not set +# CONFIG_IP_ROUTE_MULTIPATH is not set +# CONFIG_IP_ROUTE_VERBOSE is not set +# CONFIG_ISDN is not set +CONFIG_JBD=y +CONFIG_JBD2=y +# CONFIG_JBD2_DEBUG is not set +# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set +CONFIG_KALLSYMS=y +CONFIG_KALLSYMS_ALL=y +CONFIG_KEXEC=y +# CONFIG_KEYBOARD_ATKBD is not set +CONFIG_KEYBOARD_GPIO=m +# CONFIG_KEYBOARD_LKKBD is not set +CONFIG_KEYBOARD_NEO1973=y +# CONFIG_KEYBOARD_NEWTON is not set +CONFIG_KEYBOARD_QT2410=y +CONFIG_KEYBOARD_STOWAWAY=m +# CONFIG_KEYBOARD_SUNKBD is not set +# CONFIG_KEYBOARD_XTKBD is not set +# CONFIG_KGDB is not set +CONFIG_KMOD=y +CONFIG_LATENCYTOP=y +CONFIG_LCD_CLASS_DEVICE=y +# CONFIG_LCD_ILI9320 is not set +CONFIG_LCD_LTV350QV=y +# CONFIG_LCD_PLATFORM is not set +# CONFIG_LCD_TDO24M is not set +# CONFIG_LCD_VGG2432A4 is not set +# CONFIG_LEDS_ALIX is not set +CONFIG_LEDS_GPIO=y +CONFIG_LEDS_NEO1973_GTA02=y +CONFIG_LEDS_NEO1973_VIBRATOR=y +CONFIG_LEDS_S3C24XX=m +CONFIG_LEDS_TRIGGER_BACKLIGHT=y +# CONFIG_LEDS_TRIGGER_DEFAULT_ON is not set +# CONFIG_LEDS_TRIGGER_HEARTBEAT is not set +# CONFIG_LLC2 is not set +CONFIG_LOCALVERSION="-mokodev" +CONFIG_LOCKD=y +CONFIG_LOCKDEP=y +CONFIG_LOCK_KERNEL=y +CONFIG_LOCK_STAT=y +# CONFIG_LOGIRUMBLEPAD2_FF is not set +# CONFIG_LOGITECH_FF is not set +# CONFIG_LOGO is not set +CONFIG_LOG_BUF_SHIFT=18 +CONFIG_LOW_MEMORY_KILLER=y +# CONFIG_MACH_AML_M5900 is not set +# CONFIG_MACH_ANUBIS is not set +# CONFIG_MACH_AT2440EVB is not set +# CONFIG_MACH_JIVE is not set +# CONFIG_MACH_N30 is not set +CONFIG_MACH_NEO1973=y +# CONFIG_MACH_NEO1973_GTA01 is not set +CONFIG_MACH_NEO1973_GTA02=y +# CONFIG_MACH_NEXCODER_2440 is not set +# CONFIG_MACH_OSIRIS is not set +# CONFIG_MACH_OTOM is not set +CONFIG_MACH_QT2410=y +# CONFIG_MACH_RX3715 is not set +CONFIG_MACH_SMDK=y +# CONFIG_MACH_SMDK2412 is not set +# CONFIG_MACH_SMDK2413 is not set +# CONFIG_MACH_SMDK2443 is not set +# CONFIG_MACH_TCT_HAMMER is not set +# CONFIG_MACH_VR1000 is not set +# CONFIG_MACH_VSTMS is not set +# CONFIG_MAC_PARTITION is not set +CONFIG_MAGIC_SYSRQ=y +CONFIG_MARKERS=y +CONFIG_MD=y +# CONFIG_MFD_CORE is not set +CONFIG_MFD_GLAMO=y +CONFIG_MFD_GLAMO_FB=y +CONFIG_MFD_GLAMO_MCI=y +CONFIG_MFD_GLAMO_SPI_FB=y +CONFIG_MFD_GLAMO_SPI_GPIO=y +# CONFIG_MFD_PCF50606 is not set +CONFIG_MFD_PCF50633=y +# CONFIG_MFD_T7L66XB is not set +# CONFIG_MFD_TC6387XB is not set +# CONFIG_MFD_TC6393XB is not set +# CONFIG_MFD_TMIO is not set +# CONFIG_MINIX_FS is not set +CONFIG_MMC=y +CONFIG_MMC_BLOCK=y +CONFIG_MMC_BLOCK_BOUNCE=y +# CONFIG_MMC_DEBUG is not set +CONFIG_MMC_S3C=y +CONFIG_MMC_SDHCI=y +CONFIG_MMC_SDHCI_S3C=y +# CONFIG_MMC_SPI is not set +CONFIG_MMC_UNSAFE_RESUME=y +CONFIG_MODULE_FORCE_UNLOAD=y +# CONFIG_MOUSE_BCM5974 is not set +# CONFIG_MOUSE_GPIO is not set +# CONFIG_MOUSE_PS2 is not set +# CONFIG_MOUSE_SERIAL is not set +# CONFIG_MOUSE_VSXXXAA is not set +CONFIG_MSDOS_FS=y +CONFIG_MTD=y +CONFIG_MTD_ABSENT=y +# CONFIG_MTD_AFS_PARTS is not set +# CONFIG_MTD_ALAUDA is not set +# CONFIG_MTD_ARM_INTEGRATOR is not set +CONFIG_MTD_BLKDEVS=y +CONFIG_MTD_BLOCK=y +# CONFIG_MTD_BLOCK2MTD is not set +CONFIG_MTD_CFI=y +# CONFIG_MTD_CFI_ADV_OPTIONS is not set +# CONFIG_MTD_CFI_AMDSTD is not set +CONFIG_MTD_CFI_I1=y +CONFIG_MTD_CFI_I2=y +# CONFIG_MTD_CFI_I4 is not set +# CONFIG_MTD_CFI_I8 is not set +CONFIG_MTD_CFI_INTELEXT=y +# CONFIG_MTD_CFI_STAA is not set +CONFIG_MTD_CFI_UTIL=y +CONFIG_MTD_CHAR=y +CONFIG_MTD_CMDLINE_PARTS=y +# CONFIG_MTD_COMPLEX_MAPPINGS is not set +CONFIG_MTD_CONCAT=y +CONFIG_MTD_GEN_PROBE=y +# CONFIG_MTD_JEDECPROBE is not set +CONFIG_MTD_MAP_BANK_WIDTH_1=y +# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set +CONFIG_MTD_MAP_BANK_WIDTH_2=y +# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set +CONFIG_MTD_MAP_BANK_WIDTH_4=y +# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set +# CONFIG_MTD_MTDRAM is not set +CONFIG_MTD_NAND=y +# CONFIG_MTD_NAND_DISKONCHIP is not set +# CONFIG_MTD_NAND_ECC_SMC is not set +# CONFIG_MTD_NAND_GPIO is not set +CONFIG_MTD_NAND_IDS=y +# CONFIG_MTD_NAND_MUSEUM_IDS is not set +# CONFIG_MTD_NAND_NANDSIM is not set +# CONFIG_MTD_NAND_PLATFORM is not set +CONFIG_MTD_NAND_S3C2410=y +# CONFIG_MTD_NAND_S3C2410_CLKSTOP is not set +CONFIG_MTD_NAND_S3C2410_DEBUG=y +CONFIG_MTD_NAND_S3C2410_HWECC=y +CONFIG_MTD_NAND_VERIFY_WRITE=y +# CONFIG_MTD_ONENAND is not set +CONFIG_MTD_PARTITIONS=y +# CONFIG_MTD_PHRAM is not set +CONFIG_MTD_PHYSMAP=y +CONFIG_MTD_PHYSMAP_BANKWIDTH=2 +CONFIG_MTD_PHYSMAP_LEN=0 +CONFIG_MTD_PHYSMAP_START=0x0 +# CONFIG_MTD_PLATRAM is not set +# CONFIG_MTD_RAM is not set +# CONFIG_MTD_REDBOOT_PARTS is not set +CONFIG_MTD_ROM=y +# CONFIG_MTD_SLRAM is not set +CONFIG_NAMESPACES=y +# CONFIG_NEO1973_GTA02_2440 is not set +# CONFIG_NETDEV_1000 is not set +CONFIG_NETFILTER_NETLINK=m +CONFIG_NETFILTER_NETLINK_LOG=m +CONFIG_NETFILTER_NETLINK_QUEUE=m +# CONFIG_NETFILTER_XT_MATCH_COMMENT is not set +# CONFIG_NETFILTER_XT_MATCH_CONNBYTES is not set +# CONFIG_NETFILTER_XT_MATCH_CONNLIMIT is not set +# CONFIG_NETFILTER_XT_MATCH_CONNMARK is not set +# CONFIG_NETFILTER_XT_MATCH_HELPER is not set +# CONFIG_NETFILTER_XT_MATCH_IPRANGE is not set +# CONFIG_NETFILTER_XT_MATCH_OWNER is not set +CONFIG_NETFILTER_XT_MATCH_QUOTA=m +# CONFIG_NETFILTER_XT_MATCH_RATEEST is not set +# CONFIG_NETFILTER_XT_MATCH_STATE is not set +CONFIG_NETFILTER_XT_MATCH_STATISTIC=m +# CONFIG_NETFILTER_XT_MATCH_TIME is not set +# CONFIG_NETFILTER_XT_MATCH_U32 is not set +# CONFIG_NETFILTER_XT_TARGET_CONNMARK is not set +# CONFIG_NETFILTER_XT_TARGET_RATEEST is not set +# CONFIG_NETFILTER_XT_TARGET_TCPOPTSTRIP is not set +# CONFIG_NET_CLS_ACT is not set +# CONFIG_NET_CLS_FLOW is not set +# CONFIG_NET_CLS_IND is not set +# CONFIG_NET_IPGRE_BROADCAST is not set +CONFIG_NET_IPIP=m +CONFIG_NET_KEY_MIGRATE=y +# CONFIG_NET_PKTGEN is not set +CONFIG_NET_SCH_NETEM=m +CONFIG_NFSD=y +CONFIG_NFSD_V2_ACL=y +CONFIG_NFSD_V3_ACL=y +# CONFIG_NFSD_V4 is not set +CONFIG_NFS_ACL_SUPPORT=y +# CONFIG_NFS_FS is not set +CONFIG_NF_CONNTRACK=y +# CONFIG_NF_CONNTRACK_AMANDA is not set +# CONFIG_NF_CONNTRACK_FTP is not set +# CONFIG_NF_CONNTRACK_H323 is not set +CONFIG_NF_CONNTRACK_IPV4=y +# CONFIG_NF_CONNTRACK_IRC is not set +# CONFIG_NF_CONNTRACK_MARK is not set +# CONFIG_NF_CONNTRACK_PPTP is not set +# CONFIG_NF_CONNTRACK_PROC_COMPAT is not set +# CONFIG_NF_CONNTRACK_SIP is not set +# CONFIG_NF_CONNTRACK_TFTP is not set +CONFIG_NF_DEFRAG_IPV4=y +# CONFIG_NF_NAT_AMANDA is not set +# CONFIG_NF_NAT_FTP is not set +# CONFIG_NF_NAT_H323 is not set +# CONFIG_NF_NAT_IRC is not set +# CONFIG_NF_NAT_PPTP is not set +# CONFIG_NF_NAT_SIP is not set +# CONFIG_NF_NAT_SNMP_BASIC is not set +# CONFIG_NF_NAT_TFTP is not set +CONFIG_NLS=y +# CONFIG_NLS_CODEPAGE_1250 is not set +CONFIG_NLS_CODEPAGE_437=y +CONFIG_NLS_CODEPAGE_936=m +CONFIG_NLS_CODEPAGE_950=m +CONFIG_NLS_ISO8859_1=y +# CONFIG_NLS_ISO8859_15 is not set +# CONFIG_NLS_KOI8_R is not set +CONFIG_NO_IOPORT=y +CONFIG_NR_TTY_DEVICES=6 +# CONFIG_NVRAM is not set +CONFIG_OABI_COMPAT=y +# CONFIG_OUTER_CACHE is not set +CONFIG_PAGEFLAGS_EXTENDED=y +CONFIG_PAGE_OFFSET=0xC0000000 +# CONFIG_PANTHERLORD_FF is not set +CONFIG_PCA9632=y +CONFIG_PCF50633_ADC=y +CONFIG_PCF50633_GPIO=y +# CONFIG_PCI_SYSCALL is not set +CONFIG_PDA_POWER=y +# CONFIG_PHYS_ADDR_T_64BIT is not set +CONFIG_PLAT_S3C=y +CONFIG_PLAT_S3C24XX=y +CONFIG_PM=y +# CONFIG_PM_DEBUG is not set +CONFIG_PM_SLEEP=y +CONFIG_POWER_SUPPLY=y +CONFIG_POWER_SUPPLY_DEBUG=y +CONFIG_PPP=y +# CONFIG_PPPOE is not set +# CONFIG_PPPOL2TP is not set +CONFIG_PPP_ASYNC=y +CONFIG_PPP_BSDCOMP=y +CONFIG_PPP_DEFLATE=y +CONFIG_PPP_MPPE=y +CONFIG_PPP_SYNC_TTY=y +CONFIG_PREEMPT=y +CONFIG_PRINTK_TIME=y +CONFIG_PROC_PAGE_MONITOR=y +# CONFIG_PROVE_LOCKING is not set +CONFIG_RCU_CPU_STALL_DETECTOR=y +# CONFIG_RCU_TORTURE_TEST is not set +CONFIG_REGULATOR=y +CONFIG_REGULATOR_DEBUG=y +CONFIG_REGULATOR_PCF50633=y +CONFIG_RFKILL=y +CONFIG_RFKILL_INPUT=y +CONFIG_RFKILL_LEDS=y +CONFIG_ROMFS_FS=y +# CONFIG_RPCSEC_GSS_KRB5 is not set +CONFIG_RTC_CLASS=y +CONFIG_RTC_DEBUG=y +# CONFIG_RTC_DRV_CMOS is not set +# CONFIG_RTC_DRV_DS1305 is not set +# CONFIG_RTC_DRV_DS1307 is not set +# CONFIG_RTC_DRV_DS1374 is not set +# CONFIG_RTC_DRV_DS1390 is not set +# CONFIG_RTC_DRV_DS1553 is not set +# CONFIG_RTC_DRV_DS1672 is not set +# CONFIG_RTC_DRV_DS1742 is not set +# CONFIG_RTC_DRV_DS3234 is not set +# CONFIG_RTC_DRV_ISL1208 is not set +# CONFIG_RTC_DRV_M41T80 is not set +# CONFIG_RTC_DRV_M41T94 is not set +# CONFIG_RTC_DRV_M48T59 is not set +# CONFIG_RTC_DRV_M48T86 is not set +# CONFIG_RTC_DRV_PCF50606 is not set +CONFIG_RTC_DRV_PCF50633=y +# CONFIG_RTC_DRV_PCF8563 is not set +# CONFIG_RTC_DRV_PCF8583 is not set +# CONFIG_RTC_DRV_RS5C372 is not set +CONFIG_RTC_DRV_S3C=m +# CONFIG_RTC_DRV_STK17TA8 is not set +# CONFIG_RTC_DRV_TEST is not set +# CONFIG_RTC_DRV_V3020 is not set +# CONFIG_RTC_DRV_X1205 is not set +CONFIG_RTC_HCTOSYS=y +CONFIG_RTC_HCTOSYS_DEVICE="rtc0" +CONFIG_RTC_INTF_DEV=y +# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set +CONFIG_RTC_INTF_PROC=y +CONFIG_RTC_INTF_SYSFS=y +CONFIG_RTC_LIB=y +# CONFIG_RT_MUTEX_TESTER is not set +CONFIG_RWSEM_GENERIC_SPINLOCK=y +CONFIG_S3C2410_CLOCK=y +CONFIG_S3C2410_DMA=y +# CONFIG_S3C2410_DMA_DEBUG is not set +CONFIG_S3C2410_GPIO=y +CONFIG_S3C2410_PM=y +# CONFIG_S3C2410_PM_CHECK is not set +# CONFIG_S3C2410_PM_DEBUG is not set +CONFIG_S3C2410_PWM=y +CONFIG_S3C2410_WATCHDOG=m +CONFIG_S3C2440_C_FIQ=y +CONFIG_S3C2440_DMA=y +CONFIG_S3C24XX_PWM=y +# CONFIG_S3C_BOOT_ERROR_RESET is not set +CONFIG_S3C_BOOT_UART_FORCE_FIFO=y +# CONFIG_S3C_BOOT_WATCHDOG is not set +CONFIG_S3C_GPIO_SPACE=0 +CONFIG_S3C_GPIO_TRACK=y +CONFIG_S3C_LOWLEVEL_UART_PORT=2 +CONFIG_SCHEDSTATS=y +CONFIG_SCHED_DEBUG=y +CONFIG_SCSI=y +CONFIG_SCSI_SCAN_ASYNC=y +CONFIG_SCSI_WAIT_SCAN=m +# CONFIG_SDIO_UART is not set +CONFIG_SECURITYFS=y +# CONFIG_SENSORS_MAX1111 is not set +# CONFIG_SENSORS_PC87360 is not set +# CONFIG_SENSORS_PCF50606 is not set +# CONFIG_SENSORS_PCF50633 is not set +# CONFIG_SENSORS_TSL256X is not set +# CONFIG_SERIAL_8250 is not set +CONFIG_SERIAL_S3C2410=y +CONFIG_SERIAL_S3C2440=y +CONFIG_SERIAL_SAMSUNG=y +CONFIG_SERIAL_SAMSUNG_CONSOLE=y +CONFIG_SERIAL_SAMSUNG_UARTS=3 +CONFIG_SERIO=y +# CONFIG_SERIO_RAW is not set +# CONFIG_SERIO_SERPORT is not set +CONFIG_SLHC=y +CONFIG_SMDK2440_CPU2440=y +CONFIG_SMDK2440_CPU2442=y +CONFIG_SND=y +CONFIG_SND_ARM=y +CONFIG_SND_DEBUG=y +# CONFIG_SND_DEBUG_VERBOSE is not set +CONFIG_SND_MIXER_OSS=y +CONFIG_SND_PCM=y +CONFIG_SND_PCM_OSS=y +CONFIG_SND_PCM_XRUN_DEBUG=y +CONFIG_SND_S3C24XX_SOC=y +CONFIG_SND_S3C24XX_SOC_I2S=y +# CONFIG_SND_S3C24XX_SOC_LN2440SBC_ALC650 is not set +CONFIG_SND_S3C24XX_SOC_NEO1973_GTA02_WM8753=y +CONFIG_SND_SOC=y +# CONFIG_SND_SOC_ALL_CODECS is not set +CONFIG_SND_SOC_WM8753=y +CONFIG_SND_SUPPORT_OLD_API=y +CONFIG_SND_TIMER=y +# CONFIG_SOFT_WATCHDOG is not set +CONFIG_SOUND=y +CONFIG_SOUND_OSS_CORE=y +CONFIG_SPI=y +CONFIG_SPI_BITBANG=y +# CONFIG_SPI_GPIO is not set +CONFIG_SPI_MASTER=y +# CONFIG_SPI_S3C24XX is not set +CONFIG_SPI_S3C24XX_GPIO=y +# CONFIG_SPI_SPIDEV is not set +CONFIG_SPLIT_PTLOCK_CPUS=4096 +CONFIG_SSB_POSSIBLE=y +CONFIG_STACKTRACE=y +# CONFIG_STACK_TRACER is not set +CONFIG_SUNRPC=y +# CONFIG_SUNRPC_REGISTER_V4 is not set +CONFIG_SUSPEND=y +CONFIG_SUSPEND_FREEZER=y +CONFIG_SYSFS_DEPRECATED=y +CONFIG_SYSFS_DEPRECATED_V2=y +CONFIG_SYSVIPC_SYSCTL=y +CONFIG_SYS_SUPPORTS_APM_EMULATION=y +# CONFIG_TCP_CONG_ADVANCED is not set +CONFIG_TCP_CONG_CUBIC=y +CONFIG_TCP_MD5SIG=y +# CONFIG_THRUSTMASTER_FF is not set +CONFIG_TIMER_STATS=y +# CONFIG_TOUCHSCREEN_ADS7846 is not set +# CONFIG_TOUCHSCREEN_ELO is not set +CONFIG_TOUCHSCREEN_FILTER=y +CONFIG_TOUCHSCREEN_FILTER_GROUP=y +CONFIG_TOUCHSCREEN_FILTER_LINEAR=y +CONFIG_TOUCHSCREEN_FILTER_MEAN=y +CONFIG_TOUCHSCREEN_FILTER_MEDIAN=y +# CONFIG_TOUCHSCREEN_FUJITSU is not set +# CONFIG_TOUCHSCREEN_GUNZE is not set +# CONFIG_TOUCHSCREEN_INEXIO is not set +# CONFIG_TOUCHSCREEN_MK712 is not set +# CONFIG_TOUCHSCREEN_MTOUCH is not set +# CONFIG_TOUCHSCREEN_PCAP7200 is not set +# CONFIG_TOUCHSCREEN_PENMOUNT is not set +CONFIG_TOUCHSCREEN_S3C2410=y +# CONFIG_TOUCHSCREEN_S3C2410_DEBUG is not set +# CONFIG_TOUCHSCREEN_TOUCHIT213 is not set +# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set +# CONFIG_TOUCHSCREEN_TOUCHWIN is not set +# CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set +CONFIG_TUN=y +# CONFIG_UDF_FS is not set +CONFIG_UID16=y +CONFIG_UIO=y +CONFIG_UIO_PDRV=y +# CONFIG_UIO_PDRV_GENIRQ is not set +# CONFIG_UIO_SERCOS3 is not set +# CONFIG_UIO_SMX is not set +CONFIG_UNEVICTABLE_LRU=y +CONFIG_USB=y +CONFIG_USB_ACM=y +CONFIG_USB_ANNOUNCE_NEW_DEVICES=y +# CONFIG_USB_ARCH_HAS_EHCI is not set +CONFIG_USB_BERRY_CHARGE=m +# CONFIG_USB_CDC_COMPOSITE is not set +CONFIG_USB_DEVICE_CLASS=y +CONFIG_USB_EPSON2888=y +CONFIG_USB_ETH=y +CONFIG_USB_ETH_RNDIS=y +# CONFIG_USB_FILE_STORAGE is not set +CONFIG_USB_GADGET=y +# CONFIG_USB_GADGETFS is not set +# CONFIG_USB_GADGET_AMD5536UDC is not set +# CONFIG_USB_GADGET_AT91 is not set +# CONFIG_USB_GADGET_ATMEL_USBA is not set +# CONFIG_USB_GADGET_DEBUG is not set +# CONFIG_USB_GADGET_DEBUG_FILES is not set +# CONFIG_USB_GADGET_DEBUG_FS is not set +# CONFIG_USB_GADGET_DUALSPEED is not set +# CONFIG_USB_GADGET_DUMMY_HCD is not set +# CONFIG_USB_GADGET_FSL_QE is not set +# CONFIG_USB_GADGET_FSL_USB2 is not set +# CONFIG_USB_GADGET_GOKU is not set +# CONFIG_USB_GADGET_LH7A40X is not set +# CONFIG_USB_GADGET_M66592 is not set +# CONFIG_USB_GADGET_MUSB_HDRC is not set +# CONFIG_USB_GADGET_NET2280 is not set +# CONFIG_USB_GADGET_OMAP is not set +# CONFIG_USB_GADGET_PXA25X is not set +# CONFIG_USB_GADGET_PXA27X is not set +CONFIG_USB_GADGET_S3C2410=y +CONFIG_USB_GADGET_SELECTED=y +CONFIG_USB_GADGET_VBUS_DRAW=500 +# CONFIG_USB_G_PRINTER is not set +# CONFIG_USB_G_SERIAL is not set +CONFIG_USB_HID=y +# CONFIG_USB_HSO is not set +CONFIG_USB_IOWARRIOR=m +CONFIG_USB_KC2190=y +CONFIG_USB_LIBUSUAL=y +# CONFIG_USB_MIDI_GADGET is not set +CONFIG_USB_MON=y +# CONFIG_USB_MUSB_HDRC is not set +CONFIG_USB_NET_CDCETHER=y +CONFIG_USB_NET_RNDIS_HOST=y +# CONFIG_USB_NET_SMSC95XX is not set +# CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set +# CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set +CONFIG_USB_OHCI_HCD=y +CONFIG_USB_RTL8150=m +CONFIG_USB_S3C2410=y +CONFIG_USB_S3C2410_DEBUG=y +CONFIG_USB_SERIAL=y +# CONFIG_USB_SERIAL_CH341 is not set +CONFIG_USB_SERIAL_CONSOLE=y +# CONFIG_USB_SERIAL_IUU is not set +CONFIG_USB_SERIAL_OPTION=y +# CONFIG_USB_SERIAL_OTI6858 is not set +CONFIG_USB_STORAGE=y +CONFIG_USB_SUPPORT=y +CONFIG_USB_SUSPEND=y +CONFIG_USB_TMC=m +CONFIG_USB_TRANCEVIBRATOR=m +CONFIG_USB_USBNET=y +# CONFIG_USB_ZERO is not set +# CONFIG_USER_NS is not set +CONFIG_VECTORS_BASE=0xffff0000 +CONFIG_VFAT_FS=y +# CONFIG_VGASTATE is not set +# CONFIG_VGA_CONSOLE is not set +# CONFIG_VIDEO_DEV is not set +CONFIG_VIDEO_OUTPUT_CONTROL=y +# CONFIG_VLAN_8021Q is not set +CONFIG_VM_EVENT_COUNTERS=y +CONFIG_VT=y +CONFIG_VT_CONSOLE=y +CONFIG_VT_HW_CONSOLE_BINDING=y +# CONFIG_W1 is not set +# CONFIG_WIRELESS_OLD_REGULATORY is not set +# CONFIG_WLAN_80211 is not set +CONFIG_XFRM_MIGRATE=y +# CONFIG_XFRM_USER is not set +CONFIG_ZBOOT_ROM_BSS=0x0 +CONFIG_ZBOOT_ROM_TEXT=0x0 +# CONFIG_ZEROPLUS_FF is not set +# CONFIG_ZISOFS is not set +CONFIG_ZONE_DMA_FLAG=0 diff --git a/target/linux/s3c24xx/patches-2.6.28/0001-merge-openmoko.patch b/target/linux/s3c24xx/patches-2.6.28/0001-merge-openmoko.patch new file mode 100644 index 000000000000..77be55078b78 --- /dev/null +++ b/target/linux/s3c24xx/patches-2.6.28/0001-merge-openmoko.patch @@ -0,0 +1,151201 @@ +Merge OpenMoko kernel patches +git://git.openmoko.org/git/kernel.git#andy-tracking + +mb@homer Thu Jan 1 22:58:51 UTC 2009 + +--- + +Index: linux-2.6.28/arch/arm/common/vic.c +=================================================================== +--- linux-2.6.28.orig/arch/arm/common/vic.c 2008-12-25 00:26:37.000000000 +0100 ++++ linux-2.6.28/arch/arm/common/vic.c 2009-01-02 00:01:56.000000000 +0100 +@@ -69,12 +69,12 @@ void __init vic_init(void __iomem *base, + /* + * Make sure we clear all existing interrupts + */ +- writel(0, base + VIC_VECT_ADDR); ++ writel(0, base + VIC_PL190_VECT_ADDR); + for (i = 0; i < 19; i++) { + unsigned int value; + +- value = readl(base + VIC_VECT_ADDR); +- writel(value, base + VIC_VECT_ADDR); ++ value = readl(base + VIC_PL190_VECT_ADDR); ++ writel(value, base + VIC_PL190_VECT_ADDR); + } + + for (i = 0; i < 16; i++) { +@@ -82,7 +82,7 @@ void __init vic_init(void __iomem *base, + writel(VIC_VECT_CNTL_ENABLE | i, reg); + } + +- writel(32, base + VIC_DEF_VECT_ADDR); ++ writel(32, base + VIC_PL190_DEF_VECT_ADDR); + + for (i = 0; i < 32; i++) { + unsigned int irq = irq_start + i; +Index: linux-2.6.28/arch/arm/configs/gta02-moredrivers-defconfig +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-2.6.28/arch/arm/configs/gta02-moredrivers-defconfig 2009-01-02 00:01:56.000000000 +0100 +@@ -0,0 +1,2107 @@ ++# ++# Automatically generated make config: don't edit ++# Linux kernel version: 2.6.28-rc4 ++# Mon Dec 29 12:13:48 2008 ++# ++CONFIG_ARM=y ++CONFIG_HAVE_PWM=y ++CONFIG_SYS_SUPPORTS_APM_EMULATION=y ++CONFIG_GENERIC_GPIO=y ++# CONFIG_GENERIC_TIME is not set ++# CONFIG_GENERIC_CLOCKEVENTS is not set ++CONFIG_MMU=y ++CONFIG_NO_IOPORT=y ++CONFIG_GENERIC_HARDIRQS=y ++CONFIG_STACKTRACE_SUPPORT=y ++CONFIG_HAVE_LATENCYTOP_SUPPORT=y ++CONFIG_LOCKDEP_SUPPORT=y ++CONFIG_TRACE_IRQFLAGS_SUPPORT=y ++CONFIG_HARDIRQS_SW_RESEND=y ++CONFIG_GENERIC_IRQ_PROBE=y ++CONFIG_RWSEM_GENERIC_SPINLOCK=y ++# CONFIG_ARCH_HAS_ILOG2_U32 is not set ++# CONFIG_ARCH_HAS_ILOG2_U64 is not set ++CONFIG_GENERIC_HWEIGHT=y ++CONFIG_GENERIC_CALIBRATE_DELAY=y ++CONFIG_FIQ=y ++CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y ++CONFIG_VECTORS_BASE=0xffff0000 ++CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" ++ ++# ++# General setup ++# ++CONFIG_EXPERIMENTAL=y ++CONFIG_BROKEN_ON_SMP=y ++CONFIG_LOCK_KERNEL=y ++CONFIG_INIT_ENV_ARG_LIMIT=32 ++CONFIG_LOCALVERSION="-mokodev" ++# CONFIG_LOCALVERSION_AUTO is not set ++CONFIG_SWAP=y ++CONFIG_SYSVIPC=y ++CONFIG_SYSVIPC_SYSCTL=y ++# CONFIG_POSIX_MQUEUE is not set ++# CONFIG_BSD_PROCESS_ACCT is not set ++# CONFIG_TASKSTATS is not set ++# CONFIG_AUDIT is not set ++CONFIG_IKCONFIG=y ++CONFIG_IKCONFIG_PROC=y ++CONFIG_LOG_BUF_SHIFT=18 ++# CONFIG_CGROUPS is not set ++# CONFIG_GROUP_SCHED is not set ++CONFIG_SYSFS_DEPRECATED=y ++CONFIG_SYSFS_DEPRECATED_V2=y ++# CONFIG_RELAY is not set ++CONFIG_NAMESPACES=y ++# CONFIG_UTS_NS is not set ++# CONFIG_IPC_NS is not set ++# CONFIG_USER_NS is not set ++# CONFIG_PID_NS is not set ++CONFIG_BLK_DEV_INITRD=y ++CONFIG_INITRAMFS_SOURCE="" ++CONFIG_CC_OPTIMIZE_FOR_SIZE=y ++CONFIG_SYSCTL=y ++# CONFIG_EMBEDDED is not set ++CONFIG_UID16=y ++CONFIG_SYSCTL_SYSCALL=y ++CONFIG_KALLSYMS=y ++CONFIG_KALLSYMS_ALL=y ++# CONFIG_KALLSYMS_EXTRA_PASS is not set ++CONFIG_HOTPLUG=y ++CONFIG_PRINTK=y ++CONFIG_BUG=y ++CONFIG_ELF_CORE=y ++CONFIG_COMPAT_BRK=y ++CONFIG_BASE_FULL=y ++CONFIG_FUTEX=y ++CONFIG_ANON_INODES=y ++CONFIG_EPOLL=y ++CONFIG_SIGNALFD=y ++CONFIG_TIMERFD=y ++CONFIG_EVENTFD=y ++CONFIG_SHMEM=y ++CONFIG_AIO=y ++CONFIG_ASHMEM=y ++CONFIG_VM_EVENT_COUNTERS=y ++CONFIG_SLAB=y ++# CONFIG_SLUB is not set ++# CONFIG_SLOB is not set ++# CONFIG_PROFILING is not set ++CONFIG_MARKERS=y ++CONFIG_HAVE_OPROFILE=y ++# CONFIG_KPROBES is not set ++CONFIG_HAVE_KPROBES=y ++CONFIG_HAVE_KRETPROBES=y ++CONFIG_HAVE_CLK=y ++CONFIG_HAVE_GENERIC_DMA_COHERENT=y ++CONFIG_SLABINFO=y ++CONFIG_RT_MUTEXES=y ++# CONFIG_TINY_SHMEM is not set ++CONFIG_BASE_SMALL=0 ++CONFIG_MODULES=y ++# CONFIG_MODULE_FORCE_LOAD is not set ++CONFIG_MODULE_UNLOAD=y ++CONFIG_MODULE_FORCE_UNLOAD=y ++# CONFIG_MODVERSIONS is not set ++# CONFIG_MODULE_SRCVERSION_ALL is not set ++CONFIG_KMOD=y ++CONFIG_BLOCK=y ++# CONFIG_LBD is not set ++# CONFIG_BLK_DEV_IO_TRACE is not set ++# CONFIG_LSF is not set ++# CONFIG_BLK_DEV_BSG is not set ++# CONFIG_BLK_DEV_INTEGRITY is not set ++ ++# ++# IO Schedulers ++# ++CONFIG_IOSCHED_NOOP=y ++CONFIG_IOSCHED_AS=m ++CONFIG_IOSCHED_DEADLINE=y ++CONFIG_IOSCHED_CFQ=m ++# CONFIG_DEFAULT_AS is not set ++CONFIG_DEFAULT_DEADLINE=y ++# CONFIG_DEFAULT_CFQ is not set ++# CONFIG_DEFAULT_NOOP is not set ++CONFIG_DEFAULT_IOSCHED="deadline" ++CONFIG_CLASSIC_RCU=y ++CONFIG_FREEZER=y ++ ++# ++# System Type ++# ++# CONFIG_ARCH_AAEC2000 is not set ++# CONFIG_ARCH_INTEGRATOR is not set ++# CONFIG_ARCH_REALVIEW is not set ++# CONFIG_ARCH_VERSATILE is not set ++# CONFIG_ARCH_AT91 is not set ++# CONFIG_ARCH_CLPS7500 is not set ++# CONFIG_ARCH_CLPS711X is not set ++# CONFIG_ARCH_EBSA110 is not set ++# CONFIG_ARCH_EP93XX is not set ++# CONFIG_ARCH_FOOTBRIDGE is not set ++# CONFIG_ARCH_NETX is not set ++# CONFIG_ARCH_H720X is not set ++# CONFIG_ARCH_IMX is not set ++# CONFIG_ARCH_IOP13XX is not set ++# CONFIG_ARCH_IOP32X is not set ++# CONFIG_ARCH_IOP33X is not set ++# CONFIG_ARCH_IXP23XX is not set ++# CONFIG_ARCH_IXP2000 is not set ++# CONFIG_ARCH_IXP4XX is not set ++# CONFIG_ARCH_L7200 is not set ++# CONFIG_ARCH_KIRKWOOD is not set ++# CONFIG_ARCH_KS8695 is not set ++# CONFIG_ARCH_NS9XXX is not set ++# CONFIG_ARCH_LOKI is not set ++# CONFIG_ARCH_MV78XX0 is not set ++# CONFIG_ARCH_MXC is not set ++# CONFIG_ARCH_ORION5X is not set ++# CONFIG_ARCH_PNX4008 is not set ++# CONFIG_ARCH_PXA is not set ++# CONFIG_ARCH_RPC is not set ++# CONFIG_ARCH_SA1100 is not set ++CONFIG_ARCH_S3C2410=y ++# CONFIG_ARCH_S3C64XX is not set ++# CONFIG_ARCH_SHARK is not set ++# CONFIG_ARCH_LH7A40X is not set ++# CONFIG_ARCH_DAVINCI is not set ++# CONFIG_ARCH_OMAP is not set ++# CONFIG_ARCH_MSM is not set ++CONFIG_PLAT_S3C24XX=y ++CONFIG_S3C2410_CLOCK=y ++CONFIG_CPU_S3C244X=y ++CONFIG_S3C24XX_PWM=y ++CONFIG_S3C2410_DMA=y ++# CONFIG_S3C2410_DMA_DEBUG is not set ++CONFIG_MACH_SMDK=y ++CONFIG_MACH_NEO1973=y ++CONFIG_PLAT_S3C=y ++CONFIG_CPU_LLSERIAL_S3C2410=y ++CONFIG_CPU_LLSERIAL_S3C2440=y ++ ++# ++# Boot options ++# ++# CONFIG_S3C_BOOT_WATCHDOG is not set ++# CONFIG_S3C_BOOT_ERROR_RESET is not set ++CONFIG_S3C_BOOT_UART_FORCE_FIFO=y ++ ++# ++# Power management ++# ++# CONFIG_S3C2410_PM_DEBUG is not set ++# CONFIG_S3C2410_PM_CHECK is not set ++CONFIG_S3C_LOWLEVEL_UART_PORT=2 ++CONFIG_S3C_GPIO_SPACE=0 ++CONFIG_S3C_GPIO_TRACK=y ++ ++# ++# S3C2400 Machines ++# ++CONFIG_CPU_S3C2410=y ++CONFIG_CPU_S3C2410_DMA=y ++CONFIG_S3C2410_PM=y ++CONFIG_S3C2410_GPIO=y ++CONFIG_S3C2410_PWM=y ++ ++# ++# S3C2410 Machines ++# ++# CONFIG_ARCH_SMDK2410 is not set ++# CONFIG_ARCH_H1940 is not set ++# CONFIG_MACH_N30 is not set ++# CONFIG_ARCH_BAST is not set ++# CONFIG_MACH_OTOM is not set ++# CONFIG_MACH_AML_M5900 is not set ++# CONFIG_MACH_TCT_HAMMER is not set ++# CONFIG_MACH_VR1000 is not set ++CONFIG_MACH_QT2410=y ++# CONFIG_MACH_NEO1973_GTA01 is not set ++ ++# ++# S3C2412 Machines ++# ++# CONFIG_MACH_JIVE is not set ++# CONFIG_MACH_SMDK2413 is not set ++# CONFIG_MACH_SMDK2412 is not set ++# CONFIG_MACH_VSTMS is not set ++CONFIG_CPU_S3C2440=y ++CONFIG_S3C2440_DMA=y ++CONFIG_S3C2440_C_FIQ=y ++ ++# ++# S3C2440 Machines ++# ++# CONFIG_MACH_ANUBIS is not set ++# CONFIG_MACH_OSIRIS is not set ++# CONFIG_MACH_RX3715 is not set ++CONFIG_ARCH_S3C2440=y ++# CONFIG_MACH_NEXCODER_2440 is not set ++CONFIG_SMDK2440_CPU2440=y ++# CONFIG_MACH_AT2440EVB is not set ++CONFIG_MACH_NEO1973_GTA02=y ++# CONFIG_NEO1973_GTA02_2440 is not set ++CONFIG_CPU_S3C2442=y ++ ++# ++# S3C2442 Machines ++# ++CONFIG_SMDK2440_CPU2442=y ++ ++# ++# S3C2443 Machines ++# ++# CONFIG_MACH_SMDK2443 is not set ++ ++# ++# Processor Type ++# ++CONFIG_CPU_32=y ++CONFIG_CPU_ARM920T=y ++CONFIG_CPU_32v4T=y ++CONFIG_CPU_ABRT_EV4T=y ++CONFIG_CPU_PABRT_NOIFAR=y ++CONFIG_CPU_CACHE_V4WT=y ++CONFIG_CPU_CACHE_VIVT=y ++CONFIG_CPU_COPY_V4WB=y ++CONFIG_CPU_TLB_V4WBI=y ++CONFIG_CPU_CP15=y ++CONFIG_CPU_CP15_MMU=y ++ ++# ++# Processor Features ++# ++CONFIG_ARM_THUMB=y ++# CONFIG_CPU_ICACHE_DISABLE is not set ++# CONFIG_CPU_DCACHE_DISABLE is not set ++# CONFIG_CPU_DCACHE_WRITETHROUGH is not set ++# CONFIG_OUTER_CACHE is not set ++ ++# ++# Bus support ++# ++# CONFIG_PCI_SYSCALL is not set ++# CONFIG_ARCH_SUPPORTS_MSI is not set ++# CONFIG_PCCARD is not set ++ ++# ++# Kernel Features ++# ++CONFIG_VMSPLIT_3G=y ++# CONFIG_VMSPLIT_2G is not set ++# CONFIG_VMSPLIT_1G is not set ++CONFIG_PAGE_OFFSET=0xC0000000 ++CONFIG_PREEMPT=y ++CONFIG_HZ=200 ++CONFIG_AEABI=y ++CONFIG_OABI_COMPAT=y ++CONFIG_ARCH_FLATMEM_HAS_HOLES=y ++# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set ++# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set ++CONFIG_SELECT_MEMORY_MODEL=y ++CONFIG_FLATMEM_MANUAL=y ++# CONFIG_DISCONTIGMEM_MANUAL is not set ++# CONFIG_SPARSEMEM_MANUAL is not set ++CONFIG_FLATMEM=y ++CONFIG_FLAT_NODE_MEM_MAP=y ++CONFIG_PAGEFLAGS_EXTENDED=y ++CONFIG_SPLIT_PTLOCK_CPUS=4096 ++# CONFIG_RESOURCES_64BIT is not set ++# CONFIG_PHYS_ADDR_T_64BIT is not set ++CONFIG_ZONE_DMA_FLAG=0 ++CONFIG_VIRT_TO_BUS=y ++CONFIG_UNEVICTABLE_LRU=y ++CONFIG_ALIGNMENT_TRAP=y ++ ++# ++# Boot options ++# ++CONFIG_ZBOOT_ROM_TEXT=0x0 ++CONFIG_ZBOOT_ROM_BSS=0x0 ++CONFIG_CMDLINE="unused -- bootloader passes ATAG list" ++# CONFIG_XIP_KERNEL is not set ++CONFIG_KEXEC=y ++CONFIG_ATAGS_PROC=y ++ ++# ++# CPU Power Management ++# ++CONFIG_CPU_IDLE=y ++CONFIG_CPU_IDLE_GOV_LADDER=y ++ ++# ++# Floating point emulation ++# ++ ++# ++# At least one emulation must be selected ++# ++CONFIG_FPE_NWFPE=y ++# CONFIG_FPE_NWFPE_XP is not set ++# CONFIG_FPE_FASTFPE is not set ++ ++# ++# Userspace binary formats ++# ++CONFIG_BINFMT_ELF=y ++# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set ++CONFIG_HAVE_AOUT=y ++# CONFIG_BINFMT_AOUT is not set ++# CONFIG_BINFMT_MISC is not set ++ ++# ++# Power management options ++# ++CONFIG_PM=y ++# CONFIG_PM_DEBUG is not set ++CONFIG_PM_SLEEP=y ++CONFIG_SUSPEND=y ++CONFIG_SUSPEND_FREEZER=y ++CONFIG_APM_EMULATION=y ++CONFIG_ARCH_SUSPEND_POSSIBLE=y ++CONFIG_NET=y ++ ++# ++# Networking options ++# ++CONFIG_PACKET=y ++CONFIG_PACKET_MMAP=y ++CONFIG_UNIX=y ++CONFIG_XFRM=y ++# CONFIG_XFRM_USER is not set ++# CONFIG_XFRM_SUB_POLICY is not set ++CONFIG_XFRM_MIGRATE=y ++# CONFIG_XFRM_STATISTICS is not set ++CONFIG_XFRM_IPCOMP=m ++CONFIG_NET_KEY=m ++CONFIG_NET_KEY_MIGRATE=y ++CONFIG_INET=y ++CONFIG_IP_MULTICAST=y ++CONFIG_IP_ADVANCED_ROUTER=y ++CONFIG_ASK_IP_FIB_HASH=y ++# CONFIG_IP_FIB_TRIE is not set ++CONFIG_IP_FIB_HASH=y ++CONFIG_IP_MULTIPLE_TABLES=y ++# CONFIG_IP_ROUTE_MULTIPATH is not set ++# CONFIG_IP_ROUTE_VERBOSE is not set ++CONFIG_IP_PNP=y ++# CONFIG_IP_PNP_DHCP is not set ++# CONFIG_IP_PNP_BOOTP is not set ++# CONFIG_IP_PNP_RARP is not set ++CONFIG_NET_IPIP=m ++CONFIG_NET_IPGRE=m ++# CONFIG_NET_IPGRE_BROADCAST is not set ++# CONFIG_IP_MROUTE is not set ++# CONFIG_ARPD is not set ++CONFIG_SYN_COOKIES=y ++CONFIG_INET_AH=m ++CONFIG_INET_ESP=m ++CONFIG_INET_IPCOMP=m ++CONFIG_INET_XFRM_TUNNEL=m ++CONFIG_INET_TUNNEL=m ++CONFIG_INET_XFRM_MODE_TRANSPORT=m ++CONFIG_INET_XFRM_MODE_TUNNEL=m ++CONFIG_INET_XFRM_MODE_BEET=m ++# CONFIG_INET_LRO is not set ++CONFIG_INET_DIAG=y ++CONFIG_INET_TCP_DIAG=y ++# CONFIG_TCP_CONG_ADVANCED is not set ++CONFIG_TCP_CONG_CUBIC=y ++CONFIG_DEFAULT_TCP_CONG="cubic" ++CONFIG_TCP_MD5SIG=y ++CONFIG_IPV6=m ++# CONFIG_IPV6_PRIVACY is not set ++# CONFIG_IPV6_ROUTER_PREF is not set ++# CONFIG_IPV6_OPTIMISTIC_DAD is not set ++CONFIG_INET6_AH=m ++CONFIG_INET6_ESP=m ++CONFIG_INET6_IPCOMP=m ++# CONFIG_IPV6_MIP6 is not set ++CONFIG_INET6_XFRM_TUNNEL=m ++CONFIG_INET6_TUNNEL=m ++CONFIG_INET6_XFRM_MODE_TRANSPORT=m ++CONFIG_INET6_XFRM_MODE_TUNNEL=m ++CONFIG_INET6_XFRM_MODE_BEET=m ++# CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION is not set ++CONFIG_IPV6_SIT=m ++CONFIG_IPV6_NDISC_NODETYPE=y ++CONFIG_IPV6_TUNNEL=m ++# CONFIG_IPV6_MULTIPLE_TABLES is not set ++# CONFIG_IPV6_MROUTE is not set ++# CONFIG_NETWORK_SECMARK is not set ++CONFIG_NETFILTER=y ++# CONFIG_NETFILTER_DEBUG is not set ++CONFIG_NETFILTER_ADVANCED=y ++CONFIG_BRIDGE_NETFILTER=y ++ ++# ++# Core Netfilter Configuration ++# ++CONFIG_NETFILTER_NETLINK=m ++CONFIG_NETFILTER_NETLINK_QUEUE=m ++CONFIG_NETFILTER_NETLINK_LOG=m ++CONFIG_NF_CONNTRACK=y ++# CONFIG_NF_CT_ACCT is not set ++# CONFIG_NF_CONNTRACK_MARK is not set ++# CONFIG_NF_CONNTRACK_EVENTS is not set ++# CONFIG_NF_CT_PROTO_DCCP is not set ++# CONFIG_NF_CT_PROTO_SCTP is not set ++# CONFIG_NF_CT_PROTO_UDPLITE is not set ++# CONFIG_NF_CONNTRACK_AMANDA is not set ++# CONFIG_NF_CONNTRACK_FTP is not set ++# CONFIG_NF_CONNTRACK_H323 is not set ++# CONFIG_NF_CONNTRACK_IRC is not set ++# CONFIG_NF_CONNTRACK_NETBIOS_NS is not set ++# CONFIG_NF_CONNTRACK_PPTP is not set ++# CONFIG_NF_CONNTRACK_SANE is not set ++# CONFIG_NF_CONNTRACK_SIP is not set ++# CONFIG_NF_CONNTRACK_TFTP is not set ++# CONFIG_NF_CT_NETLINK is not set ++# CONFIG_NETFILTER_TPROXY is not set ++CONFIG_NETFILTER_XTABLES=m ++CONFIG_NETFILTER_XT_TARGET_CLASSIFY=m ++# CONFIG_NETFILTER_XT_TARGET_CONNMARK is not set ++CONFIG_NETFILTER_XT_TARGET_DSCP=m ++CONFIG_NETFILTER_XT_TARGET_MARK=m ++CONFIG_NETFILTER_XT_TARGET_NFLOG=m ++CONFIG_NETFILTER_XT_TARGET_NFQUEUE=m ++# CONFIG_NETFILTER_XT_TARGET_RATEEST is not set ++CONFIG_NETFILTER_XT_TARGET_TCPMSS=m ++# CONFIG_NETFILTER_XT_TARGET_TCPOPTSTRIP is not set ++# CONFIG_NETFILTER_XT_MATCH_COMMENT is not set ++# CONFIG_NETFILTER_XT_MATCH_CONNBYTES is not set ++# CONFIG_NETFILTER_XT_MATCH_CONNLIMIT is not set ++# CONFIG_NETFILTER_XT_MATCH_CONNMARK is not set ++CONFIG_NETFILTER_XT_MATCH_CONNTRACK=m ++CONFIG_NETFILTER_XT_MATCH_DCCP=m ++CONFIG_NETFILTER_XT_MATCH_DSCP=m ++CONFIG_NETFILTER_XT_MATCH_ESP=m ++CONFIG_NETFILTER_XT_MATCH_HASHLIMIT=m ++# CONFIG_NETFILTER_XT_MATCH_HELPER is not set ++# CONFIG_NETFILTER_XT_MATCH_IPRANGE is not set ++CONFIG_NETFILTER_XT_MATCH_LENGTH=m ++CONFIG_NETFILTER_XT_MATCH_LIMIT=m ++CONFIG_NETFILTER_XT_MATCH_MAC=m ++CONFIG_NETFILTER_XT_MATCH_MARK=m ++CONFIG_NETFILTER_XT_MATCH_MULTIPORT=m ++# CONFIG_NETFILTER_XT_MATCH_OWNER is not set ++CONFIG_NETFILTER_XT_MATCH_POLICY=m ++CONFIG_NETFILTER_XT_MATCH_PHYSDEV=m ++CONFIG_NETFILTER_XT_MATCH_PKTTYPE=m ++CONFIG_NETFILTER_XT_MATCH_QUOTA=m ++# CONFIG_NETFILTER_XT_MATCH_RATEEST is not set ++CONFIG_NETFILTER_XT_MATCH_REALM=m ++# CONFIG_NETFILTER_XT_MATCH_RECENT is not set ++CONFIG_NETFILTER_XT_MATCH_SCTP=m ++# CONFIG_NETFILTER_XT_MATCH_STATE is not set ++CONFIG_NETFILTER_XT_MATCH_STATISTIC=m ++CONFIG_NETFILTER_XT_MATCH_STRING=m ++CONFIG_NETFILTER_XT_MATCH_TCPMSS=m ++# CONFIG_NETFILTER_XT_MATCH_TIME is not set ++# CONFIG_NETFILTER_XT_MATCH_U32 is not set ++# CONFIG_IP_VS is not set ++ ++# ++# IP: Netfilter Configuration ++# ++CONFIG_NF_DEFRAG_IPV4=y ++CONFIG_NF_CONNTRACK_IPV4=y ++# CONFIG_NF_CONNTRACK_PROC_COMPAT is not set ++# CONFIG_IP_NF_QUEUE is not set ++CONFIG_IP_NF_IPTABLES=m ++CONFIG_IP_NF_MATCH_ADDRTYPE=m ++CONFIG_IP_NF_MATCH_AH=m ++CONFIG_IP_NF_MATCH_ECN=m ++CONFIG_IP_NF_MATCH_TTL=m ++CONFIG_IP_NF_FILTER=m ++CONFIG_IP_NF_TARGET_REJECT=m ++CONFIG_IP_NF_TARGET_LOG=m ++CONFIG_IP_NF_TARGET_ULOG=m ++CONFIG_NF_NAT=m ++CONFIG_NF_NAT_NEEDED=y ++CONFIG_IP_NF_TARGET_MASQUERADE=m ++# CONFIG_IP_NF_TARGET_NETMAP is not set ++# CONFIG_IP_NF_TARGET_REDIRECT is not set ++# CONFIG_NF_NAT_SNMP_BASIC is not set ++# CONFIG_NF_NAT_FTP is not set ++# CONFIG_NF_NAT_IRC is not set ++# CONFIG_NF_NAT_TFTP is not set ++# CONFIG_NF_NAT_AMANDA is not set ++# CONFIG_NF_NAT_PPTP is not set ++# CONFIG_NF_NAT_H323 is not set ++# CONFIG_NF_NAT_SIP is not set ++CONFIG_IP_NF_MANGLE=m ++# CONFIG_IP_NF_TARGET_CLUSTERIP is not set ++CONFIG_IP_NF_TARGET_ECN=m ++CONFIG_IP_NF_TARGET_TTL=m ++# CONFIG_IP_NF_RAW is not set ++# CONFIG_IP_NF_ARPTABLES is not set ++ ++# ++# IPv6: Netfilter Configuration ++# ++CONFIG_NF_CONNTRACK_IPV6=m ++# CONFIG_IP6_NF_QUEUE is not set ++CONFIG_IP6_NF_IPTABLES=m ++CONFIG_IP6_NF_MATCH_AH=m ++CONFIG_IP6_NF_MATCH_EUI64=m ++CONFIG_IP6_NF_MATCH_FRAG=m ++CONFIG_IP6_NF_MATCH_OPTS=m ++CONFIG_IP6_NF_MATCH_HL=m ++CONFIG_IP6_NF_MATCH_IPV6HEADER=m ++CONFIG_IP6_NF_MATCH_MH=m ++CONFIG_IP6_NF_MATCH_RT=m ++CONFIG_IP6_NF_TARGET_LOG=m ++CONFIG_IP6_NF_FILTER=m ++CONFIG_IP6_NF_TARGET_REJECT=m ++CONFIG_IP6_NF_MANGLE=m ++CONFIG_IP6_NF_TARGET_HL=m ++# CONFIG_IP6_NF_RAW is not set ++CONFIG_BRIDGE_NF_EBTABLES=m ++CONFIG_BRIDGE_EBT_BROUTE=m ++CONFIG_BRIDGE_EBT_T_FILTER=m ++CONFIG_BRIDGE_EBT_T_NAT=m ++CONFIG_BRIDGE_EBT_802_3=m ++CONFIG_BRIDGE_EBT_AMONG=m ++CONFIG_BRIDGE_EBT_ARP=m ++CONFIG_BRIDGE_EBT_IP=m ++# CONFIG_BRIDGE_EBT_IP6 is not set ++CONFIG_BRIDGE_EBT_LIMIT=m ++CONFIG_BRIDGE_EBT_MARK=m ++CONFIG_BRIDGE_EBT_PKTTYPE=m ++CONFIG_BRIDGE_EBT_STP=m ++CONFIG_BRIDGE_EBT_VLAN=m ++CONFIG_BRIDGE_EBT_ARPREPLY=m ++CONFIG_BRIDGE_EBT_DNAT=m ++CONFIG_BRIDGE_EBT_MARK_T=m ++CONFIG_BRIDGE_EBT_REDIRECT=m ++CONFIG_BRIDGE_EBT_SNAT=m ++CONFIG_BRIDGE_EBT_LOG=m ++CONFIG_BRIDGE_EBT_ULOG=m ++# CONFIG_BRIDGE_EBT_NFLOG is not set ++# CONFIG_IP_DCCP is not set ++# CONFIG_IP_SCTP is not set ++# CONFIG_TIPC is not set ++# CONFIG_ATM is not set ++CONFIG_STP=y ++CONFIG_BRIDGE=y ++# CONFIG_NET_DSA is not set ++# CONFIG_VLAN_8021Q is not set ++# CONFIG_DECNET is not set ++CONFIG_LLC=y ++# CONFIG_LLC2 is not set ++# CONFIG_IPX is not set ++# CONFIG_ATALK is not set ++# CONFIG_X25 is not set ++# CONFIG_LAPB is not set ++# CONFIG_ECONET is not set ++# CONFIG_WAN_ROUTER is not set ++CONFIG_NET_SCHED=y ++ ++# ++# Queueing/Scheduling ++# ++CONFIG_NET_SCH_CBQ=m ++CONFIG_NET_SCH_HTB=m ++CONFIG_NET_SCH_HFSC=m ++CONFIG_NET_SCH_PRIO=m ++# CONFIG_NET_SCH_MULTIQ is not set ++CONFIG_NET_SCH_RED=m ++CONFIG_NET_SCH_SFQ=m ++CONFIG_NET_SCH_TEQL=m ++CONFIG_NET_SCH_TBF=m ++CONFIG_NET_SCH_GRED=m ++CONFIG_NET_SCH_DSMARK=m ++CONFIG_NET_SCH_NETEM=m ++ ++# ++# Classification ++# ++CONFIG_NET_CLS=y ++CONFIG_NET_CLS_BASIC=m ++CONFIG_NET_CLS_TCINDEX=m ++CONFIG_NET_CLS_ROUTE4=m ++CONFIG_NET_CLS_ROUTE=y ++CONFIG_NET_CLS_FW=m ++CONFIG_NET_CLS_U32=m ++CONFIG_CLS_U32_PERF=y ++CONFIG_CLS_U32_MARK=y ++CONFIG_NET_CLS_RSVP=m ++CONFIG_NET_CLS_RSVP6=m ++# CONFIG_NET_CLS_FLOW is not set ++# CONFIG_NET_EMATCH is not set ++# CONFIG_NET_CLS_ACT is not set ++# CONFIG_NET_CLS_IND is not set ++CONFIG_NET_SCH_FIFO=y ++ ++# ++# Network testing ++# ++# CONFIG_NET_PKTGEN is not set ++# CONFIG_HAMRADIO is not set ++# CONFIG_CAN is not set ++# CONFIG_IRDA is not set ++CONFIG_BT=y ++CONFIG_BT_L2CAP=y ++CONFIG_BT_SCO=y ++CONFIG_BT_RFCOMM=y ++CONFIG_BT_RFCOMM_TTY=y ++CONFIG_BT_BNEP=y ++CONFIG_BT_BNEP_MC_FILTER=y ++CONFIG_BT_BNEP_PROTO_FILTER=y ++CONFIG_BT_HIDP=y ++ ++# ++# Bluetooth device drivers ++# ++CONFIG_BT_HCIBTUSB=y ++# CONFIG_BT_HCIBTSDIO is not set ++# CONFIG_BT_HCIUART is not set ++# CONFIG_BT_HCIBCM203X is not set ++# CONFIG_BT_HCIBPA10X is not set ++# CONFIG_BT_HCIBFUSB is not set ++# CONFIG_BT_HCIVHCI is not set ++# CONFIG_AF_RXRPC is not set ++# CONFIG_PHONET is not set ++CONFIG_FIB_RULES=y ++CONFIG_WIRELESS=y ++# CONFIG_CFG80211 is not set ++# CONFIG_WIRELESS_OLD_REGULATORY is not set ++CONFIG_WIRELESS_EXT=y ++CONFIG_WIRELESS_EXT_SYSFS=y ++# CONFIG_MAC80211 is not set ++# CONFIG_IEEE80211 is not set ++CONFIG_RFKILL=y ++CONFIG_RFKILL_INPUT=y ++CONFIG_RFKILL_LEDS=y ++# CONFIG_NET_9P is not set ++ ++# ++# Device Drivers ++# ++ ++# ++# Generic Driver Options ++# ++CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" ++CONFIG_STANDALONE=y ++CONFIG_PREVENT_FIRMWARE_BUILD=y ++CONFIG_FW_LOADER=y ++# CONFIG_FIRMWARE_IN_KERNEL is not set ++CONFIG_EXTRA_FIRMWARE="" ++# CONFIG_DEBUG_DRIVER is not set ++# CONFIG_DEBUG_DEVRES is not set ++# CONFIG_SYS_HYPERVISOR is not set ++CONFIG_CONNECTOR=m ++CONFIG_MTD=y ++# CONFIG_MTD_DEBUG is not set ++CONFIG_MTD_CONCAT=y ++CONFIG_MTD_PARTITIONS=y ++# CONFIG_MTD_REDBOOT_PARTS is not set ++CONFIG_MTD_CMDLINE_PARTS=y ++# CONFIG_MTD_AFS_PARTS is not set ++# CONFIG_MTD_AR7_PARTS is not set ++ ++# ++# User Modules And Translation Layers ++# ++CONFIG_MTD_CHAR=y ++CONFIG_MTD_BLKDEVS=y ++CONFIG_MTD_BLOCK=y ++# CONFIG_FTL is not set ++# CONFIG_NFTL is not set ++# CONFIG_INFTL is not set ++# CONFIG_RFD_FTL is not set ++# CONFIG_SSFDC is not set ++# CONFIG_MTD_OOPS is not set ++ ++# ++# RAM/ROM/Flash chip drivers ++# ++CONFIG_MTD_CFI=y ++# CONFIG_MTD_JEDECPROBE is not set ++CONFIG_MTD_GEN_PROBE=y ++# CONFIG_MTD_CFI_ADV_OPTIONS is not set ++CONFIG_MTD_MAP_BANK_WIDTH_1=y ++CONFIG_MTD_MAP_BANK_WIDTH_2=y ++CONFIG_MTD_MAP_BANK_WIDTH_4=y ++# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set ++# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set ++# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set ++CONFIG_MTD_CFI_I1=y ++CONFIG_MTD_CFI_I2=y ++# CONFIG_MTD_CFI_I4 is not set ++# CONFIG_MTD_CFI_I8 is not set ++CONFIG_MTD_CFI_INTELEXT=y ++# CONFIG_MTD_CFI_AMDSTD is not set ++# CONFIG_MTD_CFI_STAA is not set ++CONFIG_MTD_CFI_UTIL=y ++# CONFIG_MTD_RAM is not set ++CONFIG_MTD_ROM=y ++CONFIG_MTD_ABSENT=y ++ ++# ++# Mapping drivers for chip access ++# ++# CONFIG_MTD_COMPLEX_MAPPINGS is not set ++CONFIG_MTD_PHYSMAP=y ++CONFIG_MTD_PHYSMAP_START=0x0 ++CONFIG_MTD_PHYSMAP_LEN=0 ++CONFIG_MTD_PHYSMAP_BANKWIDTH=2 ++# CONFIG_MTD_ARM_INTEGRATOR is not set ++# CONFIG_MTD_PLATRAM is not set ++ ++# ++# Self-contained MTD device drivers ++# ++# CONFIG_MTD_DATAFLASH is not set ++# CONFIG_MTD_M25P80 is not set ++# CONFIG_MTD_SLRAM is not set ++# CONFIG_MTD_PHRAM is not set ++# CONFIG_MTD_MTDRAM is not set ++# CONFIG_MTD_BLOCK2MTD is not set ++ ++# ++# Disk-On-Chip Device Drivers ++# ++# CONFIG_MTD_DOC2000 is not set ++# CONFIG_MTD_DOC2001 is not set ++# CONFIG_MTD_DOC2001PLUS is not set ++CONFIG_MTD_NAND=y ++CONFIG_MTD_NAND_VERIFY_WRITE=y ++# CONFIG_MTD_NAND_ECC_SMC is not set ++# CONFIG_MTD_NAND_MUSEUM_IDS is not set ++# CONFIG_MTD_NAND_GPIO is not set ++CONFIG_MTD_NAND_IDS=y ++CONFIG_MTD_NAND_S3C2410=y ++CONFIG_MTD_NAND_S3C2410_DEBUG=y ++CONFIG_MTD_NAND_S3C2410_HWECC=y ++# CONFIG_MTD_NAND_S3C2410_CLKSTOP is not set ++# CONFIG_MTD_NAND_DISKONCHIP is not set ++# CONFIG_MTD_NAND_NANDSIM is not set ++# CONFIG_MTD_NAND_PLATFORM is not set ++# CONFIG_MTD_ALAUDA is not set ++# CONFIG_MTD_ONENAND is not set ++ ++# ++# UBI - Unsorted block images ++# ++# CONFIG_MTD_UBI is not set ++# CONFIG_PARPORT is not set ++CONFIG_BLK_DEV=y ++# CONFIG_BLK_DEV_COW_COMMON is not set ++CONFIG_BLK_DEV_LOOP=m ++# CONFIG_BLK_DEV_CRYPTOLOOP is not set ++# CONFIG_BLK_DEV_NBD is not set ++CONFIG_BLK_DEV_UB=m ++CONFIG_BLK_DEV_RAM=y ++CONFIG_BLK_DEV_RAM_COUNT=16 ++CONFIG_BLK_DEV_RAM_SIZE=4096 ++# CONFIG_BLK_DEV_XIP is not set ++# CONFIG_CDROM_PKTCDVD is not set ++# CONFIG_ATA_OVER_ETH is not set ++CONFIG_MISC_DEVICES=y ++# CONFIG_EEPROM_93CX6 is not set ++CONFIG_LOW_MEMORY_KILLER=y ++# CONFIG_ENCLOSURE_SERVICES is not set ++CONFIG_HAVE_IDE=y ++# CONFIG_IDE is not set ++ ++# ++# SCSI device support ++# ++# CONFIG_RAID_ATTRS is not set ++CONFIG_SCSI=y ++CONFIG_SCSI_DMA=y ++# CONFIG_SCSI_TGT is not set ++# CONFIG_SCSI_NETLINK is not set ++CONFIG_SCSI_PROC_FS=y ++ ++# ++# SCSI support type (disk, tape, CD-ROM) ++# ++CONFIG_BLK_DEV_SD=y ++# CONFIG_CHR_DEV_ST is not set ++# CONFIG_CHR_DEV_OSST is not set ++CONFIG_BLK_DEV_SR=y ++# CONFIG_BLK_DEV_SR_VENDOR is not set ++CONFIG_CHR_DEV_SG=y ++# CONFIG_CHR_DEV_SCH is not set ++ ++# ++# Some SCSI devices (e.g. CD jukebox) support multiple LUNs ++# ++CONFIG_SCSI_MULTI_LUN=y ++# CONFIG_SCSI_CONSTANTS is not set ++# CONFIG_SCSI_LOGGING is not set ++CONFIG_SCSI_SCAN_ASYNC=y ++CONFIG_SCSI_WAIT_SCAN=m ++ ++# ++# SCSI Transports ++# ++# CONFIG_SCSI_SPI_ATTRS is not set ++# CONFIG_SCSI_FC_ATTRS is not set ++# CONFIG_SCSI_ISCSI_ATTRS is not set ++# CONFIG_SCSI_SAS_LIBSAS is not set ++# CONFIG_SCSI_SRP_ATTRS is not set ++CONFIG_SCSI_LOWLEVEL=y ++# CONFIG_ISCSI_TCP is not set ++# CONFIG_SCSI_DEBUG is not set ++# CONFIG_SCSI_DH is not set ++# CONFIG_ATA is not set ++CONFIG_MD=y ++# CONFIG_BLK_DEV_MD is not set ++CONFIG_BLK_DEV_DM=m ++# CONFIG_DM_DEBUG is not set ++CONFIG_DM_CRYPT=m ++CONFIG_DM_SNAPSHOT=m ++# CONFIG_DM_MIRROR is not set ++# CONFIG_DM_ZERO is not set ++# CONFIG_DM_MULTIPATH is not set ++# CONFIG_DM_DELAY is not set ++# CONFIG_DM_UEVENT is not set ++CONFIG_NETDEVICES=y ++# CONFIG_DUMMY is not set ++# CONFIG_BONDING is not set ++# CONFIG_MACVLAN is not set ++# CONFIG_EQUALIZER is not set ++CONFIG_TUN=y ++# CONFIG_VETH is not set ++# CONFIG_PHYLIB is not set ++CONFIG_NET_ETHERNET=y ++CONFIG_MII=y ++# CONFIG_AX88796 is not set ++# CONFIG_SMC91X is not set ++# CONFIG_DM9000 is not set ++# CONFIG_ENC28J60 is not set ++# CONFIG_SMC911X is not set ++# CONFIG_IBM_NEW_EMAC_ZMII is not set ++# CONFIG_IBM_NEW_EMAC_RGMII is not set ++# CONFIG_IBM_NEW_EMAC_TAH is not set ++# CONFIG_IBM_NEW_EMAC_EMAC4 is not set ++# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set ++# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set ++# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set ++# CONFIG_B44 is not set ++# CONFIG_NETDEV_1000 is not set ++# CONFIG_NETDEV_10000 is not set ++ ++# ++# Wireless LAN ++# ++# CONFIG_WLAN_PRE80211 is not set ++# CONFIG_WLAN_80211 is not set ++# CONFIG_IWLWIFI_LEDS is not set ++ ++# ++# USB Network Adapters ++# ++CONFIG_USB_CATC=m ++CONFIG_USB_KAWETH=m ++CONFIG_USB_PEGASUS=m ++CONFIG_USB_RTL8150=m ++CONFIG_USB_USBNET=y ++CONFIG_USB_NET_AX8817X=m ++CONFIG_USB_NET_CDCETHER=y ++CONFIG_USB_NET_DM9601=m ++# CONFIG_USB_NET_SMSC95XX is not set ++CONFIG_USB_NET_GL620A=m ++CONFIG_USB_NET_NET1080=m ++CONFIG_USB_NET_PLUSB=m ++CONFIG_USB_NET_MCS7830=m ++CONFIG_USB_NET_RNDIS_HOST=y ++CONFIG_USB_NET_CDC_SUBSET=m ++CONFIG_USB_ALI_M5632=y ++CONFIG_USB_AN2720=y ++CONFIG_USB_BELKIN=y ++CONFIG_USB_ARMLINUX=y ++CONFIG_USB_EPSON2888=y ++CONFIG_USB_KC2190=y ++CONFIG_USB_NET_ZAURUS=m ++# CONFIG_USB_HSO is not set ++# CONFIG_WAN is not set ++CONFIG_PPP=y ++CONFIG_PPP_MULTILINK=y ++CONFIG_PPP_FILTER=y ++CONFIG_PPP_ASYNC=y ++CONFIG_PPP_SYNC_TTY=y ++CONFIG_PPP_DEFLATE=y ++CONFIG_PPP_BSDCOMP=y ++CONFIG_PPP_MPPE=y ++# CONFIG_PPPOE is not set ++# CONFIG_PPPOL2TP is not set ++# CONFIG_SLIP is not set ++CONFIG_SLHC=y ++# CONFIG_NETCONSOLE is not set ++# CONFIG_NETPOLL is not set ++# CONFIG_NET_POLL_CONTROLLER is not set ++# CONFIG_ISDN is not set ++ ++# ++# Input device support ++# ++CONFIG_INPUT=y ++# CONFIG_INPUT_FF_MEMLESS is not set ++# CONFIG_INPUT_POLLDEV is not set ++ ++# ++# Userland interfaces ++# ++CONFIG_INPUT_MOUSEDEV=y ++# CONFIG_INPUT_MOUSEDEV_PSAUX is not set ++CONFIG_INPUT_MOUSEDEV_SCREEN_X=480 ++CONFIG_INPUT_MOUSEDEV_SCREEN_Y=640 ++# CONFIG_INPUT_JOYDEV is not set ++CONFIG_INPUT_EVDEV=y ++# CONFIG_INPUT_EVBUG is not set ++ ++# ++# Input Device Drivers ++# ++CONFIG_INPUT_KEYBOARD=y ++# CONFIG_KEYBOARD_ATKBD is not set ++# CONFIG_KEYBOARD_SUNKBD is not set ++# CONFIG_KEYBOARD_LKKBD is not set ++# CONFIG_KEYBOARD_XTKBD is not set ++# CONFIG_KEYBOARD_NEWTON is not set ++CONFIG_KEYBOARD_STOWAWAY=m ++CONFIG_KEYBOARD_GPIO=m ++CONFIG_KEYBOARD_NEO1973=y ++CONFIG_KEYBOARD_QT2410=y ++CONFIG_INPUT_MOUSE=y ++# CONFIG_MOUSE_PS2 is not set ++# CONFIG_MOUSE_SERIAL is not set ++# CONFIG_MOUSE_APPLETOUCH is not set ++# CONFIG_MOUSE_BCM5974 is not set ++# CONFIG_MOUSE_VSXXXAA is not set ++# CONFIG_MOUSE_GPIO is not set ++# CONFIG_INPUT_JOYSTICK is not set ++# CONFIG_INPUT_TABLET is not set ++CONFIG_INPUT_TOUCHSCREEN=y ++CONFIG_TOUCHSCREEN_FILTER=y ++CONFIG_TOUCHSCREEN_FILTER_GROUP=y ++CONFIG_TOUCHSCREEN_FILTER_MEDIAN=y ++CONFIG_TOUCHSCREEN_FILTER_MEAN=y ++CONFIG_TOUCHSCREEN_FILTER_LINEAR=y ++# CONFIG_TOUCHSCREEN_ADS7846 is not set ++# CONFIG_TOUCHSCREEN_FUJITSU is not set ++CONFIG_TOUCHSCREEN_S3C2410=y ++# CONFIG_TOUCHSCREEN_S3C2410_DEBUG is not set ++# CONFIG_TOUCHSCREEN_GUNZE is not set ++# CONFIG_TOUCHSCREEN_ELO is not set ++# CONFIG_TOUCHSCREEN_MTOUCH is not set ++# CONFIG_TOUCHSCREEN_INEXIO is not set ++# CONFIG_TOUCHSCREEN_MK712 is not set ++# CONFIG_TOUCHSCREEN_PENMOUNT is not set ++# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set ++# CONFIG_TOUCHSCREEN_TOUCHWIN is not set ++# CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set ++# CONFIG_TOUCHSCREEN_TOUCHIT213 is not set ++# CONFIG_TOUCHSCREEN_PCAP7200 is not set ++CONFIG_INPUT_MISC=y ++# CONFIG_INPUT_ATI_REMOTE is not set ++# CONFIG_INPUT_ATI_REMOTE2 is not set ++# CONFIG_INPUT_KEYSPAN_REMOTE is not set ++# CONFIG_INPUT_POWERMATE is not set ++# CONFIG_INPUT_YEALINK is not set ++# CONFIG_INPUT_CM109 is not set ++CONFIG_INPUT_UINPUT=m ++CONFIG_INPUT_LIS302DL=y ++CONFIG_INPUT_PCF50633_PMU=y ++ ++# ++# Hardware I/O ports ++# ++CONFIG_SERIO=y ++# CONFIG_SERIO_SERPORT is not set ++# CONFIG_SERIO_RAW is not set ++# CONFIG_GAMEPORT is not set ++ ++# ++# Character devices ++# ++CONFIG_VT=y ++CONFIG_CONSOLE_TRANSLATIONS=y ++CONFIG_VT_CONSOLE=y ++CONFIG_NR_TTY_DEVICES=6 ++CONFIG_HW_CONSOLE=y ++CONFIG_VT_HW_CONSOLE_BINDING=y ++# CONFIG_DEVKMEM is not set ++# CONFIG_SERIAL_NONSTANDARD is not set ++ ++# ++# Serial drivers ++# ++# CONFIG_SERIAL_8250 is not set ++ ++# ++# Non-8250 serial port support ++# ++CONFIG_SERIAL_SAMSUNG=y ++CONFIG_SERIAL_SAMSUNG_UARTS=3 ++CONFIG_SERIAL_SAMSUNG_CONSOLE=y ++CONFIG_SERIAL_S3C2410=y ++CONFIG_SERIAL_S3C2440=y ++CONFIG_SERIAL_CORE=y ++CONFIG_SERIAL_CORE_CONSOLE=y ++CONFIG_UNIX98_PTYS=y ++# CONFIG_LEGACY_PTYS is not set ++# CONFIG_IPMI_HANDLER is not set ++# CONFIG_HW_RANDOM is not set ++# CONFIG_NVRAM is not set ++# CONFIG_R3964 is not set ++# CONFIG_RAW_DRIVER is not set ++# CONFIG_TCG_TPM is not set ++CONFIG_I2C=y ++CONFIG_I2C_BOARDINFO=y ++CONFIG_I2C_CHARDEV=y ++CONFIG_I2C_HELPER_AUTO=y ++ ++# ++# I2C Hardware Bus support ++# ++ ++# ++# I2C system bus drivers (mostly embedded / system-on-chip) ++# ++# CONFIG_I2C_GPIO is not set ++# CONFIG_I2C_OCORES is not set ++CONFIG_I2C_S3C2410=y ++# CONFIG_I2C_SIMTEC is not set ++ ++# ++# External I2C/SMBus adapter drivers ++# ++# CONFIG_I2C_PARPORT_LIGHT is not set ++# CONFIG_I2C_TAOS_EVM is not set ++# CONFIG_I2C_TINY_USB is not set ++ ++# ++# Other I2C/SMBus bus drivers ++# ++# CONFIG_I2C_PCA_PLATFORM is not set ++# CONFIG_I2C_STUB is not set ++ ++# ++# Miscellaneous I2C Chip support ++# ++# CONFIG_DS1682 is not set ++# CONFIG_AT24 is not set ++# CONFIG_SENSORS_EEPROM is not set ++# CONFIG_SENSORS_PCF50606 is not set ++# CONFIG_SENSORS_PCF50633 is not set ++# CONFIG_SENSORS_PCF8574 is not set ++# CONFIG_PCF8575 is not set ++# CONFIG_SENSORS_PCA9539 is not set ++# CONFIG_SENSORS_PCF8591 is not set ++# CONFIG_TPS65010 is not set ++# CONFIG_SENSORS_MAX6875 is not set ++# CONFIG_SENSORS_TSL2550 is not set ++# CONFIG_SENSORS_TSL256X is not set ++CONFIG_PCA9632=y ++# CONFIG_I2C_DEBUG_CORE is not set ++# CONFIG_I2C_DEBUG_ALGO is not set ++# CONFIG_I2C_DEBUG_BUS is not set ++# CONFIG_I2C_DEBUG_CHIP is not set ++CONFIG_SPI=y ++# CONFIG_SPI_DEBUG is not set ++CONFIG_SPI_MASTER=y ++ ++# ++# SPI Master Controller Drivers ++# ++CONFIG_SPI_BITBANG=y ++# CONFIG_SPI_S3C24XX is not set ++CONFIG_SPI_S3C24XX_GPIO=y ++ ++# ++# SPI Protocol Masters ++# ++# CONFIG_SPI_AT25 is not set ++# CONFIG_SPI_SPIDEV is not set ++# CONFIG_SPI_TLE62X0 is not set ++CONFIG_ARCH_REQUIRE_GPIOLIB=y ++CONFIG_GPIOLIB=y ++CONFIG_DEBUG_GPIO=y ++CONFIG_GPIO_SYSFS=y ++ ++# ++# I2C GPIO expanders: ++# ++# CONFIG_GPIO_MAX732X is not set ++# CONFIG_GPIO_PCA953X is not set ++# CONFIG_GPIO_PCF857X is not set ++ ++# ++# PCI GPIO expanders: ++# ++ ++# ++# SPI GPIO expanders: ++# ++# CONFIG_GPIO_MAX7301 is not set ++# CONFIG_GPIO_MCP23S08 is not set ++# CONFIG_W1 is not set ++CONFIG_POWER_SUPPLY=y ++CONFIG_POWER_SUPPLY_DEBUG=y ++CONFIG_PDA_POWER=y ++CONFIG_APM_POWER=y ++# CONFIG_BATTERY_DS2760 is not set ++# CONFIG_BATTERY_BQ27x00 is not set ++CONFIG_BATTERY_BQ27000_HDQ=y ++CONFIG_GTA02_HDQ=y ++CONFIG_CHARGER_PCF50633=y ++CONFIG_HWMON=y ++# CONFIG_HWMON_VID is not set ++# CONFIG_SENSORS_AD7414 is not set ++# CONFIG_SENSORS_AD7418 is not set ++# CONFIG_SENSORS_ADCXX is not set ++# CONFIG_SENSORS_ADM1021 is not set ++# CONFIG_SENSORS_ADM1025 is not set ++# CONFIG_SENSORS_ADM1026 is not set ++# CONFIG_SENSORS_ADM1029 is not set ++# CONFIG_SENSORS_ADM1031 is not set ++# CONFIG_SENSORS_ADM9240 is not set ++# CONFIG_SENSORS_ADT7470 is not set ++# CONFIG_SENSORS_ADT7473 is not set ++# CONFIG_SENSORS_ATXP1 is not set ++# CONFIG_SENSORS_DS1621 is not set ++# CONFIG_SENSORS_F71805F is not set ++# CONFIG_SENSORS_F71882FG is not set ++# CONFIG_SENSORS_F75375S is not set ++# CONFIG_SENSORS_GL518SM is not set ++# CONFIG_SENSORS_GL520SM is not set ++# CONFIG_SENSORS_IT87 is not set ++# CONFIG_SENSORS_LM63 is not set ++# CONFIG_SENSORS_LM70 is not set ++# CONFIG_SENSORS_LM75 is not set ++# CONFIG_SENSORS_LM77 is not set ++# CONFIG_SENSORS_LM78 is not set ++# CONFIG_SENSORS_LM80 is not set ++# CONFIG_SENSORS_LM83 is not set ++# CONFIG_SENSORS_LM85 is not set ++# CONFIG_SENSORS_LM87 is not set ++# CONFIG_SENSORS_LM90 is not set ++# CONFIG_SENSORS_LM92 is not set ++# CONFIG_SENSORS_LM93 is not set ++# CONFIG_SENSORS_MAX1111 is not set ++# CONFIG_SENSORS_MAX1619 is not set ++# CONFIG_SENSORS_MAX6650 is not set ++# CONFIG_SENSORS_PC87360 is not set ++# CONFIG_SENSORS_PC87427 is not set ++# CONFIG_SENSORS_DME1737 is not set ++# CONFIG_SENSORS_SMSC47M1 is not set ++# CONFIG_SENSORS_SMSC47M192 is not set ++# CONFIG_SENSORS_SMSC47B397 is not set ++# CONFIG_SENSORS_ADS7828 is not set ++# CONFIG_SENSORS_THMC50 is not set ++# CONFIG_SENSORS_VT1211 is not set ++# CONFIG_SENSORS_W83781D is not set ++# CONFIG_SENSORS_W83791D is not set ++# CONFIG_SENSORS_W83792D is not set ++# CONFIG_SENSORS_W83793 is not set ++# CONFIG_SENSORS_W83L785TS is not set ++# CONFIG_SENSORS_W83L786NG is not set ++# CONFIG_SENSORS_W83627HF is not set ++# CONFIG_SENSORS_W83627EHF is not set ++# CONFIG_HWMON_DEBUG_CHIP is not set ++# CONFIG_THERMAL is not set ++# CONFIG_THERMAL_HWMON is not set ++CONFIG_WATCHDOG=y ++# CONFIG_WATCHDOG_NOWAYOUT is not set ++ ++# ++# Watchdog Device Drivers ++# ++# CONFIG_SOFT_WATCHDOG is not set ++CONFIG_S3C2410_WATCHDOG=m ++ ++# ++# USB-based Watchdog Cards ++# ++# CONFIG_USBPCWATCHDOG is not set ++ ++# ++# Sonics Silicon Backplane ++# ++CONFIG_SSB_POSSIBLE=y ++# CONFIG_SSB is not set ++ ++# ++# Multifunction device drivers ++# ++# CONFIG_MFD_CORE is not set ++# CONFIG_MFD_SM501 is not set ++# CONFIG_MFD_ASIC3 is not set ++# CONFIG_HTC_EGPIO is not set ++# CONFIG_HTC_PASIC3 is not set ++# CONFIG_MFD_TMIO is not set ++# CONFIG_MFD_T7L66XB is not set ++# CONFIG_MFD_TC6387XB is not set ++# CONFIG_MFD_TC6393XB is not set ++# CONFIG_PMIC_DA903X is not set ++# CONFIG_MFD_WM8400 is not set ++# CONFIG_MFD_WM8350_I2C is not set ++CONFIG_MFD_PCF50633=y ++CONFIG_PCF50633_ADC=y ++CONFIG_PCF50633_GPIO=y ++# CONFIG_MFD_PCF50606 is not set ++CONFIG_MFD_GLAMO=y ++CONFIG_MFD_GLAMO_FB=y ++CONFIG_MFD_GLAMO_SPI_GPIO=y ++CONFIG_MFD_GLAMO_SPI_FB=y ++CONFIG_MFD_GLAMO_MCI=y ++ ++# ++# Multimedia devices ++# ++ ++# ++# Multimedia core support ++# ++# CONFIG_VIDEO_DEV is not set ++# CONFIG_DVB_CORE is not set ++# CONFIG_VIDEO_MEDIA is not set ++ ++# ++# Multimedia drivers ++# ++CONFIG_DAB=y ++# CONFIG_USB_DABUSB is not set ++ ++# ++# Graphics support ++# ++# CONFIG_VGASTATE is not set ++CONFIG_VIDEO_OUTPUT_CONTROL=y ++CONFIG_FB=y ++# CONFIG_FIRMWARE_EDID is not set ++# CONFIG_FB_DDC is not set ++# CONFIG_FB_BOOT_VESA_SUPPORT is not set ++CONFIG_FB_CFB_FILLRECT=y ++CONFIG_FB_CFB_COPYAREA=y ++CONFIG_FB_CFB_IMAGEBLIT=y ++# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set ++# CONFIG_FB_SYS_FILLRECT is not set ++# CONFIG_FB_SYS_COPYAREA is not set ++# CONFIG_FB_SYS_IMAGEBLIT is not set ++# CONFIG_FB_FOREIGN_ENDIAN is not set ++# CONFIG_FB_SYS_FOPS is not set ++# CONFIG_FB_SVGALIB is not set ++# CONFIG_FB_MACMODES is not set ++# CONFIG_FB_BACKLIGHT is not set ++# CONFIG_FB_MODE_HELPERS is not set ++# CONFIG_FB_TILEBLITTING is not set ++ ++# ++# Frame buffer hardware drivers ++# ++# CONFIG_FB_UVESA is not set ++# CONFIG_FB_S1D13XXX is not set ++CONFIG_FB_S3C2410=y ++# CONFIG_FB_S3C2410_DEBUG is not set ++# CONFIG_FB_VIRTUAL is not set ++# CONFIG_FB_METRONOME is not set ++# CONFIG_FB_MB862XX is not set ++CONFIG_BACKLIGHT_LCD_SUPPORT=y ++CONFIG_LCD_CLASS_DEVICE=y ++CONFIG_LCD_LTV350QV=y ++# CONFIG_LCD_ILI9320 is not set ++# CONFIG_LCD_TDO24M is not set ++# CONFIG_LCD_VGG2432A4 is not set ++# CONFIG_LCD_PLATFORM is not set ++CONFIG_BACKLIGHT_CLASS_DEVICE=y ++CONFIG_BACKLIGHT_CORGI=y ++# CONFIG_BACKLIGHT_PWM is not set ++ ++# ++# Display device support ++# ++CONFIG_DISPLAY_SUPPORT=y ++ ++# ++# Display hardware drivers ++# ++CONFIG_DISPLAY_JBT6K74=y ++ ++# ++# Console display driver support ++# ++# CONFIG_VGA_CONSOLE is not set ++CONFIG_DUMMY_CONSOLE=y ++CONFIG_FRAMEBUFFER_CONSOLE=y ++# CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set ++# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set ++CONFIG_FONTS=y ++# CONFIG_FONT_8x8 is not set ++# CONFIG_FONT_8x16 is not set ++CONFIG_FONT_6x11=y ++# CONFIG_FONT_7x14 is not set ++# CONFIG_FONT_PEARL_8x8 is not set ++# CONFIG_FONT_ACORN_8x8 is not set ++# CONFIG_FONT_MINI_4x6 is not set ++# CONFIG_FONT_SUN8x16 is not set ++# CONFIG_FONT_SUN12x22 is not set ++# CONFIG_FONT_10x18 is not set ++# CONFIG_LOGO is not set ++CONFIG_SOUND=y ++CONFIG_SOUND_OSS_CORE=y ++CONFIG_SND=y ++CONFIG_SND_TIMER=y ++CONFIG_SND_PCM=y ++CONFIG_SND_HWDEP=m ++CONFIG_SND_RAWMIDI=m ++# CONFIG_SND_SEQUENCER is not set ++CONFIG_SND_OSSEMUL=y ++CONFIG_SND_MIXER_OSS=y ++CONFIG_SND_PCM_OSS=y ++CONFIG_SND_PCM_OSS_PLUGINS=y ++# CONFIG_SND_DYNAMIC_MINORS is not set ++CONFIG_SND_SUPPORT_OLD_API=y ++CONFIG_SND_VERBOSE_PROCFS=y ++# CONFIG_SND_VERBOSE_PRINTK is not set ++CONFIG_SND_DEBUG=y ++# CONFIG_SND_DEBUG_VERBOSE is not set ++CONFIG_SND_PCM_XRUN_DEBUG=y ++CONFIG_SND_DRIVERS=y ++# CONFIG_SND_DUMMY is not set ++# CONFIG_SND_MTPAV is not set ++# CONFIG_SND_SERIAL_U16550 is not set ++# CONFIG_SND_MPU401 is not set ++CONFIG_SND_ARM=y ++# CONFIG_SND_SPI is not set ++CONFIG_SND_USB=y ++CONFIG_SND_USB_AUDIO=m ++# CONFIG_SND_USB_CAIAQ is not set ++CONFIG_SND_SOC=y ++CONFIG_SND_S3C24XX_SOC=y ++CONFIG_SND_S3C24XX_SOC_I2S=y ++CONFIG_SND_S3C24XX_SOC_NEO1973_GTA02_WM8753=y ++# CONFIG_SND_S3C24XX_SOC_LN2440SBC_ALC650 is not set ++# CONFIG_SND_SOC_ALL_CODECS is not set ++CONFIG_SND_SOC_WM8753=y ++# CONFIG_SOUND_PRIME is not set ++CONFIG_HID_SUPPORT=y ++CONFIG_HID=y ++# CONFIG_HID_DEBUG is not set ++# CONFIG_HIDRAW is not set ++ ++# ++# USB Input Devices ++# ++CONFIG_USB_HID=y ++CONFIG_HID_PID=y ++# CONFIG_USB_HIDDEV is not set ++ ++# ++# Special HID drivers ++# ++CONFIG_HID_COMPAT=y ++CONFIG_HID_A4TECH=y ++CONFIG_HID_APPLE=y ++CONFIG_HID_BELKIN=y ++CONFIG_HID_BRIGHT=y ++CONFIG_HID_CHERRY=y ++CONFIG_HID_CHICONY=y ++CONFIG_HID_CYPRESS=y ++CONFIG_HID_DELL=y ++CONFIG_HID_EZKEY=y ++CONFIG_HID_GYRATION=y ++CONFIG_HID_LOGITECH=y ++# CONFIG_LOGITECH_FF is not set ++# CONFIG_LOGIRUMBLEPAD2_FF is not set ++CONFIG_HID_MICROSOFT=y ++CONFIG_HID_MONTEREY=y ++CONFIG_HID_PANTHERLORD=y ++# CONFIG_PANTHERLORD_FF is not set ++CONFIG_HID_PETALYNX=y ++CONFIG_HID_SAMSUNG=y ++CONFIG_HID_SONY=y ++CONFIG_HID_SUNPLUS=y ++# CONFIG_THRUSTMASTER_FF is not set ++# CONFIG_ZEROPLUS_FF is not set ++CONFIG_USB_SUPPORT=y ++CONFIG_USB_ARCH_HAS_HCD=y ++CONFIG_USB_ARCH_HAS_OHCI=y ++# CONFIG_USB_ARCH_HAS_EHCI is not set ++CONFIG_USB=y ++# CONFIG_USB_DEBUG is not set ++CONFIG_USB_ANNOUNCE_NEW_DEVICES=y ++ ++# ++# Miscellaneous USB options ++# ++CONFIG_USB_DEVICEFS=y ++CONFIG_USB_DEVICE_CLASS=y ++# CONFIG_USB_DYNAMIC_MINORS is not set ++CONFIG_USB_SUSPEND=y ++# CONFIG_USB_OTG is not set ++CONFIG_USB_MON=y ++# CONFIG_USB_WUSB is not set ++# CONFIG_USB_WUSB_CBAF is not set ++ ++# ++# USB Host Controller Drivers ++# ++# CONFIG_USB_C67X00_HCD is not set ++# CONFIG_USB_ISP116X_HCD is not set ++# CONFIG_USB_ISP1760_HCD is not set ++CONFIG_USB_OHCI_HCD=y ++# CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set ++# CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set ++CONFIG_USB_OHCI_LITTLE_ENDIAN=y ++# CONFIG_USB_SL811_HCD is not set ++# CONFIG_USB_R8A66597_HCD is not set ++# CONFIG_USB_HWA_HCD is not set ++# CONFIG_USB_MUSB_HDRC is not set ++# CONFIG_USB_GADGET_MUSB_HDRC is not set ++ ++# ++# USB Device Class drivers ++# ++CONFIG_USB_ACM=y ++CONFIG_USB_PRINTER=m ++# CONFIG_USB_WDM is not set ++CONFIG_USB_TMC=m ++ ++# ++# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' ++# ++ ++# ++# may also be needed; see USB_STORAGE Help for more information ++# ++CONFIG_USB_STORAGE=y ++# CONFIG_USB_STORAGE_DEBUG is not set ++CONFIG_USB_STORAGE_DATAFAB=y ++CONFIG_USB_STORAGE_FREECOM=y ++# CONFIG_USB_STORAGE_ISD200 is not set ++CONFIG_USB_STORAGE_DPCM=y ++CONFIG_USB_STORAGE_USBAT=y ++CONFIG_USB_STORAGE_SDDR09=y ++CONFIG_USB_STORAGE_SDDR55=y ++CONFIG_USB_STORAGE_JUMPSHOT=y ++CONFIG_USB_STORAGE_ALAUDA=y ++# CONFIG_USB_STORAGE_ONETOUCH is not set ++CONFIG_USB_STORAGE_KARMA=y ++# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set ++CONFIG_USB_LIBUSUAL=y ++ ++# ++# USB Imaging devices ++# ++# CONFIG_USB_MDC800 is not set ++# CONFIG_USB_MICROTEK is not set ++ ++# ++# USB port drivers ++# ++CONFIG_USB_SERIAL=y ++CONFIG_USB_SERIAL_CONSOLE=y ++CONFIG_USB_EZUSB=y ++CONFIG_USB_SERIAL_GENERIC=y ++CONFIG_USB_SERIAL_AIRCABLE=m ++CONFIG_USB_SERIAL_ARK3116=m ++CONFIG_USB_SERIAL_BELKIN=m ++# CONFIG_USB_SERIAL_CH341 is not set ++CONFIG_USB_SERIAL_WHITEHEAT=m ++CONFIG_USB_SERIAL_DIGI_ACCELEPORT=m ++CONFIG_USB_SERIAL_CP2101=m ++CONFIG_USB_SERIAL_CYPRESS_M8=m ++CONFIG_USB_SERIAL_EMPEG=m ++CONFIG_USB_SERIAL_FTDI_SIO=m ++CONFIG_USB_SERIAL_FUNSOFT=m ++CONFIG_USB_SERIAL_VISOR=m ++CONFIG_USB_SERIAL_IPAQ=m ++CONFIG_USB_SERIAL_IR=m ++CONFIG_USB_SERIAL_EDGEPORT=m ++CONFIG_USB_SERIAL_EDGEPORT_TI=m ++CONFIG_USB_SERIAL_GARMIN=m ++CONFIG_USB_SERIAL_IPW=m ++# CONFIG_USB_SERIAL_IUU is not set ++CONFIG_USB_SERIAL_KEYSPAN_PDA=m ++CONFIG_USB_SERIAL_KEYSPAN=m ++CONFIG_USB_SERIAL_KLSI=m ++CONFIG_USB_SERIAL_KOBIL_SCT=m ++CONFIG_USB_SERIAL_MCT_U232=m ++CONFIG_USB_SERIAL_MOS7720=m ++CONFIG_USB_SERIAL_MOS7840=m ++# CONFIG_USB_SERIAL_MOTOROLA is not set ++CONFIG_USB_SERIAL_NAVMAN=m ++CONFIG_USB_SERIAL_PL2303=m ++# CONFIG_USB_SERIAL_OTI6858 is not set ++# CONFIG_USB_SERIAL_SPCP8X5 is not set ++CONFIG_USB_SERIAL_HP4X=m ++CONFIG_USB_SERIAL_SAFE=m ++CONFIG_USB_SERIAL_SAFE_PADDED=y ++CONFIG_USB_SERIAL_SIERRAWIRELESS=m ++CONFIG_USB_SERIAL_TI=m ++CONFIG_USB_SERIAL_CYBERJACK=m ++CONFIG_USB_SERIAL_XIRCOM=m ++CONFIG_USB_SERIAL_OPTION=y ++CONFIG_USB_SERIAL_OMNINET=m ++# CONFIG_USB_SERIAL_DEBUG is not set ++ ++# ++# USB Miscellaneous drivers ++# ++# CONFIG_USB_EMI62 is not set ++# CONFIG_USB_EMI26 is not set ++# CONFIG_USB_ADUTUX is not set ++# CONFIG_USB_SEVSEG is not set ++# CONFIG_USB_RIO500 is not set ++# CONFIG_USB_LEGOTOWER is not set ++# CONFIG_USB_LCD is not set ++CONFIG_USB_BERRY_CHARGE=m ++# CONFIG_USB_LED is not set ++# CONFIG_USB_CYPRESS_CY7C63 is not set ++# CONFIG_USB_CYTHERM is not set ++# CONFIG_USB_PHIDGET is not set ++# CONFIG_USB_IDMOUSE is not set ++# CONFIG_USB_FTDI_ELAN is not set ++# CONFIG_USB_APPLEDISPLAY is not set ++# CONFIG_USB_LD is not set ++CONFIG_USB_TRANCEVIBRATOR=m ++CONFIG_USB_IOWARRIOR=m ++# CONFIG_USB_TEST is not set ++# CONFIG_USB_ISIGHTFW is not set ++# CONFIG_USB_VST is not set ++CONFIG_USB_GADGET=y ++# CONFIG_USB_GADGET_DEBUG is not set ++# CONFIG_USB_GADGET_DEBUG_FILES is not set ++# CONFIG_USB_GADGET_DEBUG_FS is not set ++CONFIG_USB_GADGET_VBUS_DRAW=500 ++CONFIG_USB_GADGET_SELECTED=y ++# CONFIG_USB_GADGET_AT91 is not set ++# CONFIG_USB_GADGET_ATMEL_USBA is not set ++# CONFIG_USB_GADGET_FSL_USB2 is not set ++# CONFIG_USB_GADGET_LH7A40X is not set ++# CONFIG_USB_GADGET_OMAP is not set ++# CONFIG_USB_GADGET_PXA25X is not set ++# CONFIG_USB_GADGET_PXA27X is not set ++CONFIG_USB_GADGET_S3C2410=y ++CONFIG_USB_S3C2410=y ++CONFIG_USB_S3C2410_DEBUG=y ++# CONFIG_USB_GADGET_M66592 is not set ++# CONFIG_USB_GADGET_AMD5536UDC is not set ++# CONFIG_USB_GADGET_FSL_QE is not set ++# CONFIG_USB_GADGET_NET2280 is not set ++# CONFIG_USB_GADGET_GOKU is not set ++# CONFIG_USB_GADGET_DUMMY_HCD is not set ++# CONFIG_USB_GADGET_DUALSPEED is not set ++# CONFIG_USB_ZERO is not set ++CONFIG_USB_ETH=y ++CONFIG_USB_ETH_RNDIS=y ++# CONFIG_USB_GADGETFS is not set ++# CONFIG_USB_FILE_STORAGE is not set ++# CONFIG_USB_G_SERIAL is not set ++# CONFIG_USB_MIDI_GADGET is not set ++# CONFIG_USB_G_PRINTER is not set ++# CONFIG_USB_CDC_COMPOSITE is not set ++CONFIG_AR6000_WLAN=y ++CONFIG_MMC=y ++# CONFIG_MMC_DEBUG is not set ++CONFIG_MMC_UNSAFE_RESUME=y ++ ++# ++# MMC/SD/SDIO Card Drivers ++# ++CONFIG_MMC_BLOCK=y ++CONFIG_MMC_BLOCK_BOUNCE=y ++# CONFIG_SDIO_UART is not set ++# CONFIG_MMC_TEST is not set ++ ++# ++# MMC/SD/SDIO Host Controller Drivers ++# ++CONFIG_MMC_SDHCI=y ++CONFIG_MMC_SDHCI_S3C=y ++# CONFIG_MMC_SPI is not set ++CONFIG_MMC_S3C=y ++# CONFIG_MEMSTICK is not set ++# CONFIG_ACCESSIBILITY is not set ++CONFIG_NEW_LEDS=y ++CONFIG_LEDS_CLASS=y ++ ++# ++# LED drivers ++# ++CONFIG_LEDS_S3C24XX=m ++# CONFIG_LEDS_PCA9532 is not set ++CONFIG_LEDS_GPIO=y ++# CONFIG_LEDS_PCA955X is not set ++CONFIG_LEDS_NEO1973_VIBRATOR=y ++CONFIG_LEDS_NEO1973_GTA02=y ++ ++# ++# LED Triggers ++# ++CONFIG_LEDS_TRIGGERS=y ++CONFIG_LEDS_TRIGGER_TIMER=y ++# CONFIG_LEDS_TRIGGER_HEARTBEAT is not set ++CONFIG_LEDS_TRIGGER_BACKLIGHT=y ++# CONFIG_LEDS_TRIGGER_DEFAULT_ON is not set ++CONFIG_RTC_LIB=y ++CONFIG_RTC_CLASS=y ++CONFIG_RTC_HCTOSYS=y ++CONFIG_RTC_HCTOSYS_DEVICE="rtc0" ++CONFIG_RTC_DEBUG=y ++ ++# ++# RTC interfaces ++# ++CONFIG_RTC_INTF_SYSFS=y ++CONFIG_RTC_INTF_PROC=y ++CONFIG_RTC_INTF_DEV=y ++# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set ++# CONFIG_RTC_DRV_TEST is not set ++ ++# ++# I2C RTC drivers ++# ++# CONFIG_RTC_DRV_DS1307 is not set ++# CONFIG_RTC_DRV_DS1374 is not set ++# CONFIG_RTC_DRV_DS1672 is not set ++# CONFIG_RTC_DRV_MAX6900 is not set ++# CONFIG_RTC_DRV_RS5C372 is not set ++# CONFIG_RTC_DRV_ISL1208 is not set ++# CONFIG_RTC_DRV_X1205 is not set ++# CONFIG_RTC_DRV_PCF8563 is not set ++# CONFIG_RTC_DRV_PCF8583 is not set ++CONFIG_RTC_DRV_PCF50633=y ++# CONFIG_RTC_DRV_PCF50606 is not set ++# CONFIG_RTC_DRV_M41T80 is not set ++# CONFIG_RTC_DRV_S35390A is not set ++# CONFIG_RTC_DRV_FM3130 is not set ++ ++# ++# SPI RTC drivers ++# ++# CONFIG_RTC_DRV_M41T94 is not set ++# CONFIG_RTC_DRV_DS1305 is not set ++# CONFIG_RTC_DRV_MAX6902 is not set ++# CONFIG_RTC_DRV_R9701 is not set ++# CONFIG_RTC_DRV_RS5C348 is not set ++# CONFIG_RTC_DRV_DS3234 is not set ++ ++# ++# Platform RTC drivers ++# ++# CONFIG_RTC_DRV_CMOS is not set ++# CONFIG_RTC_DRV_DS1286 is not set ++# CONFIG_RTC_DRV_DS1511 is not set ++# CONFIG_RTC_DRV_DS1553 is not set ++# CONFIG_RTC_DRV_DS1742 is not set ++# CONFIG_RTC_DRV_STK17TA8 is not set ++# CONFIG_RTC_DRV_M48T86 is not set ++# CONFIG_RTC_DRV_M48T35 is not set ++# CONFIG_RTC_DRV_M48T59 is not set ++# CONFIG_RTC_DRV_BQ4802 is not set ++# CONFIG_RTC_DRV_V3020 is not set ++ ++# ++# on-CPU RTC drivers ++# ++CONFIG_RTC_DRV_S3C=m ++CONFIG_DMADEVICES=y ++ ++# ++# DMA Devices ++# ++ ++# ++# Android ++# ++CONFIG_ANDROID_BINDER_IPC=y ++CONFIG_ANDROID_POWER=y ++CONFIG_ANDROID_POWER_STAT=y ++CONFIG_ANDROID_POWER_ALARM=y ++CONFIG_ANDROID_LOGGER=y ++# CONFIG_ANDROID_RAM_CONSOLE is not set ++# CONFIG_ANDROID_TIMED_GPIO is not set ++# CONFIG_ANDROID_PARANOID_NETWORK is not set ++CONFIG_REGULATOR=y ++CONFIG_REGULATOR_DEBUG=y ++# CONFIG_REGULATOR_FIXED_VOLTAGE is not set ++# CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set ++# CONFIG_REGULATOR_BQ24022 is not set ++CONFIG_REGULATOR_PCF50633=y ++CONFIG_UIO=y ++CONFIG_UIO_PDRV=y ++# CONFIG_UIO_PDRV_GENIRQ is not set ++# CONFIG_UIO_SMX is not set ++# CONFIG_UIO_SERCOS3 is not set ++ ++# ++# File systems ++# ++CONFIG_EXT2_FS=y ++# CONFIG_EXT2_FS_XATTR is not set ++# CONFIG_EXT2_FS_XIP is not set ++CONFIG_EXT3_FS=y ++# CONFIG_EXT3_FS_XATTR is not set ++CONFIG_EXT4_FS=y ++CONFIG_EXT4DEV_COMPAT=y ++CONFIG_EXT4_FS_XATTR=y ++# CONFIG_EXT4_FS_POSIX_ACL is not set ++CONFIG_EXT4_FS_SECURITY=y ++CONFIG_JBD=y ++# CONFIG_JBD_DEBUG is not set ++CONFIG_JBD2=y ++# CONFIG_JBD2_DEBUG is not set ++CONFIG_FS_MBCACHE=y ++# CONFIG_REISERFS_FS is not set ++# CONFIG_JFS_FS is not set ++CONFIG_FS_POSIX_ACL=y ++CONFIG_FILE_LOCKING=y ++# CONFIG_XFS_FS is not set ++# CONFIG_OCFS2_FS is not set ++CONFIG_DNOTIFY=y ++CONFIG_INOTIFY=y ++CONFIG_INOTIFY_USER=y ++# CONFIG_QUOTA is not set ++# CONFIG_AUTOFS_FS is not set ++# CONFIG_AUTOFS4_FS is not set ++CONFIG_FUSE_FS=m ++ ++# ++# CD-ROM/DVD Filesystems ++# ++CONFIG_ISO9660_FS=m ++CONFIG_JOLIET=y ++# CONFIG_ZISOFS is not set ++# CONFIG_UDF_FS is not set ++ ++# ++# DOS/FAT/NT Filesystems ++# ++CONFIG_FAT_FS=y ++CONFIG_MSDOS_FS=y ++CONFIG_VFAT_FS=y ++CONFIG_FAT_DEFAULT_CODEPAGE=437 ++CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" ++# CONFIG_NTFS_FS is not set ++ ++# ++# Pseudo filesystems ++# ++CONFIG_PROC_FS=y ++CONFIG_PROC_SYSCTL=y ++CONFIG_PROC_PAGE_MONITOR=y ++CONFIG_SYSFS=y ++CONFIG_TMPFS=y ++# CONFIG_TMPFS_POSIX_ACL is not set ++# CONFIG_HUGETLB_PAGE is not set ++CONFIG_CONFIGFS_FS=m ++ ++# ++# Miscellaneous filesystems ++# ++# CONFIG_ADFS_FS is not set ++# CONFIG_AFFS_FS is not set ++# CONFIG_HFS_FS is not set ++# CONFIG_HFSPLUS_FS is not set ++# CONFIG_BEFS_FS is not set ++# CONFIG_BFS_FS is not set ++# CONFIG_EFS_FS is not set ++CONFIG_JFFS2_FS=y ++CONFIG_JFFS2_FS_DEBUG=0 ++CONFIG_JFFS2_FS_WRITEBUFFER=y ++# CONFIG_JFFS2_FS_WBUF_VERIFY is not set ++CONFIG_JFFS2_SUMMARY=y ++# CONFIG_JFFS2_FS_XATTR is not set ++# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set ++CONFIG_JFFS2_ZLIB=y ++# CONFIG_JFFS2_LZO is not set ++CONFIG_JFFS2_RTIME=y ++# CONFIG_JFFS2_RUBIN is not set ++CONFIG_CRAMFS=y ++# CONFIG_VXFS_FS is not set ++# CONFIG_MINIX_FS is not set ++# CONFIG_OMFS_FS is not set ++# CONFIG_HPFS_FS is not set ++# CONFIG_QNX4FS_FS is not set ++CONFIG_ROMFS_FS=y ++# CONFIG_SYSV_FS is not set ++# CONFIG_UFS_FS is not set ++CONFIG_NETWORK_FILESYSTEMS=y ++# CONFIG_NFS_FS is not set ++CONFIG_NFSD=y ++CONFIG_NFSD_V2_ACL=y ++CONFIG_NFSD_V3=y ++CONFIG_NFSD_V3_ACL=y ++# CONFIG_NFSD_V4 is not set ++CONFIG_LOCKD=y ++CONFIG_LOCKD_V4=y ++CONFIG_EXPORTFS=y ++CONFIG_NFS_ACL_SUPPORT=y ++CONFIG_NFS_COMMON=y ++CONFIG_SUNRPC=y ++# CONFIG_SUNRPC_REGISTER_V4 is not set ++# CONFIG_RPCSEC_GSS_KRB5 is not set ++# CONFIG_RPCSEC_GSS_SPKM3 is not set ++# CONFIG_SMB_FS is not set ++CONFIG_CIFS=m ++# CONFIG_CIFS_STATS is not set ++# CONFIG_CIFS_WEAK_PW_HASH is not set ++# CONFIG_CIFS_XATTR is not set ++# CONFIG_CIFS_DEBUG2 is not set ++# CONFIG_CIFS_EXPERIMENTAL is not set ++# CONFIG_NCP_FS is not set ++# CONFIG_CODA_FS is not set ++# CONFIG_AFS_FS is not set ++ ++# ++# Partition Types ++# ++CONFIG_PARTITION_ADVANCED=y ++# CONFIG_ACORN_PARTITION is not set ++# CONFIG_OSF_PARTITION is not set ++# CONFIG_AMIGA_PARTITION is not set ++# CONFIG_ATARI_PARTITION is not set ++# CONFIG_MAC_PARTITION is not set ++CONFIG_MSDOS_PARTITION=y ++# CONFIG_BSD_DISKLABEL is not set ++# CONFIG_MINIX_SUBPARTITION is not set ++# CONFIG_SOLARIS_X86_PARTITION is not set ++# CONFIG_UNIXWARE_DISKLABEL is not set ++# CONFIG_LDM_PARTITION is not set ++# CONFIG_SGI_PARTITION is not set ++# CONFIG_ULTRIX_PARTITION is not set ++# CONFIG_SUN_PARTITION is not set ++# CONFIG_KARMA_PARTITION is not set ++# CONFIG_EFI_PARTITION is not set ++# CONFIG_SYSV68_PARTITION is not set ++CONFIG_NLS=y ++CONFIG_NLS_DEFAULT="iso8859-1" ++CONFIG_NLS_CODEPAGE_437=y ++# CONFIG_NLS_CODEPAGE_737 is not set ++# CONFIG_NLS_CODEPAGE_775 is not set ++CONFIG_NLS_CODEPAGE_850=m ++# CONFIG_NLS_CODEPAGE_852 is not set ++# CONFIG_NLS_CODEPAGE_855 is not set ++# CONFIG_NLS_CODEPAGE_857 is not set ++# CONFIG_NLS_CODEPAGE_860 is not set ++# CONFIG_NLS_CODEPAGE_861 is not set ++# CONFIG_NLS_CODEPAGE_862 is not set ++# CONFIG_NLS_CODEPAGE_863 is not set ++# CONFIG_NLS_CODEPAGE_864 is not set ++# CONFIG_NLS_CODEPAGE_865 is not set ++# CONFIG_NLS_CODEPAGE_866 is not set ++# CONFIG_NLS_CODEPAGE_869 is not set ++CONFIG_NLS_CODEPAGE_936=m ++CONFIG_NLS_CODEPAGE_950=m ++# CONFIG_NLS_CODEPAGE_932 is not set ++# CONFIG_NLS_CODEPAGE_949 is not set ++# CONFIG_NLS_CODEPAGE_874 is not set ++# CONFIG_NLS_ISO8859_8 is not set ++# CONFIG_NLS_CODEPAGE_1250 is not set ++# CONFIG_NLS_CODEPAGE_1251 is not set ++# CONFIG_NLS_ASCII is not set ++CONFIG_NLS_ISO8859_1=y ++# CONFIG_NLS_ISO8859_2 is not set ++# CONFIG_NLS_ISO8859_3 is not set ++# CONFIG_NLS_ISO8859_4 is not set ++# CONFIG_NLS_ISO8859_5 is not set ++# CONFIG_NLS_ISO8859_6 is not set ++# CONFIG_NLS_ISO8859_7 is not set ++# CONFIG_NLS_ISO8859_9 is not set ++# CONFIG_NLS_ISO8859_13 is not set ++# CONFIG_NLS_ISO8859_14 is not set ++# CONFIG_NLS_ISO8859_15 is not set ++# CONFIG_NLS_KOI8_R is not set ++# CONFIG_NLS_KOI8_U is not set ++CONFIG_NLS_UTF8=m ++# CONFIG_DLM is not set ++ ++# ++# Kernel hacking ++# ++CONFIG_PRINTK_TIME=y ++CONFIG_ENABLE_WARN_DEPRECATED=y ++CONFIG_ENABLE_MUST_CHECK=y ++CONFIG_FRAME_WARN=1024 ++CONFIG_MAGIC_SYSRQ=y ++# CONFIG_UNUSED_SYMBOLS is not set ++CONFIG_DEBUG_FS=y ++# CONFIG_HEADERS_CHECK is not set ++CONFIG_DEBUG_KERNEL=y ++CONFIG_DEBUG_SHIRQ=y ++CONFIG_DETECT_SOFTLOCKUP=y ++CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC=y ++CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=1 ++CONFIG_SCHED_DEBUG=y ++CONFIG_SCHEDSTATS=y ++CONFIG_TIMER_STATS=y ++# CONFIG_DEBUG_OBJECTS is not set ++# CONFIG_DEBUG_SLAB is not set ++CONFIG_DEBUG_PREEMPT=y ++# CONFIG_DEBUG_RT_MUTEXES is not set ++# CONFIG_RT_MUTEX_TESTER is not set ++CONFIG_DEBUG_SPINLOCK=y ++CONFIG_DEBUG_MUTEXES=y ++CONFIG_DEBUG_LOCK_ALLOC=y ++# CONFIG_PROVE_LOCKING is not set ++CONFIG_LOCKDEP=y ++CONFIG_LOCK_STAT=y ++CONFIG_DEBUG_LOCKDEP=y ++CONFIG_DEBUG_SPINLOCK_SLEEP=y ++# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set ++CONFIG_STACKTRACE=y ++# CONFIG_DEBUG_KOBJECT is not set ++CONFIG_DEBUG_BUGVERBOSE=y ++CONFIG_DEBUG_INFO=y ++# CONFIG_DEBUG_VM is not set ++# CONFIG_DEBUG_WRITECOUNT is not set ++CONFIG_DEBUG_MEMORY_INIT=y ++# CONFIG_DEBUG_LIST is not set ++CONFIG_DEBUG_SG=y ++CONFIG_FRAME_POINTER=y ++# CONFIG_BOOT_PRINTK_DELAY is not set ++# CONFIG_RCU_TORTURE_TEST is not set ++CONFIG_RCU_CPU_STALL_DETECTOR=y ++# CONFIG_BACKTRACE_SELF_TEST is not set ++# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set ++# CONFIG_FAULT_INJECTION is not set ++CONFIG_LATENCYTOP=y ++CONFIG_SYSCTL_SYSCALL_CHECK=y ++CONFIG_HAVE_FUNCTION_TRACER=y ++ ++# ++# Tracers ++# ++# CONFIG_FUNCTION_TRACER is not set ++# CONFIG_SCHED_TRACER is not set ++# CONFIG_CONTEXT_SWITCH_TRACER is not set ++# CONFIG_BOOT_TRACER is not set ++# CONFIG_STACK_TRACER is not set ++CONFIG_DYNAMIC_PRINTK_DEBUG=y ++# CONFIG_SAMPLES is not set ++CONFIG_HAVE_ARCH_KGDB=y ++# CONFIG_KGDB is not set ++# CONFIG_DEBUG_USER is not set ++CONFIG_DEBUG_ERRORS=y ++# CONFIG_DEBUG_STACK_USAGE is not set ++# CONFIG_DEBUG_LL is not set ++CONFIG_DEBUG_S3C_UART=2 ++ ++# ++# Security options ++# ++# CONFIG_KEYS is not set ++# CONFIG_SECURITY is not set ++CONFIG_SECURITYFS=y ++# CONFIG_SECURITY_FILE_CAPABILITIES is not set ++CONFIG_CRYPTO=y ++ ++# ++# Crypto core or helper ++# ++CONFIG_CRYPTO_FIPS=y ++CONFIG_CRYPTO_ALGAPI=y ++CONFIG_CRYPTO_AEAD=y ++CONFIG_CRYPTO_BLKCIPHER=y ++CONFIG_CRYPTO_HASH=y ++CONFIG_CRYPTO_RNG=y ++CONFIG_CRYPTO_MANAGER=y ++CONFIG_CRYPTO_GF128MUL=m ++CONFIG_CRYPTO_NULL=m ++# CONFIG_CRYPTO_CRYPTD is not set ++CONFIG_CRYPTO_AUTHENC=m ++CONFIG_CRYPTO_TEST=m ++ ++# ++# Authenticated Encryption with Associated Data ++# ++# CONFIG_CRYPTO_CCM is not set ++# CONFIG_CRYPTO_GCM is not set ++# CONFIG_CRYPTO_SEQIV is not set ++ ++# ++# Block modes ++# ++CONFIG_CRYPTO_CBC=y ++# CONFIG_CRYPTO_CTR is not set ++# CONFIG_CRYPTO_CTS is not set ++CONFIG_CRYPTO_ECB=y ++CONFIG_CRYPTO_LRW=m ++CONFIG_CRYPTO_PCBC=m ++# CONFIG_CRYPTO_XTS is not set ++ ++# ++# Hash modes ++# ++CONFIG_CRYPTO_HMAC=y ++CONFIG_CRYPTO_XCBC=m ++ ++# ++# Digest ++# ++CONFIG_CRYPTO_CRC32C=m ++CONFIG_CRYPTO_MD4=m ++CONFIG_CRYPTO_MD5=y ++CONFIG_CRYPTO_MICHAEL_MIC=m ++# CONFIG_CRYPTO_RMD128 is not set ++# CONFIG_CRYPTO_RMD160 is not set ++# CONFIG_CRYPTO_RMD256 is not set ++# CONFIG_CRYPTO_RMD320 is not set ++CONFIG_CRYPTO_SHA1=y ++CONFIG_CRYPTO_SHA256=m ++CONFIG_CRYPTO_SHA512=m ++CONFIG_CRYPTO_TGR192=m ++CONFIG_CRYPTO_WP512=m ++ ++# ++# Ciphers ++# ++CONFIG_CRYPTO_AES=y ++CONFIG_CRYPTO_ANUBIS=m ++CONFIG_CRYPTO_ARC4=y ++CONFIG_CRYPTO_BLOWFISH=m ++CONFIG_CRYPTO_CAMELLIA=m ++CONFIG_CRYPTO_CAST5=m ++CONFIG_CRYPTO_CAST6=m ++CONFIG_CRYPTO_DES=y ++CONFIG_CRYPTO_FCRYPT=m ++CONFIG_CRYPTO_KHAZAD=m ++# CONFIG_CRYPTO_SALSA20 is not set ++# CONFIG_CRYPTO_SEED is not set ++CONFIG_CRYPTO_SERPENT=m ++CONFIG_CRYPTO_TEA=m ++CONFIG_CRYPTO_TWOFISH=m ++CONFIG_CRYPTO_TWOFISH_COMMON=m ++ ++# ++# Compression ++# ++CONFIG_CRYPTO_DEFLATE=m ++# CONFIG_CRYPTO_LZO is not set ++ ++# ++# Random Number Generation ++# ++CONFIG_CRYPTO_ANSI_CPRNG=y ++CONFIG_CRYPTO_HW=y ++ ++# ++# Library routines ++# ++CONFIG_BITREVERSE=y ++CONFIG_CRC_CCITT=y ++CONFIG_CRC16=y ++CONFIG_CRC_T10DIF=y ++# CONFIG_CRC_ITU_T is not set ++CONFIG_CRC32=y ++# CONFIG_CRC7 is not set ++CONFIG_LIBCRC32C=m ++CONFIG_ZLIB_INFLATE=y ++CONFIG_ZLIB_DEFLATE=y ++CONFIG_TEXTSEARCH=y ++CONFIG_TEXTSEARCH_KMP=m ++CONFIG_TEXTSEARCH_BM=m ++CONFIG_TEXTSEARCH_FSM=m ++CONFIG_PLIST=y ++CONFIG_HAS_IOMEM=y ++CONFIG_HAS_DMA=y +Index: linux-2.6.28/arch/arm/configs/gta02-packaging-defconfig +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-2.6.28/arch/arm/configs/gta02-packaging-defconfig 2009-01-02 00:01:56.000000000 +0100 +@@ -0,0 +1,2111 @@ ++# ++# Automatically generated make config: don't edit ++# Linux kernel version: 2.6.28-rc4 ++# Wed Dec 10 11:09:39 2008 ++# ++CONFIG_ARM=y ++CONFIG_HAVE_PWM=y ++CONFIG_SYS_SUPPORTS_APM_EMULATION=y ++CONFIG_GENERIC_GPIO=y ++# CONFIG_GENERIC_TIME is not set ++# CONFIG_GENERIC_CLOCKEVENTS is not set ++CONFIG_MMU=y ++CONFIG_NO_IOPORT=y ++CONFIG_GENERIC_HARDIRQS=y ++CONFIG_STACKTRACE_SUPPORT=y ++CONFIG_HAVE_LATENCYTOP_SUPPORT=y ++CONFIG_LOCKDEP_SUPPORT=y ++CONFIG_TRACE_IRQFLAGS_SUPPORT=y ++CONFIG_HARDIRQS_SW_RESEND=y ++CONFIG_GENERIC_IRQ_PROBE=y ++CONFIG_RWSEM_GENERIC_SPINLOCK=y ++# CONFIG_ARCH_HAS_ILOG2_U32 is not set ++# CONFIG_ARCH_HAS_ILOG2_U64 is not set ++CONFIG_GENERIC_HWEIGHT=y ++CONFIG_GENERIC_CALIBRATE_DELAY=y ++CONFIG_FIQ=y ++CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y ++CONFIG_VECTORS_BASE=0xffff0000 ++CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" ++ ++# ++# General setup ++# ++CONFIG_EXPERIMENTAL=y ++CONFIG_BROKEN_ON_SMP=y ++CONFIG_LOCK_KERNEL=y ++CONFIG_INIT_ENV_ARG_LIMIT=32 ++CONFIG_LOCALVERSION="-mokodev" ++# CONFIG_LOCALVERSION_AUTO is not set ++CONFIG_SWAP=y ++CONFIG_SYSVIPC=y ++CONFIG_SYSVIPC_SYSCTL=y ++# CONFIG_POSIX_MQUEUE is not set ++# CONFIG_BSD_PROCESS_ACCT is not set ++# CONFIG_TASKSTATS is not set ++# CONFIG_AUDIT is not set ++CONFIG_IKCONFIG=y ++CONFIG_IKCONFIG_PROC=y ++CONFIG_LOG_BUF_SHIFT=18 ++# CONFIG_CGROUPS is not set ++# CONFIG_GROUP_SCHED is not set ++CONFIG_SYSFS_DEPRECATED=y ++CONFIG_SYSFS_DEPRECATED_V2=y ++# CONFIG_RELAY is not set ++CONFIG_NAMESPACES=y ++# CONFIG_UTS_NS is not set ++# CONFIG_IPC_NS is not set ++# CONFIG_USER_NS is not set ++# CONFIG_PID_NS is not set ++CONFIG_BLK_DEV_INITRD=y ++CONFIG_INITRAMFS_SOURCE="" ++CONFIG_CC_OPTIMIZE_FOR_SIZE=y ++CONFIG_SYSCTL=y ++# CONFIG_EMBEDDED is not set ++CONFIG_UID16=y ++CONFIG_SYSCTL_SYSCALL=y ++CONFIG_KALLSYMS=y ++CONFIG_KALLSYMS_ALL=y ++# CONFIG_KALLSYMS_EXTRA_PASS is not set ++CONFIG_HOTPLUG=y ++CONFIG_PRINTK=y ++CONFIG_BUG=y ++CONFIG_ELF_CORE=y ++CONFIG_COMPAT_BRK=y ++CONFIG_BASE_FULL=y ++CONFIG_FUTEX=y ++CONFIG_ANON_INODES=y ++CONFIG_EPOLL=y ++CONFIG_SIGNALFD=y ++CONFIG_TIMERFD=y ++CONFIG_EVENTFD=y ++CONFIG_SHMEM=y ++CONFIG_AIO=y ++CONFIG_ASHMEM=y ++CONFIG_VM_EVENT_COUNTERS=y ++CONFIG_SLAB=y ++# CONFIG_SLUB is not set ++# CONFIG_SLOB is not set ++# CONFIG_PROFILING is not set ++CONFIG_MARKERS=y ++CONFIG_HAVE_OPROFILE=y ++# CONFIG_KPROBES is not set ++CONFIG_HAVE_KPROBES=y ++CONFIG_HAVE_KRETPROBES=y ++CONFIG_HAVE_CLK=y ++CONFIG_HAVE_GENERIC_DMA_COHERENT=y ++CONFIG_SLABINFO=y ++CONFIG_RT_MUTEXES=y ++# CONFIG_TINY_SHMEM is not set ++CONFIG_BASE_SMALL=0 ++CONFIG_MODULES=y ++# CONFIG_MODULE_FORCE_LOAD is not set ++CONFIG_MODULE_UNLOAD=y ++CONFIG_MODULE_FORCE_UNLOAD=y ++# CONFIG_MODVERSIONS is not set ++# CONFIG_MODULE_SRCVERSION_ALL is not set ++CONFIG_KMOD=y ++CONFIG_BLOCK=y ++# CONFIG_LBD is not set ++# CONFIG_BLK_DEV_IO_TRACE is not set ++# CONFIG_LSF is not set ++# CONFIG_BLK_DEV_BSG is not set ++# CONFIG_BLK_DEV_INTEGRITY is not set ++ ++# ++# IO Schedulers ++# ++CONFIG_IOSCHED_NOOP=y ++CONFIG_IOSCHED_AS=m ++CONFIG_IOSCHED_DEADLINE=y ++CONFIG_IOSCHED_CFQ=m ++# CONFIG_DEFAULT_AS is not set ++CONFIG_DEFAULT_DEADLINE=y ++# CONFIG_DEFAULT_CFQ is not set ++# CONFIG_DEFAULT_NOOP is not set ++CONFIG_DEFAULT_IOSCHED="deadline" ++CONFIG_CLASSIC_RCU=y ++CONFIG_FREEZER=y ++ ++# ++# System Type ++# ++# CONFIG_ARCH_AAEC2000 is not set ++# CONFIG_ARCH_INTEGRATOR is not set ++# CONFIG_ARCH_REALVIEW is not set ++# CONFIG_ARCH_VERSATILE is not set ++# CONFIG_ARCH_AT91 is not set ++# CONFIG_ARCH_CLPS7500 is not set ++# CONFIG_ARCH_CLPS711X is not set ++# CONFIG_ARCH_EBSA110 is not set ++# CONFIG_ARCH_EP93XX is not set ++# CONFIG_ARCH_FOOTBRIDGE is not set ++# CONFIG_ARCH_NETX is not set ++# CONFIG_ARCH_H720X is not set ++# CONFIG_ARCH_IMX is not set ++# CONFIG_ARCH_IOP13XX is not set ++# CONFIG_ARCH_IOP32X is not set ++# CONFIG_ARCH_IOP33X is not set ++# CONFIG_ARCH_IXP23XX is not set ++# CONFIG_ARCH_IXP2000 is not set ++# CONFIG_ARCH_IXP4XX is not set ++# CONFIG_ARCH_L7200 is not set ++# CONFIG_ARCH_KIRKWOOD is not set ++# CONFIG_ARCH_KS8695 is not set ++# CONFIG_ARCH_NS9XXX is not set ++# CONFIG_ARCH_LOKI is not set ++# CONFIG_ARCH_MV78XX0 is not set ++# CONFIG_ARCH_MXC is not set ++# CONFIG_ARCH_ORION5X is not set ++# CONFIG_ARCH_PNX4008 is not set ++# CONFIG_ARCH_PXA is not set ++# CONFIG_ARCH_RPC is not set ++# CONFIG_ARCH_SA1100 is not set ++CONFIG_ARCH_S3C2410=y ++# CONFIG_ARCH_S3C64XX is not set ++# CONFIG_ARCH_SHARK is not set ++# CONFIG_ARCH_LH7A40X is not set ++# CONFIG_ARCH_DAVINCI is not set ++# CONFIG_ARCH_OMAP is not set ++# CONFIG_ARCH_MSM is not set ++CONFIG_PLAT_S3C24XX=y ++CONFIG_S3C2410_CLOCK=y ++CONFIG_CPU_S3C244X=y ++CONFIG_S3C24XX_PWM=y ++CONFIG_S3C2410_DMA=y ++# CONFIG_S3C2410_DMA_DEBUG is not set ++CONFIG_MACH_SMDK=y ++CONFIG_MACH_NEO1973=y ++CONFIG_PLAT_S3C=y ++CONFIG_CPU_LLSERIAL_S3C2410=y ++CONFIG_CPU_LLSERIAL_S3C2440=y ++ ++# ++# Boot options ++# ++# CONFIG_S3C_BOOT_WATCHDOG is not set ++# CONFIG_S3C_BOOT_ERROR_RESET is not set ++CONFIG_S3C_BOOT_UART_FORCE_FIFO=y ++ ++# ++# Power management ++# ++# CONFIG_S3C2410_PM_DEBUG is not set ++# CONFIG_S3C2410_PM_CHECK is not set ++CONFIG_S3C_LOWLEVEL_UART_PORT=2 ++CONFIG_S3C_GPIO_SPACE=0 ++CONFIG_S3C_GPIO_TRACK=y ++ ++# ++# S3C2400 Machines ++# ++CONFIG_CPU_S3C2410=y ++CONFIG_CPU_S3C2410_DMA=y ++CONFIG_S3C2410_PM=y ++CONFIG_S3C2410_GPIO=y ++CONFIG_S3C2410_PWM=y ++ ++# ++# S3C2410 Machines ++# ++# CONFIG_ARCH_SMDK2410 is not set ++# CONFIG_ARCH_H1940 is not set ++# CONFIG_MACH_N30 is not set ++# CONFIG_ARCH_BAST is not set ++# CONFIG_MACH_OTOM is not set ++# CONFIG_MACH_AML_M5900 is not set ++# CONFIG_MACH_TCT_HAMMER is not set ++# CONFIG_MACH_VR1000 is not set ++CONFIG_MACH_QT2410=y ++# CONFIG_MACH_NEO1973_GTA01 is not set ++ ++# ++# S3C2412 Machines ++# ++# CONFIG_MACH_JIVE is not set ++# CONFIG_MACH_SMDK2413 is not set ++# CONFIG_MACH_SMDK2412 is not set ++# CONFIG_MACH_VSTMS is not set ++CONFIG_CPU_S3C2440=y ++CONFIG_S3C2440_DMA=y ++CONFIG_S3C2440_C_FIQ=y ++ ++# ++# S3C2440 Machines ++# ++# CONFIG_MACH_ANUBIS is not set ++# CONFIG_MACH_OSIRIS is not set ++# CONFIG_MACH_RX3715 is not set ++CONFIG_ARCH_S3C2440=y ++# CONFIG_MACH_NEXCODER_2440 is not set ++CONFIG_SMDK2440_CPU2440=y ++# CONFIG_MACH_AT2440EVB is not set ++CONFIG_MACH_NEO1973_GTA02=y ++# CONFIG_NEO1973_GTA02_2440 is not set ++CONFIG_CPU_S3C2442=y ++ ++# ++# S3C2442 Machines ++# ++CONFIG_SMDK2440_CPU2442=y ++ ++# ++# S3C2443 Machines ++# ++# CONFIG_MACH_SMDK2443 is not set ++ ++# ++# Processor Type ++# ++CONFIG_CPU_32=y ++CONFIG_CPU_ARM920T=y ++CONFIG_CPU_32v4T=y ++CONFIG_CPU_ABRT_EV4T=y ++CONFIG_CPU_PABRT_NOIFAR=y ++CONFIG_CPU_CACHE_V4WT=y ++CONFIG_CPU_CACHE_VIVT=y ++CONFIG_CPU_COPY_V4WB=y ++CONFIG_CPU_TLB_V4WBI=y ++CONFIG_CPU_CP15=y ++CONFIG_CPU_CP15_MMU=y ++ ++# ++# Processor Features ++# ++CONFIG_ARM_THUMB=y ++# CONFIG_CPU_ICACHE_DISABLE is not set ++# CONFIG_CPU_DCACHE_DISABLE is not set ++# CONFIG_CPU_DCACHE_WRITETHROUGH is not set ++# CONFIG_OUTER_CACHE is not set ++ ++# ++# Bus support ++# ++# CONFIG_PCI_SYSCALL is not set ++# CONFIG_ARCH_SUPPORTS_MSI is not set ++# CONFIG_PCCARD is not set ++ ++# ++# Kernel Features ++# ++CONFIG_VMSPLIT_3G=y ++# CONFIG_VMSPLIT_2G is not set ++# CONFIG_VMSPLIT_1G is not set ++CONFIG_PAGE_OFFSET=0xC0000000 ++CONFIG_PREEMPT=y ++CONFIG_HZ=200 ++CONFIG_AEABI=y ++CONFIG_OABI_COMPAT=y ++CONFIG_ARCH_FLATMEM_HAS_HOLES=y ++# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set ++# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set ++CONFIG_SELECT_MEMORY_MODEL=y ++CONFIG_FLATMEM_MANUAL=y ++# CONFIG_DISCONTIGMEM_MANUAL is not set ++# CONFIG_SPARSEMEM_MANUAL is not set ++CONFIG_FLATMEM=y ++CONFIG_FLAT_NODE_MEM_MAP=y ++CONFIG_PAGEFLAGS_EXTENDED=y ++CONFIG_SPLIT_PTLOCK_CPUS=4096 ++# CONFIG_RESOURCES_64BIT is not set ++# CONFIG_PHYS_ADDR_T_64BIT is not set ++CONFIG_ZONE_DMA_FLAG=0 ++CONFIG_VIRT_TO_BUS=y ++CONFIG_UNEVICTABLE_LRU=y ++CONFIG_ALIGNMENT_TRAP=y ++ ++# ++# Boot options ++# ++CONFIG_ZBOOT_ROM_TEXT=0x0 ++CONFIG_ZBOOT_ROM_BSS=0x0 ++CONFIG_CMDLINE="unused -- bootloader passes ATAG list" ++# CONFIG_XIP_KERNEL is not set ++CONFIG_KEXEC=y ++CONFIG_ATAGS_PROC=y ++ ++# ++# CPU Power Management ++# ++CONFIG_CPU_IDLE=y ++CONFIG_CPU_IDLE_GOV_LADDER=y ++ ++# ++# Floating point emulation ++# ++ ++# ++# At least one emulation must be selected ++# ++CONFIG_FPE_NWFPE=y ++# CONFIG_FPE_NWFPE_XP is not set ++# CONFIG_FPE_FASTFPE is not set ++ ++# ++# Userspace binary formats ++# ++CONFIG_BINFMT_ELF=y ++# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set ++CONFIG_HAVE_AOUT=y ++# CONFIG_BINFMT_AOUT is not set ++# CONFIG_BINFMT_MISC is not set ++ ++# ++# Power management options ++# ++CONFIG_PM=y ++# CONFIG_PM_DEBUG is not set ++CONFIG_PM_SLEEP=y ++CONFIG_SUSPEND=y ++CONFIG_SUSPEND_FREEZER=y ++CONFIG_APM_EMULATION=y ++CONFIG_ARCH_SUSPEND_POSSIBLE=y ++CONFIG_NET=y ++ ++# ++# Networking options ++# ++CONFIG_PACKET=y ++CONFIG_PACKET_MMAP=y ++CONFIG_UNIX=y ++CONFIG_XFRM=y ++# CONFIG_XFRM_USER is not set ++# CONFIG_XFRM_SUB_POLICY is not set ++CONFIG_XFRM_MIGRATE=y ++# CONFIG_XFRM_STATISTICS is not set ++CONFIG_XFRM_IPCOMP=m ++CONFIG_NET_KEY=m ++CONFIG_NET_KEY_MIGRATE=y ++CONFIG_INET=y ++CONFIG_IP_MULTICAST=y ++CONFIG_IP_ADVANCED_ROUTER=y ++CONFIG_ASK_IP_FIB_HASH=y ++# CONFIG_IP_FIB_TRIE is not set ++CONFIG_IP_FIB_HASH=y ++CONFIG_IP_MULTIPLE_TABLES=y ++# CONFIG_IP_ROUTE_MULTIPATH is not set ++# CONFIG_IP_ROUTE_VERBOSE is not set ++CONFIG_IP_PNP=y ++# CONFIG_IP_PNP_DHCP is not set ++# CONFIG_IP_PNP_BOOTP is not set ++# CONFIG_IP_PNP_RARP is not set ++CONFIG_NET_IPIP=m ++CONFIG_NET_IPGRE=m ++# CONFIG_NET_IPGRE_BROADCAST is not set ++# CONFIG_IP_MROUTE is not set ++# CONFIG_ARPD is not set ++CONFIG_SYN_COOKIES=y ++CONFIG_INET_AH=m ++CONFIG_INET_ESP=m ++CONFIG_INET_IPCOMP=m ++CONFIG_INET_XFRM_TUNNEL=m ++CONFIG_INET_TUNNEL=m ++CONFIG_INET_XFRM_MODE_TRANSPORT=m ++CONFIG_INET_XFRM_MODE_TUNNEL=m ++CONFIG_INET_XFRM_MODE_BEET=m ++# CONFIG_INET_LRO is not set ++CONFIG_INET_DIAG=y ++CONFIG_INET_TCP_DIAG=y ++# CONFIG_TCP_CONG_ADVANCED is not set ++CONFIG_TCP_CONG_CUBIC=y ++CONFIG_DEFAULT_TCP_CONG="cubic" ++CONFIG_TCP_MD5SIG=y ++CONFIG_IPV6=m ++# CONFIG_IPV6_PRIVACY is not set ++# CONFIG_IPV6_ROUTER_PREF is not set ++# CONFIG_IPV6_OPTIMISTIC_DAD is not set ++CONFIG_INET6_AH=m ++CONFIG_INET6_ESP=m ++CONFIG_INET6_IPCOMP=m ++# CONFIG_IPV6_MIP6 is not set ++CONFIG_INET6_XFRM_TUNNEL=m ++CONFIG_INET6_TUNNEL=m ++CONFIG_INET6_XFRM_MODE_TRANSPORT=m ++CONFIG_INET6_XFRM_MODE_TUNNEL=m ++CONFIG_INET6_XFRM_MODE_BEET=m ++# CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION is not set ++CONFIG_IPV6_SIT=m ++CONFIG_IPV6_NDISC_NODETYPE=y ++CONFIG_IPV6_TUNNEL=m ++# CONFIG_IPV6_MULTIPLE_TABLES is not set ++# CONFIG_IPV6_MROUTE is not set ++# CONFIG_NETWORK_SECMARK is not set ++CONFIG_NETFILTER=y ++# CONFIG_NETFILTER_DEBUG is not set ++CONFIG_NETFILTER_ADVANCED=y ++CONFIG_BRIDGE_NETFILTER=y ++ ++# ++# Core Netfilter Configuration ++# ++CONFIG_NETFILTER_NETLINK=m ++CONFIG_NETFILTER_NETLINK_QUEUE=m ++CONFIG_NETFILTER_NETLINK_LOG=m ++CONFIG_NF_CONNTRACK=m ++CONFIG_NF_CT_ACCT=y ++CONFIG_NF_CONNTRACK_MARK=y ++# CONFIG_NF_CONNTRACK_EVENTS is not set ++# CONFIG_NF_CT_PROTO_DCCP is not set ++CONFIG_NF_CT_PROTO_GRE=m ++CONFIG_NF_CT_PROTO_SCTP=m ++# CONFIG_NF_CT_PROTO_UDPLITE is not set ++# CONFIG_NF_CONNTRACK_AMANDA is not set ++CONFIG_NF_CONNTRACK_FTP=m ++CONFIG_NF_CONNTRACK_H323=m ++CONFIG_NF_CONNTRACK_IRC=m ++CONFIG_NF_CONNTRACK_NETBIOS_NS=m ++CONFIG_NF_CONNTRACK_PPTP=m ++CONFIG_NF_CONNTRACK_SANE=m ++CONFIG_NF_CONNTRACK_SIP=m ++CONFIG_NF_CONNTRACK_TFTP=m ++CONFIG_NF_CT_NETLINK=m ++# CONFIG_NETFILTER_TPROXY is not set ++CONFIG_NETFILTER_XTABLES=m ++CONFIG_NETFILTER_XT_TARGET_CLASSIFY=m ++CONFIG_NETFILTER_XT_TARGET_CONNMARK=m ++CONFIG_NETFILTER_XT_TARGET_DSCP=m ++CONFIG_NETFILTER_XT_TARGET_MARK=m ++CONFIG_NETFILTER_XT_TARGET_NFLOG=m ++CONFIG_NETFILTER_XT_TARGET_NFQUEUE=m ++# CONFIG_NETFILTER_XT_TARGET_RATEEST is not set ++CONFIG_NETFILTER_XT_TARGET_TCPMSS=m ++# CONFIG_NETFILTER_XT_TARGET_TCPOPTSTRIP is not set ++# CONFIG_NETFILTER_XT_MATCH_COMMENT is not set ++CONFIG_NETFILTER_XT_MATCH_CONNBYTES=m ++# CONFIG_NETFILTER_XT_MATCH_CONNLIMIT is not set ++CONFIG_NETFILTER_XT_MATCH_CONNMARK=m ++CONFIG_NETFILTER_XT_MATCH_CONNTRACK=m ++CONFIG_NETFILTER_XT_MATCH_DCCP=m ++CONFIG_NETFILTER_XT_MATCH_DSCP=m ++CONFIG_NETFILTER_XT_MATCH_ESP=m ++CONFIG_NETFILTER_XT_MATCH_HASHLIMIT=m ++CONFIG_NETFILTER_XT_MATCH_HELPER=m ++# CONFIG_NETFILTER_XT_MATCH_IPRANGE is not set ++CONFIG_NETFILTER_XT_MATCH_LENGTH=m ++CONFIG_NETFILTER_XT_MATCH_LIMIT=m ++CONFIG_NETFILTER_XT_MATCH_MAC=m ++CONFIG_NETFILTER_XT_MATCH_MARK=m ++CONFIG_NETFILTER_XT_MATCH_MULTIPORT=m ++# CONFIG_NETFILTER_XT_MATCH_OWNER is not set ++CONFIG_NETFILTER_XT_MATCH_POLICY=m ++CONFIG_NETFILTER_XT_MATCH_PHYSDEV=m ++CONFIG_NETFILTER_XT_MATCH_PKTTYPE=m ++CONFIG_NETFILTER_XT_MATCH_QUOTA=m ++# CONFIG_NETFILTER_XT_MATCH_RATEEST is not set ++CONFIG_NETFILTER_XT_MATCH_REALM=m ++# CONFIG_NETFILTER_XT_MATCH_RECENT is not set ++CONFIG_NETFILTER_XT_MATCH_SCTP=m ++CONFIG_NETFILTER_XT_MATCH_STATE=m ++CONFIG_NETFILTER_XT_MATCH_STATISTIC=m ++CONFIG_NETFILTER_XT_MATCH_STRING=m ++CONFIG_NETFILTER_XT_MATCH_TCPMSS=m ++# CONFIG_NETFILTER_XT_MATCH_TIME is not set ++# CONFIG_NETFILTER_XT_MATCH_U32 is not set ++# CONFIG_IP_VS is not set ++ ++# ++# IP: Netfilter Configuration ++# ++CONFIG_NF_DEFRAG_IPV4=m ++CONFIG_NF_CONNTRACK_IPV4=m ++# CONFIG_NF_CONNTRACK_PROC_COMPAT is not set ++# CONFIG_IP_NF_QUEUE is not set ++CONFIG_IP_NF_IPTABLES=m ++CONFIG_IP_NF_MATCH_ADDRTYPE=m ++CONFIG_IP_NF_MATCH_AH=m ++CONFIG_IP_NF_MATCH_ECN=m ++CONFIG_IP_NF_MATCH_TTL=m ++CONFIG_IP_NF_FILTER=m ++CONFIG_IP_NF_TARGET_REJECT=m ++CONFIG_IP_NF_TARGET_LOG=m ++CONFIG_IP_NF_TARGET_ULOG=m ++CONFIG_NF_NAT=m ++CONFIG_NF_NAT_NEEDED=y ++CONFIG_IP_NF_TARGET_MASQUERADE=m ++CONFIG_IP_NF_TARGET_NETMAP=m ++CONFIG_IP_NF_TARGET_REDIRECT=m ++CONFIG_NF_NAT_SNMP_BASIC=m ++CONFIG_NF_NAT_PROTO_GRE=m ++CONFIG_NF_NAT_PROTO_SCTP=m ++CONFIG_NF_NAT_FTP=m ++CONFIG_NF_NAT_IRC=m ++CONFIG_NF_NAT_TFTP=m ++# CONFIG_NF_NAT_AMANDA is not set ++CONFIG_NF_NAT_PPTP=m ++CONFIG_NF_NAT_H323=m ++CONFIG_NF_NAT_SIP=m ++CONFIG_IP_NF_MANGLE=m ++CONFIG_IP_NF_TARGET_CLUSTERIP=m ++CONFIG_IP_NF_TARGET_ECN=m ++CONFIG_IP_NF_TARGET_TTL=m ++# CONFIG_IP_NF_RAW is not set ++# CONFIG_IP_NF_ARPTABLES is not set ++ ++# ++# IPv6: Netfilter Configuration ++# ++CONFIG_NF_CONNTRACK_IPV6=m ++# CONFIG_IP6_NF_QUEUE is not set ++CONFIG_IP6_NF_IPTABLES=m ++CONFIG_IP6_NF_MATCH_AH=m ++CONFIG_IP6_NF_MATCH_EUI64=m ++CONFIG_IP6_NF_MATCH_FRAG=m ++CONFIG_IP6_NF_MATCH_OPTS=m ++CONFIG_IP6_NF_MATCH_HL=m ++CONFIG_IP6_NF_MATCH_IPV6HEADER=m ++CONFIG_IP6_NF_MATCH_MH=m ++CONFIG_IP6_NF_MATCH_RT=m ++CONFIG_IP6_NF_TARGET_LOG=m ++CONFIG_IP6_NF_FILTER=m ++CONFIG_IP6_NF_TARGET_REJECT=m ++CONFIG_IP6_NF_MANGLE=m ++CONFIG_IP6_NF_TARGET_HL=m ++# CONFIG_IP6_NF_RAW is not set ++CONFIG_BRIDGE_NF_EBTABLES=m ++CONFIG_BRIDGE_EBT_BROUTE=m ++CONFIG_BRIDGE_EBT_T_FILTER=m ++CONFIG_BRIDGE_EBT_T_NAT=m ++CONFIG_BRIDGE_EBT_802_3=m ++CONFIG_BRIDGE_EBT_AMONG=m ++CONFIG_BRIDGE_EBT_ARP=m ++CONFIG_BRIDGE_EBT_IP=m ++# CONFIG_BRIDGE_EBT_IP6 is not set ++CONFIG_BRIDGE_EBT_LIMIT=m ++CONFIG_BRIDGE_EBT_MARK=m ++CONFIG_BRIDGE_EBT_PKTTYPE=m ++CONFIG_BRIDGE_EBT_STP=m ++CONFIG_BRIDGE_EBT_VLAN=m ++CONFIG_BRIDGE_EBT_ARPREPLY=m ++CONFIG_BRIDGE_EBT_DNAT=m ++CONFIG_BRIDGE_EBT_MARK_T=m ++CONFIG_BRIDGE_EBT_REDIRECT=m ++CONFIG_BRIDGE_EBT_SNAT=m ++CONFIG_BRIDGE_EBT_LOG=m ++CONFIG_BRIDGE_EBT_ULOG=m ++# CONFIG_BRIDGE_EBT_NFLOG is not set ++# CONFIG_IP_DCCP is not set ++# CONFIG_IP_SCTP is not set ++# CONFIG_TIPC is not set ++# CONFIG_ATM is not set ++CONFIG_STP=y ++CONFIG_BRIDGE=y ++# CONFIG_NET_DSA is not set ++# CONFIG_VLAN_8021Q is not set ++# CONFIG_DECNET is not set ++CONFIG_LLC=y ++# CONFIG_LLC2 is not set ++# CONFIG_IPX is not set ++# CONFIG_ATALK is not set ++# CONFIG_X25 is not set ++# CONFIG_LAPB is not set ++# CONFIG_ECONET is not set ++# CONFIG_WAN_ROUTER is not set ++CONFIG_NET_SCHED=y ++ ++# ++# Queueing/Scheduling ++# ++CONFIG_NET_SCH_CBQ=m ++CONFIG_NET_SCH_HTB=m ++CONFIG_NET_SCH_HFSC=m ++CONFIG_NET_SCH_PRIO=m ++# CONFIG_NET_SCH_MULTIQ is not set ++CONFIG_NET_SCH_RED=m ++CONFIG_NET_SCH_SFQ=m ++CONFIG_NET_SCH_TEQL=m ++CONFIG_NET_SCH_TBF=m ++CONFIG_NET_SCH_GRED=m ++CONFIG_NET_SCH_DSMARK=m ++CONFIG_NET_SCH_NETEM=m ++ ++# ++# Classification ++# ++CONFIG_NET_CLS=y ++CONFIG_NET_CLS_BASIC=m ++CONFIG_NET_CLS_TCINDEX=m ++CONFIG_NET_CLS_ROUTE4=m ++CONFIG_NET_CLS_ROUTE=y ++CONFIG_NET_CLS_FW=m ++CONFIG_NET_CLS_U32=m ++CONFIG_CLS_U32_PERF=y ++CONFIG_CLS_U32_MARK=y ++CONFIG_NET_CLS_RSVP=m ++CONFIG_NET_CLS_RSVP6=m ++# CONFIG_NET_CLS_FLOW is not set ++# CONFIG_NET_EMATCH is not set ++# CONFIG_NET_CLS_ACT is not set ++# CONFIG_NET_CLS_IND is not set ++CONFIG_NET_SCH_FIFO=y ++ ++# ++# Network testing ++# ++# CONFIG_NET_PKTGEN is not set ++# CONFIG_HAMRADIO is not set ++# CONFIG_CAN is not set ++# CONFIG_IRDA is not set ++CONFIG_BT=m ++CONFIG_BT_L2CAP=m ++CONFIG_BT_SCO=m ++CONFIG_BT_RFCOMM=m ++CONFIG_BT_RFCOMM_TTY=y ++CONFIG_BT_BNEP=m ++CONFIG_BT_BNEP_MC_FILTER=y ++CONFIG_BT_BNEP_PROTO_FILTER=y ++CONFIG_BT_HIDP=m ++ ++# ++# Bluetooth device drivers ++# ++CONFIG_BT_HCIBTUSB=m ++# CONFIG_BT_HCIBTSDIO is not set ++# CONFIG_BT_HCIUART is not set ++# CONFIG_BT_HCIBCM203X is not set ++# CONFIG_BT_HCIBPA10X is not set ++# CONFIG_BT_HCIBFUSB is not set ++# CONFIG_BT_HCIVHCI is not set ++# CONFIG_AF_RXRPC is not set ++# CONFIG_PHONET is not set ++CONFIG_FIB_RULES=y ++CONFIG_WIRELESS=y ++# CONFIG_CFG80211 is not set ++# CONFIG_WIRELESS_OLD_REGULATORY is not set ++CONFIG_WIRELESS_EXT=y ++CONFIG_WIRELESS_EXT_SYSFS=y ++# CONFIG_MAC80211 is not set ++# CONFIG_IEEE80211 is not set ++CONFIG_RFKILL=y ++CONFIG_RFKILL_INPUT=y ++CONFIG_RFKILL_LEDS=y ++# CONFIG_NET_9P is not set ++ ++# ++# Device Drivers ++# ++ ++# ++# Generic Driver Options ++# ++CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" ++CONFIG_STANDALONE=y ++CONFIG_PREVENT_FIRMWARE_BUILD=y ++CONFIG_FW_LOADER=y ++# CONFIG_FIRMWARE_IN_KERNEL is not set ++CONFIG_EXTRA_FIRMWARE="" ++# CONFIG_DEBUG_DRIVER is not set ++# CONFIG_DEBUG_DEVRES is not set ++# CONFIG_SYS_HYPERVISOR is not set ++CONFIG_CONNECTOR=m ++CONFIG_MTD=y ++# CONFIG_MTD_DEBUG is not set ++CONFIG_MTD_CONCAT=y ++CONFIG_MTD_PARTITIONS=y ++# CONFIG_MTD_REDBOOT_PARTS is not set ++CONFIG_MTD_CMDLINE_PARTS=y ++# CONFIG_MTD_AFS_PARTS is not set ++# CONFIG_MTD_AR7_PARTS is not set ++ ++# ++# User Modules And Translation Layers ++# ++CONFIG_MTD_CHAR=y ++CONFIG_MTD_BLKDEVS=y ++CONFIG_MTD_BLOCK=y ++# CONFIG_FTL is not set ++# CONFIG_NFTL is not set ++# CONFIG_INFTL is not set ++# CONFIG_RFD_FTL is not set ++# CONFIG_SSFDC is not set ++# CONFIG_MTD_OOPS is not set ++ ++# ++# RAM/ROM/Flash chip drivers ++# ++CONFIG_MTD_CFI=y ++# CONFIG_MTD_JEDECPROBE is not set ++CONFIG_MTD_GEN_PROBE=y ++# CONFIG_MTD_CFI_ADV_OPTIONS is not set ++CONFIG_MTD_MAP_BANK_WIDTH_1=y ++CONFIG_MTD_MAP_BANK_WIDTH_2=y ++CONFIG_MTD_MAP_BANK_WIDTH_4=y ++# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set ++# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set ++# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set ++CONFIG_MTD_CFI_I1=y ++CONFIG_MTD_CFI_I2=y ++# CONFIG_MTD_CFI_I4 is not set ++# CONFIG_MTD_CFI_I8 is not set ++CONFIG_MTD_CFI_INTELEXT=y ++# CONFIG_MTD_CFI_AMDSTD is not set ++# CONFIG_MTD_CFI_STAA is not set ++CONFIG_MTD_CFI_UTIL=y ++# CONFIG_MTD_RAM is not set ++CONFIG_MTD_ROM=y ++CONFIG_MTD_ABSENT=y ++ ++# ++# Mapping drivers for chip access ++# ++# CONFIG_MTD_COMPLEX_MAPPINGS is not set ++CONFIG_MTD_PHYSMAP=y ++CONFIG_MTD_PHYSMAP_START=0x0 ++CONFIG_MTD_PHYSMAP_LEN=0 ++CONFIG_MTD_PHYSMAP_BANKWIDTH=2 ++# CONFIG_MTD_ARM_INTEGRATOR is not set ++# CONFIG_MTD_PLATRAM is not set ++ ++# ++# Self-contained MTD device drivers ++# ++# CONFIG_MTD_DATAFLASH is not set ++# CONFIG_MTD_M25P80 is not set ++# CONFIG_MTD_SLRAM is not set ++# CONFIG_MTD_PHRAM is not set ++# CONFIG_MTD_MTDRAM is not set ++# CONFIG_MTD_BLOCK2MTD is not set ++ ++# ++# Disk-On-Chip Device Drivers ++# ++# CONFIG_MTD_DOC2000 is not set ++# CONFIG_MTD_DOC2001 is not set ++# CONFIG_MTD_DOC2001PLUS is not set ++CONFIG_MTD_NAND=y ++CONFIG_MTD_NAND_VERIFY_WRITE=y ++# CONFIG_MTD_NAND_ECC_SMC is not set ++# CONFIG_MTD_NAND_MUSEUM_IDS is not set ++# CONFIG_MTD_NAND_GPIO is not set ++CONFIG_MTD_NAND_IDS=y ++CONFIG_MTD_NAND_S3C2410=y ++CONFIG_MTD_NAND_S3C2410_DEBUG=y ++CONFIG_MTD_NAND_S3C2410_HWECC=y ++# CONFIG_MTD_NAND_S3C2410_CLKSTOP is not set ++# CONFIG_MTD_NAND_DISKONCHIP is not set ++# CONFIG_MTD_NAND_NANDSIM is not set ++# CONFIG_MTD_NAND_PLATFORM is not set ++# CONFIG_MTD_ALAUDA is not set ++# CONFIG_MTD_ONENAND is not set ++ ++# ++# UBI - Unsorted block images ++# ++# CONFIG_MTD_UBI is not set ++# CONFIG_PARPORT is not set ++CONFIG_BLK_DEV=y ++# CONFIG_BLK_DEV_COW_COMMON is not set ++CONFIG_BLK_DEV_LOOP=m ++# CONFIG_BLK_DEV_CRYPTOLOOP is not set ++# CONFIG_BLK_DEV_NBD is not set ++CONFIG_BLK_DEV_UB=m ++CONFIG_BLK_DEV_RAM=y ++CONFIG_BLK_DEV_RAM_COUNT=16 ++CONFIG_BLK_DEV_RAM_SIZE=4096 ++# CONFIG_BLK_DEV_XIP is not set ++# CONFIG_CDROM_PKTCDVD is not set ++# CONFIG_ATA_OVER_ETH is not set ++CONFIG_MISC_DEVICES=y ++# CONFIG_EEPROM_93CX6 is not set ++CONFIG_LOW_MEMORY_KILLER=y ++# CONFIG_ENCLOSURE_SERVICES is not set ++CONFIG_HAVE_IDE=y ++# CONFIG_IDE is not set ++ ++# ++# SCSI device support ++# ++# CONFIG_RAID_ATTRS is not set ++CONFIG_SCSI=m ++CONFIG_SCSI_DMA=y ++# CONFIG_SCSI_TGT is not set ++# CONFIG_SCSI_NETLINK is not set ++CONFIG_SCSI_PROC_FS=y ++ ++# ++# SCSI support type (disk, tape, CD-ROM) ++# ++CONFIG_BLK_DEV_SD=m ++# CONFIG_CHR_DEV_ST is not set ++# CONFIG_CHR_DEV_OSST is not set ++CONFIG_BLK_DEV_SR=m ++# CONFIG_BLK_DEV_SR_VENDOR is not set ++CONFIG_CHR_DEV_SG=m ++# CONFIG_CHR_DEV_SCH is not set ++ ++# ++# Some SCSI devices (e.g. CD jukebox) support multiple LUNs ++# ++CONFIG_SCSI_MULTI_LUN=y ++# CONFIG_SCSI_CONSTANTS is not set ++# CONFIG_SCSI_LOGGING is not set ++CONFIG_SCSI_SCAN_ASYNC=y ++CONFIG_SCSI_WAIT_SCAN=m ++ ++# ++# SCSI Transports ++# ++# CONFIG_SCSI_SPI_ATTRS is not set ++# CONFIG_SCSI_FC_ATTRS is not set ++# CONFIG_SCSI_ISCSI_ATTRS is not set ++# CONFIG_SCSI_SAS_LIBSAS is not set ++# CONFIG_SCSI_SRP_ATTRS is not set ++CONFIG_SCSI_LOWLEVEL=y ++# CONFIG_ISCSI_TCP is not set ++# CONFIG_SCSI_DEBUG is not set ++# CONFIG_SCSI_DH is not set ++# CONFIG_ATA is not set ++CONFIG_MD=y ++# CONFIG_BLK_DEV_MD is not set ++CONFIG_BLK_DEV_DM=m ++# CONFIG_DM_DEBUG is not set ++CONFIG_DM_CRYPT=m ++CONFIG_DM_SNAPSHOT=m ++# CONFIG_DM_MIRROR is not set ++# CONFIG_DM_ZERO is not set ++# CONFIG_DM_MULTIPATH is not set ++# CONFIG_DM_DELAY is not set ++# CONFIG_DM_UEVENT is not set ++CONFIG_NETDEVICES=y ++# CONFIG_DUMMY is not set ++# CONFIG_BONDING is not set ++# CONFIG_MACVLAN is not set ++# CONFIG_EQUALIZER is not set ++CONFIG_TUN=m ++# CONFIG_VETH is not set ++# CONFIG_PHYLIB is not set ++CONFIG_NET_ETHERNET=y ++CONFIG_MII=y ++# CONFIG_AX88796 is not set ++# CONFIG_SMC91X is not set ++# CONFIG_DM9000 is not set ++# CONFIG_ENC28J60 is not set ++# CONFIG_SMC911X is not set ++# CONFIG_IBM_NEW_EMAC_ZMII is not set ++# CONFIG_IBM_NEW_EMAC_RGMII is not set ++# CONFIG_IBM_NEW_EMAC_TAH is not set ++# CONFIG_IBM_NEW_EMAC_EMAC4 is not set ++# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set ++# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set ++# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set ++# CONFIG_B44 is not set ++# CONFIG_NETDEV_1000 is not set ++# CONFIG_NETDEV_10000 is not set ++ ++# ++# Wireless LAN ++# ++# CONFIG_WLAN_PRE80211 is not set ++# CONFIG_WLAN_80211 is not set ++# CONFIG_IWLWIFI_LEDS is not set ++ ++# ++# USB Network Adapters ++# ++CONFIG_USB_CATC=m ++CONFIG_USB_KAWETH=m ++CONFIG_USB_PEGASUS=m ++CONFIG_USB_RTL8150=m ++CONFIG_USB_USBNET=y ++CONFIG_USB_NET_AX8817X=m ++CONFIG_USB_NET_CDCETHER=m ++CONFIG_USB_NET_DM9601=m ++# CONFIG_USB_NET_SMSC95XX is not set ++CONFIG_USB_NET_GL620A=m ++CONFIG_USB_NET_NET1080=m ++CONFIG_USB_NET_PLUSB=m ++CONFIG_USB_NET_MCS7830=m ++CONFIG_USB_NET_RNDIS_HOST=m ++CONFIG_USB_NET_CDC_SUBSET=m ++CONFIG_USB_ALI_M5632=y ++CONFIG_USB_AN2720=y ++CONFIG_USB_BELKIN=y ++CONFIG_USB_ARMLINUX=y ++CONFIG_USB_EPSON2888=y ++CONFIG_USB_KC2190=y ++CONFIG_USB_NET_ZAURUS=m ++# CONFIG_USB_HSO is not set ++# CONFIG_WAN is not set ++CONFIG_PPP=m ++CONFIG_PPP_MULTILINK=y ++CONFIG_PPP_FILTER=y ++CONFIG_PPP_ASYNC=m ++CONFIG_PPP_SYNC_TTY=m ++CONFIG_PPP_DEFLATE=m ++CONFIG_PPP_BSDCOMP=m ++CONFIG_PPP_MPPE=m ++# CONFIG_PPPOE is not set ++# CONFIG_PPPOL2TP is not set ++# CONFIG_SLIP is not set ++CONFIG_SLHC=m ++# CONFIG_NETCONSOLE is not set ++# CONFIG_NETPOLL is not set ++# CONFIG_NET_POLL_CONTROLLER is not set ++# CONFIG_ISDN is not set ++ ++# ++# Input device support ++# ++CONFIG_INPUT=y ++# CONFIG_INPUT_FF_MEMLESS is not set ++# CONFIG_INPUT_POLLDEV is not set ++ ++# ++# Userland interfaces ++# ++CONFIG_INPUT_MOUSEDEV=y ++# CONFIG_INPUT_MOUSEDEV_PSAUX is not set ++CONFIG_INPUT_MOUSEDEV_SCREEN_X=480 ++CONFIG_INPUT_MOUSEDEV_SCREEN_Y=640 ++# CONFIG_INPUT_JOYDEV is not set ++CONFIG_INPUT_EVDEV=y ++# CONFIG_INPUT_EVBUG is not set ++ ++# ++# Input Device Drivers ++# ++CONFIG_INPUT_KEYBOARD=y ++# CONFIG_KEYBOARD_ATKBD is not set ++# CONFIG_KEYBOARD_SUNKBD is not set ++# CONFIG_KEYBOARD_LKKBD is not set ++# CONFIG_KEYBOARD_XTKBD is not set ++# CONFIG_KEYBOARD_NEWTON is not set ++CONFIG_KEYBOARD_STOWAWAY=m ++CONFIG_KEYBOARD_GPIO=m ++CONFIG_KEYBOARD_NEO1973=y ++CONFIG_KEYBOARD_QT2410=y ++CONFIG_INPUT_MOUSE=y ++# CONFIG_MOUSE_PS2 is not set ++# CONFIG_MOUSE_SERIAL is not set ++# CONFIG_MOUSE_APPLETOUCH is not set ++# CONFIG_MOUSE_BCM5974 is not set ++# CONFIG_MOUSE_VSXXXAA is not set ++# CONFIG_MOUSE_GPIO is not set ++# CONFIG_INPUT_JOYSTICK is not set ++# CONFIG_INPUT_TABLET is not set ++CONFIG_INPUT_TOUCHSCREEN=y ++CONFIG_TOUCHSCREEN_FILTER=y ++CONFIG_TOUCHSCREEN_FILTER_GROUP=y ++CONFIG_TOUCHSCREEN_FILTER_MEDIAN=y ++CONFIG_TOUCHSCREEN_FILTER_MEAN=y ++CONFIG_TOUCHSCREEN_FILTER_LINEAR=y ++# CONFIG_TOUCHSCREEN_ADS7846 is not set ++# CONFIG_TOUCHSCREEN_FUJITSU is not set ++CONFIG_TOUCHSCREEN_S3C2410=y ++# CONFIG_TOUCHSCREEN_S3C2410_DEBUG is not set ++# CONFIG_TOUCHSCREEN_GUNZE is not set ++# CONFIG_TOUCHSCREEN_ELO is not set ++# CONFIG_TOUCHSCREEN_MTOUCH is not set ++# CONFIG_TOUCHSCREEN_INEXIO is not set ++# CONFIG_TOUCHSCREEN_MK712 is not set ++# CONFIG_TOUCHSCREEN_PENMOUNT is not set ++# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set ++# CONFIG_TOUCHSCREEN_TOUCHWIN is not set ++# CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set ++# CONFIG_TOUCHSCREEN_TOUCHIT213 is not set ++# CONFIG_TOUCHSCREEN_PCAP7200 is not set ++CONFIG_INPUT_MISC=y ++# CONFIG_INPUT_ATI_REMOTE is not set ++# CONFIG_INPUT_ATI_REMOTE2 is not set ++# CONFIG_INPUT_KEYSPAN_REMOTE is not set ++# CONFIG_INPUT_POWERMATE is not set ++# CONFIG_INPUT_YEALINK is not set ++# CONFIG_INPUT_CM109 is not set ++CONFIG_INPUT_UINPUT=m ++CONFIG_INPUT_LIS302DL=y ++CONFIG_INPUT_PCF50633_PMU=y ++ ++# ++# Hardware I/O ports ++# ++CONFIG_SERIO=y ++# CONFIG_SERIO_SERPORT is not set ++# CONFIG_SERIO_RAW is not set ++# CONFIG_GAMEPORT is not set ++ ++# ++# Character devices ++# ++CONFIG_VT=y ++CONFIG_CONSOLE_TRANSLATIONS=y ++CONFIG_VT_CONSOLE=y ++CONFIG_NR_TTY_DEVICES=6 ++CONFIG_HW_CONSOLE=y ++CONFIG_VT_HW_CONSOLE_BINDING=y ++# CONFIG_DEVKMEM is not set ++# CONFIG_SERIAL_NONSTANDARD is not set ++ ++# ++# Serial drivers ++# ++# CONFIG_SERIAL_8250 is not set ++ ++# ++# Non-8250 serial port support ++# ++CONFIG_SERIAL_SAMSUNG=y ++CONFIG_SERIAL_SAMSUNG_UARTS=3 ++CONFIG_SERIAL_SAMSUNG_CONSOLE=y ++CONFIG_SERIAL_S3C2410=y ++CONFIG_SERIAL_S3C2440=y ++CONFIG_SERIAL_CORE=y ++CONFIG_SERIAL_CORE_CONSOLE=y ++CONFIG_UNIX98_PTYS=y ++# CONFIG_LEGACY_PTYS is not set ++# CONFIG_IPMI_HANDLER is not set ++# CONFIG_HW_RANDOM is not set ++# CONFIG_NVRAM is not set ++# CONFIG_R3964 is not set ++# CONFIG_RAW_DRIVER is not set ++# CONFIG_TCG_TPM is not set ++CONFIG_I2C=y ++CONFIG_I2C_BOARDINFO=y ++CONFIG_I2C_CHARDEV=y ++CONFIG_I2C_HELPER_AUTO=y ++ ++# ++# I2C Hardware Bus support ++# ++ ++# ++# I2C system bus drivers (mostly embedded / system-on-chip) ++# ++# CONFIG_I2C_GPIO is not set ++# CONFIG_I2C_OCORES is not set ++CONFIG_I2C_S3C2410=y ++# CONFIG_I2C_SIMTEC is not set ++ ++# ++# External I2C/SMBus adapter drivers ++# ++# CONFIG_I2C_PARPORT_LIGHT is not set ++# CONFIG_I2C_TAOS_EVM is not set ++# CONFIG_I2C_TINY_USB is not set ++ ++# ++# Other I2C/SMBus bus drivers ++# ++# CONFIG_I2C_PCA_PLATFORM is not set ++# CONFIG_I2C_STUB is not set ++ ++# ++# Miscellaneous I2C Chip support ++# ++# CONFIG_DS1682 is not set ++# CONFIG_AT24 is not set ++# CONFIG_SENSORS_EEPROM is not set ++# CONFIG_SENSORS_PCF50606 is not set ++# CONFIG_SENSORS_PCF50633 is not set ++# CONFIG_SENSORS_PCF8574 is not set ++# CONFIG_PCF8575 is not set ++# CONFIG_SENSORS_PCA9539 is not set ++# CONFIG_SENSORS_PCF8591 is not set ++# CONFIG_TPS65010 is not set ++# CONFIG_SENSORS_MAX6875 is not set ++# CONFIG_SENSORS_TSL2550 is not set ++# CONFIG_SENSORS_TSL256X is not set ++CONFIG_PCA9632=y ++# CONFIG_I2C_DEBUG_CORE is not set ++# CONFIG_I2C_DEBUG_ALGO is not set ++# CONFIG_I2C_DEBUG_BUS is not set ++# CONFIG_I2C_DEBUG_CHIP is not set ++CONFIG_SPI=y ++# CONFIG_SPI_DEBUG is not set ++CONFIG_SPI_MASTER=y ++ ++# ++# SPI Master Controller Drivers ++# ++CONFIG_SPI_BITBANG=y ++# CONFIG_SPI_S3C24XX is not set ++CONFIG_SPI_S3C24XX_GPIO=y ++ ++# ++# SPI Protocol Masters ++# ++# CONFIG_SPI_AT25 is not set ++# CONFIG_SPI_SPIDEV is not set ++# CONFIG_SPI_TLE62X0 is not set ++CONFIG_ARCH_REQUIRE_GPIOLIB=y ++CONFIG_GPIOLIB=y ++CONFIG_DEBUG_GPIO=y ++CONFIG_GPIO_SYSFS=y ++ ++# ++# I2C GPIO expanders: ++# ++# CONFIG_GPIO_MAX732X is not set ++# CONFIG_GPIO_PCA953X is not set ++# CONFIG_GPIO_PCF857X is not set ++ ++# ++# PCI GPIO expanders: ++# ++ ++# ++# SPI GPIO expanders: ++# ++# CONFIG_GPIO_MAX7301 is not set ++# CONFIG_GPIO_MCP23S08 is not set ++# CONFIG_W1 is not set ++CONFIG_POWER_SUPPLY=y ++CONFIG_POWER_SUPPLY_DEBUG=y ++CONFIG_PDA_POWER=y ++CONFIG_APM_POWER=y ++# CONFIG_BATTERY_DS2760 is not set ++# CONFIG_BATTERY_BQ27x00 is not set ++CONFIG_BATTERY_BQ27000_HDQ=y ++CONFIG_GTA02_HDQ=y ++CONFIG_CHARGER_PCF50633=y ++CONFIG_HWMON=y ++# CONFIG_HWMON_VID is not set ++# CONFIG_SENSORS_AD7414 is not set ++# CONFIG_SENSORS_AD7418 is not set ++# CONFIG_SENSORS_ADCXX is not set ++# CONFIG_SENSORS_ADM1021 is not set ++# CONFIG_SENSORS_ADM1025 is not set ++# CONFIG_SENSORS_ADM1026 is not set ++# CONFIG_SENSORS_ADM1029 is not set ++# CONFIG_SENSORS_ADM1031 is not set ++# CONFIG_SENSORS_ADM9240 is not set ++# CONFIG_SENSORS_ADT7470 is not set ++# CONFIG_SENSORS_ADT7473 is not set ++# CONFIG_SENSORS_ATXP1 is not set ++# CONFIG_SENSORS_DS1621 is not set ++# CONFIG_SENSORS_F71805F is not set ++# CONFIG_SENSORS_F71882FG is not set ++# CONFIG_SENSORS_F75375S is not set ++# CONFIG_SENSORS_GL518SM is not set ++# CONFIG_SENSORS_GL520SM is not set ++# CONFIG_SENSORS_IT87 is not set ++# CONFIG_SENSORS_LM63 is not set ++# CONFIG_SENSORS_LM70 is not set ++# CONFIG_SENSORS_LM75 is not set ++# CONFIG_SENSORS_LM77 is not set ++# CONFIG_SENSORS_LM78 is not set ++# CONFIG_SENSORS_LM80 is not set ++# CONFIG_SENSORS_LM83 is not set ++# CONFIG_SENSORS_LM85 is not set ++# CONFIG_SENSORS_LM87 is not set ++# CONFIG_SENSORS_LM90 is not set ++# CONFIG_SENSORS_LM92 is not set ++# CONFIG_SENSORS_LM93 is not set ++# CONFIG_SENSORS_MAX1111 is not set ++# CONFIG_SENSORS_MAX1619 is not set ++# CONFIG_SENSORS_MAX6650 is not set ++# CONFIG_SENSORS_PC87360 is not set ++# CONFIG_SENSORS_PC87427 is not set ++# CONFIG_SENSORS_DME1737 is not set ++# CONFIG_SENSORS_SMSC47M1 is not set ++# CONFIG_SENSORS_SMSC47M192 is not set ++# CONFIG_SENSORS_SMSC47B397 is not set ++# CONFIG_SENSORS_ADS7828 is not set ++# CONFIG_SENSORS_THMC50 is not set ++# CONFIG_SENSORS_VT1211 is not set ++# CONFIG_SENSORS_W83781D is not set ++# CONFIG_SENSORS_W83791D is not set ++# CONFIG_SENSORS_W83792D is not set ++# CONFIG_SENSORS_W83793 is not set ++# CONFIG_SENSORS_W83L785TS is not set ++# CONFIG_SENSORS_W83L786NG is not set ++# CONFIG_SENSORS_W83627HF is not set ++# CONFIG_SENSORS_W83627EHF is not set ++# CONFIG_HWMON_DEBUG_CHIP is not set ++# CONFIG_THERMAL is not set ++# CONFIG_THERMAL_HWMON is not set ++CONFIG_WATCHDOG=y ++# CONFIG_WATCHDOG_NOWAYOUT is not set ++ ++# ++# Watchdog Device Drivers ++# ++# CONFIG_SOFT_WATCHDOG is not set ++CONFIG_S3C2410_WATCHDOG=m ++ ++# ++# USB-based Watchdog Cards ++# ++# CONFIG_USBPCWATCHDOG is not set ++ ++# ++# Sonics Silicon Backplane ++# ++CONFIG_SSB_POSSIBLE=y ++# CONFIG_SSB is not set ++ ++# ++# Multifunction device drivers ++# ++# CONFIG_MFD_CORE is not set ++# CONFIG_MFD_SM501 is not set ++# CONFIG_MFD_ASIC3 is not set ++# CONFIG_HTC_EGPIO is not set ++# CONFIG_HTC_PASIC3 is not set ++# CONFIG_MFD_TMIO is not set ++# CONFIG_MFD_T7L66XB is not set ++# CONFIG_MFD_TC6387XB is not set ++# CONFIG_MFD_TC6393XB is not set ++# CONFIG_PMIC_DA903X is not set ++# CONFIG_MFD_WM8400 is not set ++# CONFIG_MFD_WM8350_I2C is not set ++CONFIG_MFD_PCF50633=y ++CONFIG_PCF50633_ADC=y ++CONFIG_PCF50633_GPIO=y ++# CONFIG_MFD_PCF50606 is not set ++CONFIG_MFD_GLAMO=y ++CONFIG_MFD_GLAMO_FB=y ++CONFIG_MFD_GLAMO_SPI_GPIO=y ++CONFIG_MFD_GLAMO_SPI_FB=y ++CONFIG_MFD_GLAMO_MCI=y ++ ++# ++# Multimedia devices ++# ++ ++# ++# Multimedia core support ++# ++# CONFIG_VIDEO_DEV is not set ++# CONFIG_DVB_CORE is not set ++# CONFIG_VIDEO_MEDIA is not set ++ ++# ++# Multimedia drivers ++# ++CONFIG_DAB=y ++# CONFIG_USB_DABUSB is not set ++ ++# ++# Graphics support ++# ++# CONFIG_VGASTATE is not set ++CONFIG_VIDEO_OUTPUT_CONTROL=y ++CONFIG_FB=y ++# CONFIG_FIRMWARE_EDID is not set ++# CONFIG_FB_DDC is not set ++# CONFIG_FB_BOOT_VESA_SUPPORT is not set ++CONFIG_FB_CFB_FILLRECT=y ++CONFIG_FB_CFB_COPYAREA=y ++CONFIG_FB_CFB_IMAGEBLIT=y ++# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set ++# CONFIG_FB_SYS_FILLRECT is not set ++# CONFIG_FB_SYS_COPYAREA is not set ++# CONFIG_FB_SYS_IMAGEBLIT is not set ++# CONFIG_FB_FOREIGN_ENDIAN is not set ++# CONFIG_FB_SYS_FOPS is not set ++# CONFIG_FB_SVGALIB is not set ++# CONFIG_FB_MACMODES is not set ++# CONFIG_FB_BACKLIGHT is not set ++# CONFIG_FB_MODE_HELPERS is not set ++# CONFIG_FB_TILEBLITTING is not set ++ ++# ++# Frame buffer hardware drivers ++# ++# CONFIG_FB_UVESA is not set ++# CONFIG_FB_S1D13XXX is not set ++CONFIG_FB_S3C2410=y ++# CONFIG_FB_S3C2410_DEBUG is not set ++# CONFIG_FB_VIRTUAL is not set ++# CONFIG_FB_METRONOME is not set ++# CONFIG_FB_MB862XX is not set ++CONFIG_BACKLIGHT_LCD_SUPPORT=y ++CONFIG_LCD_CLASS_DEVICE=y ++CONFIG_LCD_LTV350QV=y ++# CONFIG_LCD_ILI9320 is not set ++# CONFIG_LCD_TDO24M is not set ++# CONFIG_LCD_VGG2432A4 is not set ++# CONFIG_LCD_PLATFORM is not set ++CONFIG_BACKLIGHT_CLASS_DEVICE=y ++CONFIG_BACKLIGHT_CORGI=y ++# CONFIG_BACKLIGHT_PWM is not set ++ ++# ++# Display device support ++# ++CONFIG_DISPLAY_SUPPORT=y ++ ++# ++# Display hardware drivers ++# ++CONFIG_DISPLAY_JBT6K74=y ++ ++# ++# Console display driver support ++# ++# CONFIG_VGA_CONSOLE is not set ++CONFIG_DUMMY_CONSOLE=y ++CONFIG_FRAMEBUFFER_CONSOLE=y ++# CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set ++# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set ++CONFIG_FONTS=y ++# CONFIG_FONT_8x8 is not set ++# CONFIG_FONT_8x16 is not set ++CONFIG_FONT_6x11=y ++# CONFIG_FONT_7x14 is not set ++# CONFIG_FONT_PEARL_8x8 is not set ++# CONFIG_FONT_ACORN_8x8 is not set ++# CONFIG_FONT_MINI_4x6 is not set ++# CONFIG_FONT_SUN8x16 is not set ++# CONFIG_FONT_SUN12x22 is not set ++# CONFIG_FONT_10x18 is not set ++# CONFIG_LOGO is not set ++CONFIG_SOUND=y ++CONFIG_SOUND_OSS_CORE=y ++CONFIG_SND=m ++CONFIG_SND_TIMER=m ++CONFIG_SND_PCM=m ++CONFIG_SND_HWDEP=m ++CONFIG_SND_RAWMIDI=m ++# CONFIG_SND_SEQUENCER is not set ++CONFIG_SND_OSSEMUL=y ++CONFIG_SND_MIXER_OSS=m ++CONFIG_SND_PCM_OSS=m ++CONFIG_SND_PCM_OSS_PLUGINS=y ++# CONFIG_SND_DYNAMIC_MINORS is not set ++CONFIG_SND_SUPPORT_OLD_API=y ++CONFIG_SND_VERBOSE_PROCFS=y ++# CONFIG_SND_VERBOSE_PRINTK is not set ++CONFIG_SND_DEBUG=y ++# CONFIG_SND_DEBUG_VERBOSE is not set ++CONFIG_SND_PCM_XRUN_DEBUG=y ++CONFIG_SND_DRIVERS=y ++# CONFIG_SND_DUMMY is not set ++# CONFIG_SND_MTPAV is not set ++# CONFIG_SND_SERIAL_U16550 is not set ++# CONFIG_SND_MPU401 is not set ++CONFIG_SND_ARM=y ++# CONFIG_SND_SPI is not set ++CONFIG_SND_USB=y ++CONFIG_SND_USB_AUDIO=m ++# CONFIG_SND_USB_CAIAQ is not set ++CONFIG_SND_SOC=m ++CONFIG_SND_S3C24XX_SOC=m ++CONFIG_SND_S3C24XX_SOC_I2S=m ++CONFIG_SND_S3C24XX_SOC_NEO1973_GTA02_WM8753=m ++# CONFIG_SND_S3C24XX_SOC_LN2440SBC_ALC650 is not set ++# CONFIG_SND_SOC_ALL_CODECS is not set ++CONFIG_SND_SOC_WM8753=m ++# CONFIG_SOUND_PRIME is not set ++CONFIG_HID_SUPPORT=y ++CONFIG_HID=y ++# CONFIG_HID_DEBUG is not set ++# CONFIG_HIDRAW is not set ++ ++# ++# USB Input Devices ++# ++CONFIG_USB_HID=y ++CONFIG_HID_PID=y ++# CONFIG_USB_HIDDEV is not set ++ ++# ++# Special HID drivers ++# ++CONFIG_HID_COMPAT=y ++CONFIG_HID_A4TECH=y ++CONFIG_HID_APPLE=y ++CONFIG_HID_BELKIN=y ++CONFIG_HID_BRIGHT=y ++CONFIG_HID_CHERRY=y ++CONFIG_HID_CHICONY=y ++CONFIG_HID_CYPRESS=y ++CONFIG_HID_DELL=y ++CONFIG_HID_EZKEY=y ++CONFIG_HID_GYRATION=y ++CONFIG_HID_LOGITECH=y ++# CONFIG_LOGITECH_FF is not set ++# CONFIG_LOGIRUMBLEPAD2_FF is not set ++CONFIG_HID_MICROSOFT=y ++CONFIG_HID_MONTEREY=y ++CONFIG_HID_PANTHERLORD=y ++# CONFIG_PANTHERLORD_FF is not set ++CONFIG_HID_PETALYNX=y ++CONFIG_HID_SAMSUNG=y ++CONFIG_HID_SONY=y ++CONFIG_HID_SUNPLUS=y ++# CONFIG_THRUSTMASTER_FF is not set ++# CONFIG_ZEROPLUS_FF is not set ++CONFIG_USB_SUPPORT=y ++CONFIG_USB_ARCH_HAS_HCD=y ++CONFIG_USB_ARCH_HAS_OHCI=y ++# CONFIG_USB_ARCH_HAS_EHCI is not set ++CONFIG_USB=y ++# CONFIG_USB_DEBUG is not set ++CONFIG_USB_ANNOUNCE_NEW_DEVICES=y ++ ++# ++# Miscellaneous USB options ++# ++CONFIG_USB_DEVICEFS=y ++CONFIG_USB_DEVICE_CLASS=y ++# CONFIG_USB_DYNAMIC_MINORS is not set ++CONFIG_USB_SUSPEND=y ++# CONFIG_USB_OTG is not set ++CONFIG_USB_MON=y ++# CONFIG_USB_WUSB is not set ++# CONFIG_USB_WUSB_CBAF is not set ++ ++# ++# USB Host Controller Drivers ++# ++# CONFIG_USB_C67X00_HCD is not set ++# CONFIG_USB_ISP116X_HCD is not set ++# CONFIG_USB_ISP1760_HCD is not set ++CONFIG_USB_OHCI_HCD=m ++# CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set ++# CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set ++CONFIG_USB_OHCI_LITTLE_ENDIAN=y ++# CONFIG_USB_SL811_HCD is not set ++# CONFIG_USB_R8A66597_HCD is not set ++# CONFIG_USB_HWA_HCD is not set ++# CONFIG_USB_MUSB_HDRC is not set ++# CONFIG_USB_GADGET_MUSB_HDRC is not set ++ ++# ++# USB Device Class drivers ++# ++CONFIG_USB_ACM=m ++CONFIG_USB_PRINTER=m ++# CONFIG_USB_WDM is not set ++CONFIG_USB_TMC=m ++ ++# ++# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' ++# ++ ++# ++# may also be needed; see USB_STORAGE Help for more information ++# ++CONFIG_USB_STORAGE=m ++# CONFIG_USB_STORAGE_DEBUG is not set ++CONFIG_USB_STORAGE_DATAFAB=y ++CONFIG_USB_STORAGE_FREECOM=y ++# CONFIG_USB_STORAGE_ISD200 is not set ++CONFIG_USB_STORAGE_DPCM=y ++CONFIG_USB_STORAGE_USBAT=y ++CONFIG_USB_STORAGE_SDDR09=y ++CONFIG_USB_STORAGE_SDDR55=y ++CONFIG_USB_STORAGE_JUMPSHOT=y ++CONFIG_USB_STORAGE_ALAUDA=y ++# CONFIG_USB_STORAGE_ONETOUCH is not set ++CONFIG_USB_STORAGE_KARMA=y ++# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set ++CONFIG_USB_LIBUSUAL=y ++ ++# ++# USB Imaging devices ++# ++# CONFIG_USB_MDC800 is not set ++# CONFIG_USB_MICROTEK is not set ++ ++# ++# USB port drivers ++# ++CONFIG_USB_SERIAL=m ++CONFIG_USB_EZUSB=y ++CONFIG_USB_SERIAL_GENERIC=y ++CONFIG_USB_SERIAL_AIRCABLE=m ++CONFIG_USB_SERIAL_ARK3116=m ++CONFIG_USB_SERIAL_BELKIN=m ++# CONFIG_USB_SERIAL_CH341 is not set ++CONFIG_USB_SERIAL_WHITEHEAT=m ++CONFIG_USB_SERIAL_DIGI_ACCELEPORT=m ++CONFIG_USB_SERIAL_CP2101=m ++CONFIG_USB_SERIAL_CYPRESS_M8=m ++CONFIG_USB_SERIAL_EMPEG=m ++CONFIG_USB_SERIAL_FTDI_SIO=m ++CONFIG_USB_SERIAL_FUNSOFT=m ++CONFIG_USB_SERIAL_VISOR=m ++CONFIG_USB_SERIAL_IPAQ=m ++CONFIG_USB_SERIAL_IR=m ++CONFIG_USB_SERIAL_EDGEPORT=m ++CONFIG_USB_SERIAL_EDGEPORT_TI=m ++CONFIG_USB_SERIAL_GARMIN=m ++CONFIG_USB_SERIAL_IPW=m ++# CONFIG_USB_SERIAL_IUU is not set ++CONFIG_USB_SERIAL_KEYSPAN_PDA=m ++CONFIG_USB_SERIAL_KEYSPAN=m ++CONFIG_USB_SERIAL_KLSI=m ++CONFIG_USB_SERIAL_KOBIL_SCT=m ++CONFIG_USB_SERIAL_MCT_U232=m ++CONFIG_USB_SERIAL_MOS7720=m ++CONFIG_USB_SERIAL_MOS7840=m ++# CONFIG_USB_SERIAL_MOTOROLA is not set ++CONFIG_USB_SERIAL_NAVMAN=m ++CONFIG_USB_SERIAL_PL2303=m ++# CONFIG_USB_SERIAL_OTI6858 is not set ++# CONFIG_USB_SERIAL_SPCP8X5 is not set ++CONFIG_USB_SERIAL_HP4X=m ++CONFIG_USB_SERIAL_SAFE=m ++CONFIG_USB_SERIAL_SAFE_PADDED=y ++CONFIG_USB_SERIAL_SIERRAWIRELESS=m ++CONFIG_USB_SERIAL_TI=m ++CONFIG_USB_SERIAL_CYBERJACK=m ++CONFIG_USB_SERIAL_XIRCOM=m ++CONFIG_USB_SERIAL_OPTION=m ++CONFIG_USB_SERIAL_OMNINET=m ++# CONFIG_USB_SERIAL_DEBUG is not set ++ ++# ++# USB Miscellaneous drivers ++# ++# CONFIG_USB_EMI62 is not set ++# CONFIG_USB_EMI26 is not set ++# CONFIG_USB_ADUTUX is not set ++# CONFIG_USB_SEVSEG is not set ++# CONFIG_USB_RIO500 is not set ++# CONFIG_USB_LEGOTOWER is not set ++# CONFIG_USB_LCD is not set ++CONFIG_USB_BERRY_CHARGE=m ++# CONFIG_USB_LED is not set ++# CONFIG_USB_CYPRESS_CY7C63 is not set ++# CONFIG_USB_CYTHERM is not set ++# CONFIG_USB_PHIDGET is not set ++# CONFIG_USB_IDMOUSE is not set ++# CONFIG_USB_FTDI_ELAN is not set ++# CONFIG_USB_APPLEDISPLAY is not set ++# CONFIG_USB_LD is not set ++CONFIG_USB_TRANCEVIBRATOR=m ++CONFIG_USB_IOWARRIOR=m ++# CONFIG_USB_TEST is not set ++# CONFIG_USB_ISIGHTFW is not set ++# CONFIG_USB_VST is not set ++CONFIG_USB_GADGET=y ++# CONFIG_USB_GADGET_DEBUG is not set ++# CONFIG_USB_GADGET_DEBUG_FILES is not set ++# CONFIG_USB_GADGET_DEBUG_FS is not set ++CONFIG_USB_GADGET_VBUS_DRAW=500 ++CONFIG_USB_GADGET_SELECTED=y ++# CONFIG_USB_GADGET_AT91 is not set ++# CONFIG_USB_GADGET_ATMEL_USBA is not set ++# CONFIG_USB_GADGET_FSL_USB2 is not set ++# CONFIG_USB_GADGET_LH7A40X is not set ++# CONFIG_USB_GADGET_OMAP is not set ++# CONFIG_USB_GADGET_PXA25X is not set ++# CONFIG_USB_GADGET_PXA27X is not set ++CONFIG_USB_GADGET_S3C2410=y ++CONFIG_USB_S3C2410=y ++CONFIG_USB_S3C2410_DEBUG=y ++# CONFIG_USB_GADGET_M66592 is not set ++# CONFIG_USB_GADGET_AMD5536UDC is not set ++# CONFIG_USB_GADGET_FSL_QE is not set ++# CONFIG_USB_GADGET_NET2280 is not set ++# CONFIG_USB_GADGET_GOKU is not set ++# CONFIG_USB_GADGET_DUMMY_HCD is not set ++# CONFIG_USB_GADGET_DUALSPEED is not set ++# CONFIG_USB_ZERO is not set ++CONFIG_USB_ETH=m ++CONFIG_USB_ETH_RNDIS=y ++CONFIG_USB_GADGETFS=m ++CONFIG_USB_FILE_STORAGE=m ++# CONFIG_USB_FILE_STORAGE_TEST is not set ++CONFIG_USB_G_SERIAL=m ++CONFIG_USB_MIDI_GADGET=m ++# CONFIG_USB_G_PRINTER is not set ++# CONFIG_USB_CDC_COMPOSITE is not set ++CONFIG_AR6000_WLAN=y ++CONFIG_MMC=y ++# CONFIG_MMC_DEBUG is not set ++CONFIG_MMC_UNSAFE_RESUME=y ++ ++# ++# MMC/SD/SDIO Card Drivers ++# ++CONFIG_MMC_BLOCK=y ++CONFIG_MMC_BLOCK_BOUNCE=y ++# CONFIG_SDIO_UART is not set ++# CONFIG_MMC_TEST is not set ++ ++# ++# MMC/SD/SDIO Host Controller Drivers ++# ++CONFIG_MMC_SDHCI=y ++CONFIG_MMC_SDHCI_S3C=y ++# CONFIG_MMC_SPI is not set ++CONFIG_MMC_S3C=y ++# CONFIG_MEMSTICK is not set ++# CONFIG_ACCESSIBILITY is not set ++CONFIG_NEW_LEDS=y ++CONFIG_LEDS_CLASS=y ++ ++# ++# LED drivers ++# ++CONFIG_LEDS_S3C24XX=m ++# CONFIG_LEDS_PCA9532 is not set ++CONFIG_LEDS_GPIO=y ++# CONFIG_LEDS_PCA955X is not set ++CONFIG_LEDS_NEO1973_VIBRATOR=y ++CONFIG_LEDS_NEO1973_GTA02=y ++ ++# ++# LED Triggers ++# ++CONFIG_LEDS_TRIGGERS=y ++CONFIG_LEDS_TRIGGER_TIMER=y ++# CONFIG_LEDS_TRIGGER_HEARTBEAT is not set ++CONFIG_LEDS_TRIGGER_BACKLIGHT=y ++# CONFIG_LEDS_TRIGGER_DEFAULT_ON is not set ++CONFIG_RTC_LIB=y ++CONFIG_RTC_CLASS=y ++CONFIG_RTC_HCTOSYS=y ++CONFIG_RTC_HCTOSYS_DEVICE="rtc0" ++CONFIG_RTC_DEBUG=y ++ ++# ++# RTC interfaces ++# ++CONFIG_RTC_INTF_SYSFS=y ++CONFIG_RTC_INTF_PROC=y ++CONFIG_RTC_INTF_DEV=y ++# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set ++# CONFIG_RTC_DRV_TEST is not set ++ ++# ++# I2C RTC drivers ++# ++# CONFIG_RTC_DRV_DS1307 is not set ++# CONFIG_RTC_DRV_DS1374 is not set ++# CONFIG_RTC_DRV_DS1672 is not set ++# CONFIG_RTC_DRV_MAX6900 is not set ++# CONFIG_RTC_DRV_RS5C372 is not set ++# CONFIG_RTC_DRV_ISL1208 is not set ++# CONFIG_RTC_DRV_X1205 is not set ++# CONFIG_RTC_DRV_PCF8563 is not set ++# CONFIG_RTC_DRV_PCF8583 is not set ++CONFIG_RTC_DRV_PCF50633=y ++# CONFIG_RTC_DRV_PCF50606 is not set ++# CONFIG_RTC_DRV_M41T80 is not set ++# CONFIG_RTC_DRV_S35390A is not set ++# CONFIG_RTC_DRV_FM3130 is not set ++ ++# ++# SPI RTC drivers ++# ++# CONFIG_RTC_DRV_M41T94 is not set ++# CONFIG_RTC_DRV_DS1305 is not set ++# CONFIG_RTC_DRV_MAX6902 is not set ++# CONFIG_RTC_DRV_R9701 is not set ++# CONFIG_RTC_DRV_RS5C348 is not set ++# CONFIG_RTC_DRV_DS3234 is not set ++ ++# ++# Platform RTC drivers ++# ++# CONFIG_RTC_DRV_CMOS is not set ++# CONFIG_RTC_DRV_DS1286 is not set ++# CONFIG_RTC_DRV_DS1511 is not set ++# CONFIG_RTC_DRV_DS1553 is not set ++# CONFIG_RTC_DRV_DS1742 is not set ++# CONFIG_RTC_DRV_STK17TA8 is not set ++# CONFIG_RTC_DRV_M48T86 is not set ++# CONFIG_RTC_DRV_M48T35 is not set ++# CONFIG_RTC_DRV_M48T59 is not set ++# CONFIG_RTC_DRV_BQ4802 is not set ++# CONFIG_RTC_DRV_V3020 is not set ++ ++# ++# on-CPU RTC drivers ++# ++CONFIG_RTC_DRV_S3C=m ++CONFIG_DMADEVICES=y ++ ++# ++# DMA Devices ++# ++ ++# ++# Android ++# ++CONFIG_ANDROID_BINDER_IPC=y ++CONFIG_ANDROID_POWER=y ++CONFIG_ANDROID_POWER_STAT=y ++CONFIG_ANDROID_POWER_ALARM=y ++CONFIG_ANDROID_LOGGER=y ++# CONFIG_ANDROID_RAM_CONSOLE is not set ++# CONFIG_ANDROID_TIMED_GPIO is not set ++# CONFIG_ANDROID_PARANOID_NETWORK is not set ++CONFIG_REGULATOR=y ++CONFIG_REGULATOR_DEBUG=y ++# CONFIG_REGULATOR_FIXED_VOLTAGE is not set ++# CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set ++# CONFIG_REGULATOR_BQ24022 is not set ++CONFIG_REGULATOR_PCF50633=y ++CONFIG_UIO=y ++CONFIG_UIO_PDRV=y ++# CONFIG_UIO_PDRV_GENIRQ is not set ++# CONFIG_UIO_SMX is not set ++# CONFIG_UIO_SERCOS3 is not set ++ ++# ++# File systems ++# ++CONFIG_EXT2_FS=y ++# CONFIG_EXT2_FS_XATTR is not set ++# CONFIG_EXT2_FS_XIP is not set ++CONFIG_EXT3_FS=y ++# CONFIG_EXT3_FS_XATTR is not set ++CONFIG_EXT4_FS=y ++CONFIG_EXT4DEV_COMPAT=y ++CONFIG_EXT4_FS_XATTR=y ++# CONFIG_EXT4_FS_POSIX_ACL is not set ++CONFIG_EXT4_FS_SECURITY=y ++CONFIG_JBD=y ++# CONFIG_JBD_DEBUG is not set ++CONFIG_JBD2=y ++# CONFIG_JBD2_DEBUG is not set ++CONFIG_FS_MBCACHE=y ++# CONFIG_REISERFS_FS is not set ++# CONFIG_JFS_FS is not set ++CONFIG_FS_POSIX_ACL=y ++CONFIG_FILE_LOCKING=y ++# CONFIG_XFS_FS is not set ++# CONFIG_OCFS2_FS is not set ++CONFIG_DNOTIFY=y ++CONFIG_INOTIFY=y ++CONFIG_INOTIFY_USER=y ++# CONFIG_QUOTA is not set ++# CONFIG_AUTOFS_FS is not set ++CONFIG_AUTOFS4_FS=m ++CONFIG_FUSE_FS=m ++ ++# ++# CD-ROM/DVD Filesystems ++# ++CONFIG_ISO9660_FS=m ++CONFIG_JOLIET=y ++# CONFIG_ZISOFS is not set ++CONFIG_UDF_FS=m ++CONFIG_UDF_NLS=y ++ ++# ++# DOS/FAT/NT Filesystems ++# ++CONFIG_FAT_FS=y ++CONFIG_MSDOS_FS=y ++CONFIG_VFAT_FS=y ++CONFIG_FAT_DEFAULT_CODEPAGE=437 ++CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" ++# CONFIG_NTFS_FS is not set ++ ++# ++# Pseudo filesystems ++# ++CONFIG_PROC_FS=y ++CONFIG_PROC_SYSCTL=y ++CONFIG_PROC_PAGE_MONITOR=y ++CONFIG_SYSFS=y ++CONFIG_TMPFS=y ++# CONFIG_TMPFS_POSIX_ACL is not set ++# CONFIG_HUGETLB_PAGE is not set ++CONFIG_CONFIGFS_FS=m ++ ++# ++# Miscellaneous filesystems ++# ++# CONFIG_ADFS_FS is not set ++# CONFIG_AFFS_FS is not set ++# CONFIG_HFS_FS is not set ++# CONFIG_HFSPLUS_FS is not set ++# CONFIG_BEFS_FS is not set ++# CONFIG_BFS_FS is not set ++# CONFIG_EFS_FS is not set ++CONFIG_JFFS2_FS=y ++CONFIG_JFFS2_FS_DEBUG=0 ++CONFIG_JFFS2_FS_WRITEBUFFER=y ++# CONFIG_JFFS2_FS_WBUF_VERIFY is not set ++CONFIG_JFFS2_SUMMARY=y ++# CONFIG_JFFS2_FS_XATTR is not set ++# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set ++CONFIG_JFFS2_ZLIB=y ++# CONFIG_JFFS2_LZO is not set ++CONFIG_JFFS2_RTIME=y ++# CONFIG_JFFS2_RUBIN is not set ++CONFIG_CRAMFS=y ++# CONFIG_VXFS_FS is not set ++# CONFIG_MINIX_FS is not set ++# CONFIG_OMFS_FS is not set ++# CONFIG_HPFS_FS is not set ++# CONFIG_QNX4FS_FS is not set ++CONFIG_ROMFS_FS=y ++# CONFIG_SYSV_FS is not set ++# CONFIG_UFS_FS is not set ++CONFIG_NETWORK_FILESYSTEMS=y ++# CONFIG_NFS_FS is not set ++CONFIG_NFSD=m ++CONFIG_NFSD_V2_ACL=y ++CONFIG_NFSD_V3=y ++CONFIG_NFSD_V3_ACL=y ++# CONFIG_NFSD_V4 is not set ++CONFIG_LOCKD=m ++CONFIG_LOCKD_V4=y ++CONFIG_EXPORTFS=m ++CONFIG_NFS_ACL_SUPPORT=m ++CONFIG_NFS_COMMON=y ++CONFIG_SUNRPC=m ++# CONFIG_SUNRPC_REGISTER_V4 is not set ++# CONFIG_RPCSEC_GSS_KRB5 is not set ++# CONFIG_RPCSEC_GSS_SPKM3 is not set ++# CONFIG_SMB_FS is not set ++CONFIG_CIFS=m ++# CONFIG_CIFS_STATS is not set ++# CONFIG_CIFS_WEAK_PW_HASH is not set ++# CONFIG_CIFS_XATTR is not set ++# CONFIG_CIFS_DEBUG2 is not set ++# CONFIG_CIFS_EXPERIMENTAL is not set ++# CONFIG_NCP_FS is not set ++# CONFIG_CODA_FS is not set ++# CONFIG_AFS_FS is not set ++ ++# ++# Partition Types ++# ++CONFIG_PARTITION_ADVANCED=y ++# CONFIG_ACORN_PARTITION is not set ++# CONFIG_OSF_PARTITION is not set ++# CONFIG_AMIGA_PARTITION is not set ++# CONFIG_ATARI_PARTITION is not set ++# CONFIG_MAC_PARTITION is not set ++CONFIG_MSDOS_PARTITION=y ++# CONFIG_BSD_DISKLABEL is not set ++# CONFIG_MINIX_SUBPARTITION is not set ++# CONFIG_SOLARIS_X86_PARTITION is not set ++# CONFIG_UNIXWARE_DISKLABEL is not set ++# CONFIG_LDM_PARTITION is not set ++# CONFIG_SGI_PARTITION is not set ++# CONFIG_ULTRIX_PARTITION is not set ++# CONFIG_SUN_PARTITION is not set ++# CONFIG_KARMA_PARTITION is not set ++# CONFIG_EFI_PARTITION is not set ++# CONFIG_SYSV68_PARTITION is not set ++CONFIG_NLS=y ++CONFIG_NLS_DEFAULT="iso8859-1" ++CONFIG_NLS_CODEPAGE_437=y ++# CONFIG_NLS_CODEPAGE_737 is not set ++# CONFIG_NLS_CODEPAGE_775 is not set ++CONFIG_NLS_CODEPAGE_850=m ++# CONFIG_NLS_CODEPAGE_852 is not set ++# CONFIG_NLS_CODEPAGE_855 is not set ++# CONFIG_NLS_CODEPAGE_857 is not set ++# CONFIG_NLS_CODEPAGE_860 is not set ++# CONFIG_NLS_CODEPAGE_861 is not set ++# CONFIG_NLS_CODEPAGE_862 is not set ++# CONFIG_NLS_CODEPAGE_863 is not set ++# CONFIG_NLS_CODEPAGE_864 is not set ++# CONFIG_NLS_CODEPAGE_865 is not set ++# CONFIG_NLS_CODEPAGE_866 is not set ++# CONFIG_NLS_CODEPAGE_869 is not set ++CONFIG_NLS_CODEPAGE_936=m ++CONFIG_NLS_CODEPAGE_950=m ++# CONFIG_NLS_CODEPAGE_932 is not set ++# CONFIG_NLS_CODEPAGE_949 is not set ++# CONFIG_NLS_CODEPAGE_874 is not set ++# CONFIG_NLS_ISO8859_8 is not set ++# CONFIG_NLS_CODEPAGE_1250 is not set ++# CONFIG_NLS_CODEPAGE_1251 is not set ++# CONFIG_NLS_ASCII is not set ++CONFIG_NLS_ISO8859_1=y ++# CONFIG_NLS_ISO8859_2 is not set ++# CONFIG_NLS_ISO8859_3 is not set ++# CONFIG_NLS_ISO8859_4 is not set ++# CONFIG_NLS_ISO8859_5 is not set ++# CONFIG_NLS_ISO8859_6 is not set ++# CONFIG_NLS_ISO8859_7 is not set ++# CONFIG_NLS_ISO8859_9 is not set ++# CONFIG_NLS_ISO8859_13 is not set ++# CONFIG_NLS_ISO8859_14 is not set ++# CONFIG_NLS_ISO8859_15 is not set ++# CONFIG_NLS_KOI8_R is not set ++# CONFIG_NLS_KOI8_U is not set ++CONFIG_NLS_UTF8=m ++# CONFIG_DLM is not set ++ ++# ++# Kernel hacking ++# ++CONFIG_PRINTK_TIME=y ++CONFIG_ENABLE_WARN_DEPRECATED=y ++CONFIG_ENABLE_MUST_CHECK=y ++CONFIG_FRAME_WARN=1024 ++CONFIG_MAGIC_SYSRQ=y ++# CONFIG_UNUSED_SYMBOLS is not set ++CONFIG_DEBUG_FS=y ++# CONFIG_HEADERS_CHECK is not set ++CONFIG_DEBUG_KERNEL=y ++CONFIG_DEBUG_SHIRQ=y ++CONFIG_DETECT_SOFTLOCKUP=y ++CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC=y ++CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=1 ++CONFIG_SCHED_DEBUG=y ++CONFIG_SCHEDSTATS=y ++CONFIG_TIMER_STATS=y ++# CONFIG_DEBUG_OBJECTS is not set ++# CONFIG_DEBUG_SLAB is not set ++CONFIG_DEBUG_PREEMPT=y ++# CONFIG_DEBUG_RT_MUTEXES is not set ++# CONFIG_RT_MUTEX_TESTER is not set ++CONFIG_DEBUG_SPINLOCK=y ++CONFIG_DEBUG_MUTEXES=y ++CONFIG_DEBUG_LOCK_ALLOC=y ++# CONFIG_PROVE_LOCKING is not set ++CONFIG_LOCKDEP=y ++CONFIG_LOCK_STAT=y ++CONFIG_DEBUG_LOCKDEP=y ++CONFIG_DEBUG_SPINLOCK_SLEEP=y ++# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set ++CONFIG_STACKTRACE=y ++# CONFIG_DEBUG_KOBJECT is not set ++CONFIG_DEBUG_BUGVERBOSE=y ++CONFIG_DEBUG_INFO=y ++# CONFIG_DEBUG_VM is not set ++# CONFIG_DEBUG_WRITECOUNT is not set ++CONFIG_DEBUG_MEMORY_INIT=y ++# CONFIG_DEBUG_LIST is not set ++CONFIG_DEBUG_SG=y ++CONFIG_FRAME_POINTER=y ++# CONFIG_BOOT_PRINTK_DELAY is not set ++# CONFIG_RCU_TORTURE_TEST is not set ++CONFIG_RCU_CPU_STALL_DETECTOR=y ++# CONFIG_BACKTRACE_SELF_TEST is not set ++# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set ++# CONFIG_FAULT_INJECTION is not set ++CONFIG_LATENCYTOP=y ++CONFIG_SYSCTL_SYSCALL_CHECK=y ++CONFIG_HAVE_FUNCTION_TRACER=y ++ ++# ++# Tracers ++# ++# CONFIG_FUNCTION_TRACER is not set ++# CONFIG_SCHED_TRACER is not set ++# CONFIG_CONTEXT_SWITCH_TRACER is not set ++# CONFIG_BOOT_TRACER is not set ++# CONFIG_STACK_TRACER is not set ++CONFIG_DYNAMIC_PRINTK_DEBUG=y ++# CONFIG_SAMPLES is not set ++CONFIG_HAVE_ARCH_KGDB=y ++# CONFIG_KGDB is not set ++# CONFIG_DEBUG_USER is not set ++CONFIG_DEBUG_ERRORS=y ++# CONFIG_DEBUG_STACK_USAGE is not set ++# CONFIG_DEBUG_LL is not set ++CONFIG_DEBUG_S3C_UART=2 ++ ++# ++# Security options ++# ++# CONFIG_KEYS is not set ++# CONFIG_SECURITY is not set ++CONFIG_SECURITYFS=y ++# CONFIG_SECURITY_FILE_CAPABILITIES is not set ++CONFIG_CRYPTO=y ++ ++# ++# Crypto core or helper ++# ++CONFIG_CRYPTO_FIPS=y ++CONFIG_CRYPTO_ALGAPI=y ++CONFIG_CRYPTO_AEAD=y ++CONFIG_CRYPTO_BLKCIPHER=y ++CONFIG_CRYPTO_HASH=y ++CONFIG_CRYPTO_RNG=y ++CONFIG_CRYPTO_MANAGER=y ++CONFIG_CRYPTO_GF128MUL=m ++CONFIG_CRYPTO_NULL=m ++# CONFIG_CRYPTO_CRYPTD is not set ++CONFIG_CRYPTO_AUTHENC=m ++CONFIG_CRYPTO_TEST=m ++ ++# ++# Authenticated Encryption with Associated Data ++# ++# CONFIG_CRYPTO_CCM is not set ++# CONFIG_CRYPTO_GCM is not set ++# CONFIG_CRYPTO_SEQIV is not set ++ ++# ++# Block modes ++# ++CONFIG_CRYPTO_CBC=y ++# CONFIG_CRYPTO_CTR is not set ++# CONFIG_CRYPTO_CTS is not set ++CONFIG_CRYPTO_ECB=m ++CONFIG_CRYPTO_LRW=m ++CONFIG_CRYPTO_PCBC=m ++# CONFIG_CRYPTO_XTS is not set ++ ++# ++# Hash modes ++# ++CONFIG_CRYPTO_HMAC=y ++CONFIG_CRYPTO_XCBC=m ++ ++# ++# Digest ++# ++CONFIG_CRYPTO_CRC32C=m ++CONFIG_CRYPTO_MD4=m ++CONFIG_CRYPTO_MD5=y ++CONFIG_CRYPTO_MICHAEL_MIC=m ++# CONFIG_CRYPTO_RMD128 is not set ++# CONFIG_CRYPTO_RMD160 is not set ++# CONFIG_CRYPTO_RMD256 is not set ++# CONFIG_CRYPTO_RMD320 is not set ++CONFIG_CRYPTO_SHA1=m ++CONFIG_CRYPTO_SHA256=m ++CONFIG_CRYPTO_SHA512=m ++CONFIG_CRYPTO_TGR192=m ++CONFIG_CRYPTO_WP512=m ++ ++# ++# Ciphers ++# ++CONFIG_CRYPTO_AES=y ++CONFIG_CRYPTO_ANUBIS=m ++CONFIG_CRYPTO_ARC4=m ++CONFIG_CRYPTO_BLOWFISH=m ++CONFIG_CRYPTO_CAMELLIA=m ++CONFIG_CRYPTO_CAST5=m ++CONFIG_CRYPTO_CAST6=m ++CONFIG_CRYPTO_DES=y ++CONFIG_CRYPTO_FCRYPT=m ++CONFIG_CRYPTO_KHAZAD=m ++# CONFIG_CRYPTO_SALSA20 is not set ++# CONFIG_CRYPTO_SEED is not set ++CONFIG_CRYPTO_SERPENT=m ++CONFIG_CRYPTO_TEA=m ++CONFIG_CRYPTO_TWOFISH=m ++CONFIG_CRYPTO_TWOFISH_COMMON=m ++ ++# ++# Compression ++# ++CONFIG_CRYPTO_DEFLATE=m ++# CONFIG_CRYPTO_LZO is not set ++ ++# ++# Random Number Generation ++# ++CONFIG_CRYPTO_ANSI_CPRNG=y ++CONFIG_CRYPTO_HW=y ++ ++# ++# Library routines ++# ++CONFIG_BITREVERSE=y ++CONFIG_CRC_CCITT=m ++CONFIG_CRC16=y ++CONFIG_CRC_T10DIF=y ++CONFIG_CRC_ITU_T=m ++CONFIG_CRC32=y ++# CONFIG_CRC7 is not set ++CONFIG_LIBCRC32C=m ++CONFIG_ZLIB_INFLATE=y ++CONFIG_ZLIB_DEFLATE=y ++CONFIG_TEXTSEARCH=y ++CONFIG_TEXTSEARCH_KMP=m ++CONFIG_TEXTSEARCH_BM=m ++CONFIG_TEXTSEARCH_FSM=m ++CONFIG_PLIST=y ++CONFIG_HAS_IOMEM=y ++CONFIG_HAS_DMA=y +Index: linux-2.6.28/arch/arm/configs/gta03_defconfig +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-2.6.28/arch/arm/configs/gta03_defconfig 2009-01-02 00:01:56.000000000 +0100 +@@ -0,0 +1,1548 @@ ++# ++# Automatically generated make config: don't edit ++# Linux kernel version: 2.6.28-rc4 ++# Fri Dec 12 12:07:49 2008 ++# ++CONFIG_ARM=y ++CONFIG_SYS_SUPPORTS_APM_EMULATION=y ++CONFIG_GENERIC_GPIO=y ++# CONFIG_GENERIC_TIME is not set ++# CONFIG_GENERIC_CLOCKEVENTS is not set ++CONFIG_MMU=y ++CONFIG_NO_IOPORT=y ++CONFIG_GENERIC_HARDIRQS=y ++CONFIG_STACKTRACE_SUPPORT=y ++CONFIG_HAVE_LATENCYTOP_SUPPORT=y ++CONFIG_LOCKDEP_SUPPORT=y ++CONFIG_TRACE_IRQFLAGS_SUPPORT=y ++CONFIG_HARDIRQS_SW_RESEND=y ++CONFIG_GENERIC_IRQ_PROBE=y ++CONFIG_RWSEM_GENERIC_SPINLOCK=y ++# CONFIG_ARCH_HAS_ILOG2_U32 is not set ++# CONFIG_ARCH_HAS_ILOG2_U64 is not set ++CONFIG_GENERIC_HWEIGHT=y ++CONFIG_GENERIC_CALIBRATE_DELAY=y ++CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y ++CONFIG_VECTORS_BASE=0xffff0000 ++CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" ++ ++# ++# General setup ++# ++CONFIG_EXPERIMENTAL=y ++CONFIG_BROKEN_ON_SMP=y ++CONFIG_INIT_ENV_ARG_LIMIT=32 ++CONFIG_LOCALVERSION="" ++CONFIG_LOCALVERSION_AUTO=y ++CONFIG_SWAP=y ++# CONFIG_SYSVIPC is not set ++# CONFIG_POSIX_MQUEUE is not set ++# CONFIG_BSD_PROCESS_ACCT is not set ++# CONFIG_TASKSTATS is not set ++# CONFIG_AUDIT is not set ++CONFIG_IKCONFIG=y ++CONFIG_IKCONFIG_PROC=y ++CONFIG_LOG_BUF_SHIFT=18 ++# CONFIG_CGROUPS is not set ++# CONFIG_GROUP_SCHED is not set ++CONFIG_SYSFS_DEPRECATED=y ++CONFIG_SYSFS_DEPRECATED_V2=y ++# CONFIG_RELAY is not set ++CONFIG_NAMESPACES=y ++# CONFIG_UTS_NS is not set ++# CONFIG_USER_NS is not set ++# CONFIG_PID_NS is not set ++CONFIG_BLK_DEV_INITRD=y ++CONFIG_INITRAMFS_SOURCE="" ++CONFIG_CC_OPTIMIZE_FOR_SIZE=y ++CONFIG_SYSCTL=y ++# CONFIG_EMBEDDED is not set ++CONFIG_UID16=y ++CONFIG_SYSCTL_SYSCALL=y ++CONFIG_KALLSYMS=y ++CONFIG_KALLSYMS_ALL=y ++# CONFIG_KALLSYMS_EXTRA_PASS is not set ++CONFIG_HOTPLUG=y ++CONFIG_PRINTK=y ++CONFIG_BUG=y ++CONFIG_ELF_CORE=y ++CONFIG_COMPAT_BRK=y ++CONFIG_BASE_FULL=y ++CONFIG_FUTEX=y ++CONFIG_ANON_INODES=y ++CONFIG_EPOLL=y ++CONFIG_SIGNALFD=y ++CONFIG_TIMERFD=y ++CONFIG_EVENTFD=y ++CONFIG_SHMEM=y ++CONFIG_AIO=y ++CONFIG_ASHMEM=y ++CONFIG_VM_EVENT_COUNTERS=y ++CONFIG_SLUB_DEBUG=y ++# CONFIG_SLAB is not set ++CONFIG_SLUB=y ++# CONFIG_SLOB is not set ++# CONFIG_PROFILING is not set ++# CONFIG_MARKERS is not set ++CONFIG_HAVE_OPROFILE=y ++# CONFIG_KPROBES is not set ++CONFIG_HAVE_KPROBES=y ++CONFIG_HAVE_KRETPROBES=y ++CONFIG_HAVE_CLK=y ++CONFIG_HAVE_GENERIC_DMA_COHERENT=y ++CONFIG_SLABINFO=y ++CONFIG_RT_MUTEXES=y ++# CONFIG_TINY_SHMEM is not set ++CONFIG_BASE_SMALL=0 ++CONFIG_MODULES=y ++# CONFIG_MODULE_FORCE_LOAD is not set ++CONFIG_MODULE_UNLOAD=y ++# CONFIG_MODULE_FORCE_UNLOAD is not set ++# CONFIG_MODVERSIONS is not set ++# CONFIG_MODULE_SRCVERSION_ALL is not set ++CONFIG_KMOD=y ++CONFIG_BLOCK=y ++CONFIG_LBD=y ++# CONFIG_BLK_DEV_IO_TRACE is not set ++CONFIG_LSF=y ++# CONFIG_BLK_DEV_BSG is not set ++# CONFIG_BLK_DEV_INTEGRITY is not set ++ ++# ++# IO Schedulers ++# ++CONFIG_IOSCHED_NOOP=y ++CONFIG_IOSCHED_AS=y ++CONFIG_IOSCHED_DEADLINE=y ++CONFIG_IOSCHED_CFQ=y ++# CONFIG_DEFAULT_AS is not set ++# CONFIG_DEFAULT_DEADLINE is not set ++CONFIG_DEFAULT_CFQ=y ++# CONFIG_DEFAULT_NOOP is not set ++CONFIG_DEFAULT_IOSCHED="cfq" ++CONFIG_CLASSIC_RCU=y ++CONFIG_FREEZER=y ++ ++# ++# System Type ++# ++# CONFIG_ARCH_AAEC2000 is not set ++# CONFIG_ARCH_INTEGRATOR is not set ++# CONFIG_ARCH_REALVIEW is not set ++# CONFIG_ARCH_VERSATILE is not set ++# CONFIG_ARCH_AT91 is not set ++# CONFIG_ARCH_CLPS7500 is not set ++# CONFIG_ARCH_CLPS711X is not set ++# CONFIG_ARCH_EBSA110 is not set ++# CONFIG_ARCH_EP93XX is not set ++# CONFIG_ARCH_FOOTBRIDGE is not set ++# CONFIG_ARCH_NETX is not set ++# CONFIG_ARCH_H720X is not set ++# CONFIG_ARCH_IMX is not set ++# CONFIG_ARCH_IOP13XX is not set ++# CONFIG_ARCH_IOP32X is not set ++# CONFIG_ARCH_IOP33X is not set ++# CONFIG_ARCH_IXP23XX is not set ++# CONFIG_ARCH_IXP2000 is not set ++# CONFIG_ARCH_IXP4XX is not set ++# CONFIG_ARCH_L7200 is not set ++# CONFIG_ARCH_KIRKWOOD is not set ++# CONFIG_ARCH_KS8695 is not set ++# CONFIG_ARCH_NS9XXX is not set ++# CONFIG_ARCH_LOKI is not set ++# CONFIG_ARCH_MV78XX0 is not set ++# CONFIG_ARCH_MXC is not set ++# CONFIG_ARCH_ORION5X is not set ++# CONFIG_ARCH_PNX4008 is not set ++# CONFIG_ARCH_PXA is not set ++# CONFIG_ARCH_RPC is not set ++# CONFIG_ARCH_SA1100 is not set ++# CONFIG_ARCH_S3C2410 is not set ++CONFIG_ARCH_S3C64XX=y ++# CONFIG_ARCH_SHARK is not set ++# CONFIG_ARCH_LH7A40X is not set ++# CONFIG_ARCH_DAVINCI is not set ++# CONFIG_ARCH_OMAP is not set ++# CONFIG_ARCH_MSM is not set ++CONFIG_MACH_NEO1973=y ++CONFIG_PLAT_S3C64XX=y ++CONFIG_CPU_S3C6400_INIT=y ++CONFIG_CPU_S3C6400_CLOCK=y ++CONFIG_S3C64XX_SETUP_I2C0=y ++CONFIG_S3C64XX_SETUP_I2C1=y ++CONFIG_S3C64XX_SETUP_FB_24BPP=y ++CONFIG_PLAT_S3C=y ++ ++# ++# Boot options ++# ++CONFIG_S3C_BOOT_ERROR_RESET=y ++CONFIG_S3C_BOOT_UART_FORCE_FIFO=y ++ ++# ++# Power management ++# ++# CONFIG_S3C2410_PM_DEBUG is not set ++# CONFIG_S3C2410_PM_CHECK is not set ++CONFIG_S3C_LOWLEVEL_UART_PORT=3 ++CONFIG_S3C_GPIO_SPACE=0 ++CONFIG_S3C_GPIO_TRACK=y ++CONFIG_S3C_GPIO_PULL_UPDOWN=y ++CONFIG_S3C_GPIO_CFG_S3C24XX=y ++CONFIG_S3C_GPIO_CFG_S3C64XX=y ++CONFIG_S3C_DEV_HSMMC=y ++CONFIG_S3C_DEV_HSMMC1=y ++CONFIG_S3C_DEV_I2C1=y ++CONFIG_S3C_DEV_FB=y ++CONFIG_CPU_S3C6410=y ++CONFIG_S3C6410_SETUP_SDHCI=y ++# CONFIG_MACH_SMDK6410 is not set ++CONFIG_MACH_OPENMOKO_GTA03=y ++ ++# ++# Processor Type ++# ++CONFIG_CPU_32=y ++CONFIG_CPU_V6=y ++CONFIG_CPU_32v6K=y ++CONFIG_CPU_32v6=y ++CONFIG_CPU_ABRT_EV6=y ++CONFIG_CPU_PABRT_NOIFAR=y ++CONFIG_CPU_CACHE_V6=y ++CONFIG_CPU_CACHE_VIPT=y ++CONFIG_CPU_COPY_V6=y ++CONFIG_CPU_TLB_V6=y ++CONFIG_CPU_HAS_ASID=y ++CONFIG_CPU_CP15=y ++CONFIG_CPU_CP15_MMU=y ++ ++# ++# Processor Features ++# ++CONFIG_ARM_THUMB=y ++# CONFIG_CPU_ICACHE_DISABLE is not set ++# CONFIG_CPU_DCACHE_DISABLE is not set ++# CONFIG_CPU_BPREDICT_DISABLE is not set ++# CONFIG_OUTER_CACHE is not set ++CONFIG_ARM_VIC=y ++ ++# ++# Bus support ++# ++# CONFIG_PCI_SYSCALL is not set ++# CONFIG_ARCH_SUPPORTS_MSI is not set ++# CONFIG_PCCARD is not set ++ ++# ++# Kernel Features ++# ++CONFIG_VMSPLIT_3G=y ++# CONFIG_VMSPLIT_2G is not set ++# CONFIG_VMSPLIT_1G is not set ++CONFIG_PAGE_OFFSET=0xC0000000 ++# CONFIG_PREEMPT is not set ++CONFIG_HZ=100 ++CONFIG_AEABI=y ++CONFIG_OABI_COMPAT=y ++CONFIG_ARCH_FLATMEM_HAS_HOLES=y ++# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set ++# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set ++CONFIG_SELECT_MEMORY_MODEL=y ++CONFIG_FLATMEM_MANUAL=y ++# CONFIG_DISCONTIGMEM_MANUAL is not set ++# CONFIG_SPARSEMEM_MANUAL is not set ++CONFIG_FLATMEM=y ++CONFIG_FLAT_NODE_MEM_MAP=y ++CONFIG_PAGEFLAGS_EXTENDED=y ++CONFIG_SPLIT_PTLOCK_CPUS=4 ++# CONFIG_RESOURCES_64BIT is not set ++# CONFIG_PHYS_ADDR_T_64BIT is not set ++CONFIG_ZONE_DMA_FLAG=0 ++CONFIG_VIRT_TO_BUS=y ++CONFIG_UNEVICTABLE_LRU=y ++CONFIG_ALIGNMENT_TRAP=y ++ ++# ++# Boot options ++# ++CONFIG_ZBOOT_ROM_TEXT=0 ++CONFIG_ZBOOT_ROM_BSS=0 ++CONFIG_CMDLINE="console=ttySAC0,115200 root=/dev/ram init=/bin/bash initrd=0x51000000,4M" ++# CONFIG_XIP_KERNEL is not set ++# CONFIG_KEXEC is not set ++ ++# ++# CPU Power Management ++# ++CONFIG_CPU_IDLE=y ++CONFIG_CPU_IDLE_GOV_LADDER=y ++ ++# ++# Floating point emulation ++# ++ ++# ++# At least one emulation must be selected ++# ++# CONFIG_FPE_NWFPE is not set ++# CONFIG_FPE_FASTFPE is not set ++CONFIG_VFP=y ++ ++# ++# Userspace binary formats ++# ++CONFIG_BINFMT_ELF=y ++# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set ++CONFIG_HAVE_AOUT=y ++# CONFIG_BINFMT_AOUT is not set ++# CONFIG_BINFMT_MISC is not set ++ ++# ++# Power management options ++# ++CONFIG_PM=y ++# CONFIG_PM_DEBUG is not set ++CONFIG_PM_SLEEP=y ++CONFIG_SUSPEND=y ++CONFIG_SUSPEND_FREEZER=y ++CONFIG_APM_EMULATION=y ++CONFIG_ARCH_SUSPEND_POSSIBLE=y ++CONFIG_NET=y ++ ++# ++# Networking options ++# ++CONFIG_PACKET=y ++CONFIG_PACKET_MMAP=y ++CONFIG_UNIX=y ++CONFIG_XFRM=y ++# CONFIG_XFRM_USER is not set ++# CONFIG_XFRM_SUB_POLICY is not set ++CONFIG_XFRM_MIGRATE=y ++# CONFIG_XFRM_STATISTICS is not set ++# CONFIG_NET_KEY is not set ++CONFIG_INET=y ++CONFIG_IP_MULTICAST=y ++CONFIG_IP_ADVANCED_ROUTER=y ++CONFIG_ASK_IP_FIB_HASH=y ++# CONFIG_IP_FIB_TRIE is not set ++CONFIG_IP_FIB_HASH=y ++CONFIG_IP_MULTIPLE_TABLES=y ++# CONFIG_IP_ROUTE_MULTIPATH is not set ++# CONFIG_IP_ROUTE_VERBOSE is not set ++CONFIG_IP_PNP=y ++# CONFIG_IP_PNP_DHCP is not set ++# CONFIG_IP_PNP_BOOTP is not set ++# CONFIG_IP_PNP_RARP is not set ++# CONFIG_NET_IPIP is not set ++# CONFIG_NET_IPGRE is not set ++# CONFIG_IP_MROUTE is not set ++# CONFIG_ARPD is not set ++CONFIG_SYN_COOKIES=y ++# CONFIG_INET_AH is not set ++# CONFIG_INET_ESP is not set ++# CONFIG_INET_IPCOMP is not set ++# CONFIG_INET_XFRM_TUNNEL is not set ++CONFIG_INET_TUNNEL=m ++CONFIG_INET_XFRM_MODE_TRANSPORT=y ++CONFIG_INET_XFRM_MODE_TUNNEL=y ++CONFIG_INET_XFRM_MODE_BEET=y ++# CONFIG_INET_LRO is not set ++CONFIG_INET_DIAG=y ++CONFIG_INET_TCP_DIAG=y ++# CONFIG_TCP_CONG_ADVANCED is not set ++CONFIG_TCP_CONG_CUBIC=y ++CONFIG_DEFAULT_TCP_CONG="cubic" ++CONFIG_TCP_MD5SIG=y ++CONFIG_IPV6=m ++# CONFIG_IPV6_PRIVACY is not set ++# CONFIG_IPV6_ROUTER_PREF is not set ++# CONFIG_IPV6_OPTIMISTIC_DAD is not set ++# CONFIG_INET6_AH is not set ++# CONFIG_INET6_ESP is not set ++# CONFIG_INET6_IPCOMP is not set ++# CONFIG_IPV6_MIP6 is not set ++# CONFIG_INET6_XFRM_TUNNEL is not set ++# CONFIG_INET6_TUNNEL is not set ++CONFIG_INET6_XFRM_MODE_TRANSPORT=m ++CONFIG_INET6_XFRM_MODE_TUNNEL=m ++CONFIG_INET6_XFRM_MODE_BEET=m ++# CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION is not set ++CONFIG_IPV6_SIT=m ++CONFIG_IPV6_NDISC_NODETYPE=y ++# CONFIG_IPV6_TUNNEL is not set ++# CONFIG_IPV6_MULTIPLE_TABLES is not set ++# CONFIG_IPV6_MROUTE is not set ++# CONFIG_NETWORK_SECMARK is not set ++CONFIG_NETFILTER=y ++# CONFIG_NETFILTER_DEBUG is not set ++CONFIG_NETFILTER_ADVANCED=y ++ ++# ++# Core Netfilter Configuration ++# ++# CONFIG_NETFILTER_NETLINK_QUEUE is not set ++# CONFIG_NETFILTER_NETLINK_LOG is not set ++# CONFIG_NF_CONNTRACK is not set ++CONFIG_NETFILTER_XTABLES=m ++# CONFIG_NETFILTER_XT_TARGET_CLASSIFY is not set ++# CONFIG_NETFILTER_XT_TARGET_MARK is not set ++# CONFIG_NETFILTER_XT_TARGET_NFLOG is not set ++# CONFIG_NETFILTER_XT_TARGET_NFQUEUE is not set ++# CONFIG_NETFILTER_XT_TARGET_RATEEST is not set ++# CONFIG_NETFILTER_XT_TARGET_TCPMSS is not set ++# CONFIG_NETFILTER_XT_MATCH_COMMENT is not set ++# CONFIG_NETFILTER_XT_MATCH_DCCP is not set ++# CONFIG_NETFILTER_XT_MATCH_DSCP is not set ++# CONFIG_NETFILTER_XT_MATCH_ESP is not set ++# CONFIG_NETFILTER_XT_MATCH_HASHLIMIT is not set ++# CONFIG_NETFILTER_XT_MATCH_IPRANGE is not set ++# CONFIG_NETFILTER_XT_MATCH_LENGTH is not set ++# CONFIG_NETFILTER_XT_MATCH_LIMIT is not set ++# CONFIG_NETFILTER_XT_MATCH_MAC is not set ++# CONFIG_NETFILTER_XT_MATCH_MARK is not set ++# CONFIG_NETFILTER_XT_MATCH_MULTIPORT is not set ++# CONFIG_NETFILTER_XT_MATCH_OWNER is not set ++# CONFIG_NETFILTER_XT_MATCH_POLICY is not set ++# CONFIG_NETFILTER_XT_MATCH_PKTTYPE is not set ++# CONFIG_NETFILTER_XT_MATCH_QUOTA is not set ++# CONFIG_NETFILTER_XT_MATCH_RATEEST is not set ++# CONFIG_NETFILTER_XT_MATCH_REALM is not set ++# CONFIG_NETFILTER_XT_MATCH_RECENT is not set ++# CONFIG_NETFILTER_XT_MATCH_SCTP is not set ++# CONFIG_NETFILTER_XT_MATCH_STATISTIC is not set ++# CONFIG_NETFILTER_XT_MATCH_STRING is not set ++# CONFIG_NETFILTER_XT_MATCH_TCPMSS is not set ++# CONFIG_NETFILTER_XT_MATCH_TIME is not set ++# CONFIG_NETFILTER_XT_MATCH_U32 is not set ++# CONFIG_IP_VS is not set ++ ++# ++# IP: Netfilter Configuration ++# ++# CONFIG_NF_DEFRAG_IPV4 is not set ++# CONFIG_IP_NF_QUEUE is not set ++# CONFIG_IP_NF_IPTABLES is not set ++# CONFIG_IP_NF_ARPTABLES is not set ++ ++# ++# IPv6: Netfilter Configuration ++# ++# CONFIG_IP6_NF_QUEUE is not set ++CONFIG_IP6_NF_IPTABLES=m ++# CONFIG_IP6_NF_MATCH_AH is not set ++# CONFIG_IP6_NF_MATCH_EUI64 is not set ++# CONFIG_IP6_NF_MATCH_FRAG is not set ++# CONFIG_IP6_NF_MATCH_OPTS is not set ++# CONFIG_IP6_NF_MATCH_HL is not set ++# CONFIG_IP6_NF_MATCH_IPV6HEADER is not set ++# CONFIG_IP6_NF_MATCH_MH is not set ++# CONFIG_IP6_NF_MATCH_RT is not set ++# CONFIG_IP6_NF_TARGET_LOG is not set ++# CONFIG_IP6_NF_FILTER is not set ++# CONFIG_IP6_NF_MANGLE is not set ++# CONFIG_IP6_NF_RAW is not set ++# CONFIG_IP_DCCP is not set ++# CONFIG_IP_SCTP is not set ++# CONFIG_TIPC is not set ++# CONFIG_ATM is not set ++# CONFIG_BRIDGE is not set ++# CONFIG_NET_DSA is not set ++# CONFIG_VLAN_8021Q is not set ++# CONFIG_DECNET is not set ++# CONFIG_LLC2 is not set ++# CONFIG_IPX is not set ++# CONFIG_ATALK is not set ++# CONFIG_X25 is not set ++# CONFIG_LAPB is not set ++# CONFIG_ECONET is not set ++# CONFIG_WAN_ROUTER is not set ++# CONFIG_NET_SCHED is not set ++ ++# ++# Network testing ++# ++# CONFIG_NET_PKTGEN is not set ++# CONFIG_HAMRADIO is not set ++# CONFIG_CAN is not set ++# CONFIG_IRDA is not set ++# CONFIG_BT is not set ++# CONFIG_AF_RXRPC is not set ++# CONFIG_PHONET is not set ++CONFIG_FIB_RULES=y ++CONFIG_WIRELESS=y ++CONFIG_CFG80211=y ++CONFIG_NL80211=y ++CONFIG_WIRELESS_OLD_REGULATORY=y ++CONFIG_WIRELESS_EXT=y ++CONFIG_WIRELESS_EXT_SYSFS=y ++CONFIG_MAC80211=y ++ ++# ++# Rate control algorithm selection ++# ++CONFIG_MAC80211_RC_PID=y ++# CONFIG_MAC80211_RC_MINSTREL is not set ++CONFIG_MAC80211_RC_DEFAULT_PID=y ++# CONFIG_MAC80211_RC_DEFAULT_MINSTREL is not set ++CONFIG_MAC80211_RC_DEFAULT="pid" ++# CONFIG_MAC80211_MESH is not set ++CONFIG_MAC80211_LEDS=y ++# CONFIG_MAC80211_DEBUG_MENU is not set ++# CONFIG_IEEE80211 is not set ++# CONFIG_RFKILL is not set ++# CONFIG_NET_9P is not set ++ ++# ++# Device Drivers ++# ++ ++# ++# Generic Driver Options ++# ++CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" ++CONFIG_STANDALONE=y ++CONFIG_PREVENT_FIRMWARE_BUILD=y ++CONFIG_FW_LOADER=y ++CONFIG_FIRMWARE_IN_KERNEL=y ++CONFIG_EXTRA_FIRMWARE="" ++# CONFIG_DEBUG_DRIVER is not set ++# CONFIG_DEBUG_DEVRES is not set ++# CONFIG_SYS_HYPERVISOR is not set ++# CONFIG_CONNECTOR is not set ++CONFIG_MTD=y ++# CONFIG_MTD_DEBUG is not set ++# CONFIG_MTD_CONCAT is not set ++CONFIG_MTD_PARTITIONS=y ++# CONFIG_MTD_REDBOOT_PARTS is not set ++CONFIG_MTD_CMDLINE_PARTS=y ++# CONFIG_MTD_AFS_PARTS is not set ++# CONFIG_MTD_AR7_PARTS is not set ++ ++# ++# User Modules And Translation Layers ++# ++CONFIG_MTD_CHAR=y ++CONFIG_MTD_BLKDEVS=y ++CONFIG_MTD_BLOCK=y ++# CONFIG_FTL is not set ++# CONFIG_NFTL is not set ++# CONFIG_INFTL is not set ++# CONFIG_RFD_FTL is not set ++# CONFIG_SSFDC is not set ++# CONFIG_MTD_OOPS is not set ++ ++# ++# RAM/ROM/Flash chip drivers ++# ++# CONFIG_MTD_CFI is not set ++# CONFIG_MTD_JEDECPROBE is not set ++CONFIG_MTD_MAP_BANK_WIDTH_1=y ++CONFIG_MTD_MAP_BANK_WIDTH_2=y ++CONFIG_MTD_MAP_BANK_WIDTH_4=y ++# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set ++# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set ++# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set ++CONFIG_MTD_CFI_I1=y ++CONFIG_MTD_CFI_I2=y ++# CONFIG_MTD_CFI_I4 is not set ++# CONFIG_MTD_CFI_I8 is not set ++# CONFIG_MTD_RAM is not set ++# CONFIG_MTD_ROM is not set ++# CONFIG_MTD_ABSENT is not set ++ ++# ++# Mapping drivers for chip access ++# ++# CONFIG_MTD_COMPLEX_MAPPINGS is not set ++# CONFIG_MTD_PLATRAM is not set ++ ++# ++# Self-contained MTD device drivers ++# ++# CONFIG_MTD_DATAFLASH is not set ++# CONFIG_MTD_M25P80 is not set ++# CONFIG_MTD_SLRAM is not set ++# CONFIG_MTD_PHRAM is not set ++# CONFIG_MTD_MTDRAM is not set ++# CONFIG_MTD_BLOCK2MTD is not set ++ ++# ++# Disk-On-Chip Device Drivers ++# ++# CONFIG_MTD_DOC2000 is not set ++# CONFIG_MTD_DOC2001 is not set ++# CONFIG_MTD_DOC2001PLUS is not set ++# CONFIG_MTD_NAND is not set ++CONFIG_MTD_ONENAND=y ++# CONFIG_MTD_ONENAND_VERIFY_WRITE is not set ++CONFIG_MTD_ONENAND_GENERIC=y ++# CONFIG_MTD_ONENAND_OTP is not set ++# CONFIG_MTD_ONENAND_2X_PROGRAM is not set ++# CONFIG_MTD_ONENAND_SIM is not set ++ ++# ++# UBI - Unsorted block images ++# ++# CONFIG_MTD_UBI is not set ++# CONFIG_PARPORT is not set ++CONFIG_BLK_DEV=y ++# CONFIG_BLK_DEV_COW_COMMON is not set ++CONFIG_BLK_DEV_LOOP=y ++# CONFIG_BLK_DEV_CRYPTOLOOP is not set ++# CONFIG_BLK_DEV_NBD is not set ++CONFIG_BLK_DEV_RAM=y ++CONFIG_BLK_DEV_RAM_COUNT=16 ++CONFIG_BLK_DEV_RAM_SIZE=8192 ++# CONFIG_BLK_DEV_XIP is not set ++# CONFIG_CDROM_PKTCDVD is not set ++# CONFIG_ATA_OVER_ETH is not set ++CONFIG_MISC_DEVICES=y ++# CONFIG_EEPROM_93CX6 is not set ++CONFIG_LOW_MEMORY_KILLER=y ++# CONFIG_ENCLOSURE_SERVICES is not set ++CONFIG_HAVE_IDE=y ++# CONFIG_IDE is not set ++ ++# ++# SCSI device support ++# ++# CONFIG_RAID_ATTRS is not set ++# CONFIG_SCSI is not set ++# CONFIG_SCSI_DMA is not set ++# CONFIG_SCSI_NETLINK is not set ++# CONFIG_ATA is not set ++# CONFIG_MD is not set ++CONFIG_NETDEVICES=y ++# CONFIG_DUMMY is not set ++# CONFIG_BONDING is not set ++# CONFIG_MACVLAN is not set ++# CONFIG_EQUALIZER is not set ++CONFIG_TUN=y ++# CONFIG_VETH is not set ++# CONFIG_NET_ETHERNET is not set ++# CONFIG_NETDEV_1000 is not set ++# CONFIG_NETDEV_10000 is not set ++ ++# ++# Wireless LAN ++# ++# CONFIG_WLAN_PRE80211 is not set ++# CONFIG_WLAN_80211 is not set ++# CONFIG_IWLWIFI_LEDS is not set ++# CONFIG_WAN is not set ++CONFIG_PPP=y ++# CONFIG_PPP_MULTILINK is not set ++# CONFIG_PPP_FILTER is not set ++CONFIG_PPP_ASYNC=y ++CONFIG_PPP_SYNC_TTY=y ++CONFIG_PPP_DEFLATE=y ++CONFIG_PPP_BSDCOMP=y ++CONFIG_PPP_MPPE=y ++# CONFIG_PPPOE is not set ++# CONFIG_PPPOL2TP is not set ++# CONFIG_SLIP is not set ++CONFIG_SLHC=y ++# CONFIG_NETCONSOLE is not set ++# CONFIG_NETPOLL is not set ++# CONFIG_NET_POLL_CONTROLLER is not set ++# CONFIG_ISDN is not set ++ ++# ++# Input device support ++# ++CONFIG_INPUT=y ++# CONFIG_INPUT_FF_MEMLESS is not set ++# CONFIG_INPUT_POLLDEV is not set ++ ++# ++# Userland interfaces ++# ++CONFIG_INPUT_MOUSEDEV=y ++CONFIG_INPUT_MOUSEDEV_PSAUX=y ++CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 ++CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 ++# CONFIG_INPUT_JOYDEV is not set ++CONFIG_INPUT_EVDEV=y ++# CONFIG_INPUT_EVBUG is not set ++ ++# ++# Input Device Drivers ++# ++CONFIG_INPUT_KEYBOARD=y ++CONFIG_KEYBOARD_ATKBD=y ++# CONFIG_KEYBOARD_SUNKBD is not set ++# CONFIG_KEYBOARD_LKKBD is not set ++# CONFIG_KEYBOARD_XTKBD is not set ++# CONFIG_KEYBOARD_NEWTON is not set ++# CONFIG_KEYBOARD_STOWAWAY is not set ++# CONFIG_KEYBOARD_GPIO is not set ++CONFIG_KEYBOARD_NEO1973=y ++CONFIG_INPUT_MOUSE=y ++CONFIG_MOUSE_PS2=y ++CONFIG_MOUSE_PS2_ALPS=y ++CONFIG_MOUSE_PS2_LOGIPS2PP=y ++CONFIG_MOUSE_PS2_SYNAPTICS=y ++CONFIG_MOUSE_PS2_LIFEBOOK=y ++CONFIG_MOUSE_PS2_TRACKPOINT=y ++# CONFIG_MOUSE_PS2_ELANTECH is not set ++# CONFIG_MOUSE_PS2_TOUCHKIT is not set ++# CONFIG_MOUSE_SERIAL is not set ++# CONFIG_MOUSE_APPLETOUCH is not set ++# CONFIG_MOUSE_BCM5974 is not set ++# CONFIG_MOUSE_VSXXXAA is not set ++# CONFIG_MOUSE_GPIO is not set ++# CONFIG_INPUT_JOYSTICK is not set ++# CONFIG_INPUT_TABLET is not set ++CONFIG_INPUT_TOUCHSCREEN=y ++CONFIG_TOUCHSCREEN_FILTER=y ++CONFIG_TOUCHSCREEN_FILTER_GROUP=y ++CONFIG_TOUCHSCREEN_FILTER_MEDIAN=y ++CONFIG_TOUCHSCREEN_FILTER_MEAN=y ++# CONFIG_TOUCHSCREEN_ADS7846 is not set ++# CONFIG_TOUCHSCREEN_FUJITSU is not set ++# CONFIG_TOUCHSCREEN_GUNZE is not set ++# CONFIG_TOUCHSCREEN_ELO is not set ++# CONFIG_TOUCHSCREEN_MTOUCH is not set ++# CONFIG_TOUCHSCREEN_INEXIO is not set ++# CONFIG_TOUCHSCREEN_MK712 is not set ++# CONFIG_TOUCHSCREEN_PENMOUNT is not set ++# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set ++# CONFIG_TOUCHSCREEN_TOUCHWIN is not set ++# CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set ++# CONFIG_TOUCHSCREEN_TOUCHIT213 is not set ++CONFIG_INPUT_MISC=y ++CONFIG_TOUCHSCREEN_PCAP7200=y ++# CONFIG_INPUT_ATI_REMOTE is not set ++# CONFIG_INPUT_ATI_REMOTE2 is not set ++# CONFIG_INPUT_KEYSPAN_REMOTE is not set ++# CONFIG_INPUT_POWERMATE is not set ++# CONFIG_INPUT_YEALINK is not set ++# CONFIG_INPUT_CM109 is not set ++# CONFIG_INPUT_UINPUT is not set ++CONFIG_INPUT_LIS302DL=y ++CONFIG_INPUT_PCF50633_PMU=y ++ ++# ++# Hardware I/O ports ++# ++CONFIG_SERIO=y ++CONFIG_SERIO_SERPORT=y ++CONFIG_SERIO_LIBPS2=y ++# CONFIG_SERIO_RAW is not set ++# CONFIG_GAMEPORT is not set ++ ++# ++# Character devices ++# ++CONFIG_VT=y ++CONFIG_CONSOLE_TRANSLATIONS=y ++CONFIG_VT_CONSOLE=y ++CONFIG_NR_TTY_DEVICES=6 ++CONFIG_HW_CONSOLE=y ++# CONFIG_VT_HW_CONSOLE_BINDING is not set ++CONFIG_DEVKMEM=y ++# CONFIG_SERIAL_NONSTANDARD is not set ++ ++# ++# Serial drivers ++# ++CONFIG_SERIAL_8250=y ++# CONFIG_SERIAL_8250_CONSOLE is not set ++CONFIG_SERIAL_8250_NR_UARTS=4 ++CONFIG_SERIAL_8250_RUNTIME_UARTS=4 ++# CONFIG_SERIAL_8250_EXTENDED is not set ++ ++# ++# Non-8250 serial port support ++# ++CONFIG_SERIAL_SAMSUNG=y ++CONFIG_SERIAL_SAMSUNG_UARTS=4 ++# CONFIG_SERIAL_SAMSUNG_DEBUG is not set ++CONFIG_SERIAL_SAMSUNG_CONSOLE=y ++CONFIG_SERIAL_S3C6400=y ++CONFIG_SERIAL_CORE=y ++CONFIG_SERIAL_CORE_CONSOLE=y ++CONFIG_UNIX98_PTYS=y ++CONFIG_LEGACY_PTYS=y ++CONFIG_LEGACY_PTY_COUNT=256 ++# CONFIG_IPMI_HANDLER is not set ++CONFIG_HW_RANDOM=y ++# CONFIG_NVRAM is not set ++# CONFIG_R3964 is not set ++# CONFIG_RAW_DRIVER is not set ++# CONFIG_TCG_TPM is not set ++CONFIG_I2C=y ++CONFIG_I2C_BOARDINFO=y ++CONFIG_I2C_CHARDEV=y ++CONFIG_I2C_HELPER_AUTO=y ++ ++# ++# I2C Hardware Bus support ++# ++ ++# ++# I2C system bus drivers (mostly embedded / system-on-chip) ++# ++# CONFIG_I2C_GPIO is not set ++# CONFIG_I2C_OCORES is not set ++CONFIG_I2C_S3C2410=y ++# CONFIG_I2C_SIMTEC is not set ++ ++# ++# External I2C/SMBus adapter drivers ++# ++# CONFIG_I2C_PARPORT_LIGHT is not set ++# CONFIG_I2C_TAOS_EVM is not set ++ ++# ++# Other I2C/SMBus bus drivers ++# ++# CONFIG_I2C_PCA_PLATFORM is not set ++# CONFIG_I2C_STUB is not set ++ ++# ++# Miscellaneous I2C Chip support ++# ++# CONFIG_DS1682 is not set ++# CONFIG_AT24 is not set ++# CONFIG_SENSORS_EEPROM is not set ++# CONFIG_SENSORS_PCF50606 is not set ++# CONFIG_SENSORS_PCF50633 is not set ++# CONFIG_SENSORS_PCF8574 is not set ++# CONFIG_PCF8575 is not set ++# CONFIG_SENSORS_PCA9539 is not set ++# CONFIG_SENSORS_PCF8591 is not set ++# CONFIG_TPS65010 is not set ++# CONFIG_SENSORS_MAX6875 is not set ++# CONFIG_SENSORS_TSL2550 is not set ++# CONFIG_SENSORS_TSL256X is not set ++CONFIG_PCA9632=y ++# CONFIG_I2C_DEBUG_CORE is not set ++# CONFIG_I2C_DEBUG_ALGO is not set ++# CONFIG_I2C_DEBUG_BUS is not set ++# CONFIG_I2C_DEBUG_CHIP is not set ++CONFIG_SPI=y ++# CONFIG_SPI_DEBUG is not set ++CONFIG_SPI_MASTER=y ++ ++# ++# SPI Master Controller Drivers ++# ++CONFIG_SPI_BITBANG=y ++ ++# ++# SPI Protocol Masters ++# ++# CONFIG_SPI_AT25 is not set ++# CONFIG_SPI_SPIDEV is not set ++# CONFIG_SPI_TLE62X0 is not set ++CONFIG_ARCH_REQUIRE_GPIOLIB=y ++CONFIG_GPIOLIB=y ++# CONFIG_DEBUG_GPIO is not set ++CONFIG_GPIO_SYSFS=y ++ ++# ++# I2C GPIO expanders: ++# ++# CONFIG_GPIO_MAX732X is not set ++# CONFIG_GPIO_PCA953X is not set ++# CONFIG_GPIO_PCF857X is not set ++ ++# ++# PCI GPIO expanders: ++# ++ ++# ++# SPI GPIO expanders: ++# ++# CONFIG_GPIO_MAX7301 is not set ++# CONFIG_GPIO_MCP23S08 is not set ++# CONFIG_W1 is not set ++CONFIG_POWER_SUPPLY=y ++# CONFIG_POWER_SUPPLY_DEBUG is not set ++# CONFIG_PDA_POWER is not set ++# CONFIG_APM_POWER is not set ++# CONFIG_BATTERY_DS2760 is not set ++# CONFIG_BATTERY_BQ27x00 is not set ++# CONFIG_BATTERY_BQ27000_HDQ is not set ++CONFIG_CHARGER_PCF50633=y ++CONFIG_HWMON=y ++# CONFIG_HWMON_VID is not set ++# CONFIG_SENSORS_AD7414 is not set ++# CONFIG_SENSORS_AD7418 is not set ++# CONFIG_SENSORS_ADCXX is not set ++# CONFIG_SENSORS_ADM1021 is not set ++# CONFIG_SENSORS_ADM1025 is not set ++# CONFIG_SENSORS_ADM1026 is not set ++# CONFIG_SENSORS_ADM1029 is not set ++# CONFIG_SENSORS_ADM1031 is not set ++# CONFIG_SENSORS_ADM9240 is not set ++# CONFIG_SENSORS_ADT7470 is not set ++# CONFIG_SENSORS_ADT7473 is not set ++# CONFIG_SENSORS_ATXP1 is not set ++# CONFIG_SENSORS_DS1621 is not set ++# CONFIG_SENSORS_F71805F is not set ++# CONFIG_SENSORS_F71882FG is not set ++# CONFIG_SENSORS_F75375S is not set ++# CONFIG_SENSORS_GL518SM is not set ++# CONFIG_SENSORS_GL520SM is not set ++# CONFIG_SENSORS_IT87 is not set ++# CONFIG_SENSORS_LM63 is not set ++# CONFIG_SENSORS_LM70 is not set ++# CONFIG_SENSORS_LM75 is not set ++# CONFIG_SENSORS_LM77 is not set ++# CONFIG_SENSORS_LM78 is not set ++# CONFIG_SENSORS_LM80 is not set ++# CONFIG_SENSORS_LM83 is not set ++# CONFIG_SENSORS_LM85 is not set ++# CONFIG_SENSORS_LM87 is not set ++# CONFIG_SENSORS_LM90 is not set ++# CONFIG_SENSORS_LM92 is not set ++# CONFIG_SENSORS_LM93 is not set ++# CONFIG_SENSORS_MAX1111 is not set ++# CONFIG_SENSORS_MAX1619 is not set ++# CONFIG_SENSORS_MAX6650 is not set ++# CONFIG_SENSORS_PC87360 is not set ++# CONFIG_SENSORS_PC87427 is not set ++# CONFIG_SENSORS_DME1737 is not set ++# CONFIG_SENSORS_SMSC47M1 is not set ++# CONFIG_SENSORS_SMSC47M192 is not set ++# CONFIG_SENSORS_SMSC47B397 is not set ++# CONFIG_SENSORS_ADS7828 is not set ++# CONFIG_SENSORS_THMC50 is not set ++# CONFIG_SENSORS_VT1211 is not set ++# CONFIG_SENSORS_W83781D is not set ++# CONFIG_SENSORS_W83791D is not set ++# CONFIG_SENSORS_W83792D is not set ++# CONFIG_SENSORS_W83793 is not set ++# CONFIG_SENSORS_W83L785TS is not set ++# CONFIG_SENSORS_W83L786NG is not set ++# CONFIG_SENSORS_W83627HF is not set ++# CONFIG_SENSORS_W83627EHF is not set ++# CONFIG_HWMON_DEBUG_CHIP is not set ++# CONFIG_THERMAL is not set ++# CONFIG_THERMAL_HWMON is not set ++# CONFIG_WATCHDOG is not set ++ ++# ++# Sonics Silicon Backplane ++# ++CONFIG_SSB_POSSIBLE=y ++# CONFIG_SSB is not set ++ ++# ++# Multifunction device drivers ++# ++# CONFIG_MFD_CORE is not set ++# CONFIG_MFD_SM501 is not set ++# CONFIG_MFD_ASIC3 is not set ++# CONFIG_HTC_EGPIO is not set ++# CONFIG_HTC_PASIC3 is not set ++# CONFIG_MFD_TMIO is not set ++# CONFIG_MFD_T7L66XB is not set ++# CONFIG_MFD_TC6387XB is not set ++# CONFIG_MFD_TC6393XB is not set ++# CONFIG_PMIC_DA903X is not set ++# CONFIG_MFD_WM8400 is not set ++# CONFIG_MFD_WM8350_I2C is not set ++CONFIG_MFD_PCF50633=y ++CONFIG_PCF50633_ADC=y ++CONFIG_PCF50633_GPIO=y ++# CONFIG_MFD_PCF50606 is not set ++# CONFIG_MFD_GLAMO is not set ++ ++# ++# Multimedia devices ++# ++ ++# ++# Multimedia core support ++# ++# CONFIG_VIDEO_DEV is not set ++# CONFIG_DVB_CORE is not set ++# CONFIG_VIDEO_MEDIA is not set ++ ++# ++# Multimedia drivers ++# ++# CONFIG_DAB is not set ++ ++# ++# Graphics support ++# ++# CONFIG_VGASTATE is not set ++# CONFIG_VIDEO_OUTPUT_CONTROL is not set ++CONFIG_FB=y ++# CONFIG_FIRMWARE_EDID is not set ++# CONFIG_FB_DDC is not set ++# CONFIG_FB_BOOT_VESA_SUPPORT is not set ++CONFIG_FB_CFB_FILLRECT=y ++CONFIG_FB_CFB_COPYAREA=y ++CONFIG_FB_CFB_IMAGEBLIT=y ++# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set ++# CONFIG_FB_SYS_FILLRECT is not set ++# CONFIG_FB_SYS_COPYAREA is not set ++# CONFIG_FB_SYS_IMAGEBLIT is not set ++# CONFIG_FB_FOREIGN_ENDIAN is not set ++# CONFIG_FB_SYS_FOPS is not set ++# CONFIG_FB_SVGALIB is not set ++# CONFIG_FB_MACMODES is not set ++# CONFIG_FB_BACKLIGHT is not set ++CONFIG_FB_MODE_HELPERS=y ++CONFIG_FB_TILEBLITTING=y ++ ++# ++# Frame buffer hardware drivers ++# ++# CONFIG_FB_S1D13XXX is not set ++CONFIG_FB_S3C=y ++# CONFIG_FB_S3C_DEBUG_REGWRITE is not set ++# CONFIG_FB_VIRTUAL is not set ++# CONFIG_FB_METRONOME is not set ++# CONFIG_FB_MB862XX is not set ++CONFIG_BACKLIGHT_LCD_SUPPORT=y ++CONFIG_LCD_CLASS_DEVICE=y ++# CONFIG_LCD_LTV350QV is not set ++# CONFIG_LCD_ILI9320 is not set ++# CONFIG_LCD_TDO24M is not set ++# CONFIG_LCD_VGG2432A4 is not set ++CONFIG_LCD_PLATFORM=y ++CONFIG_BACKLIGHT_CLASS_DEVICE=y ++CONFIG_BACKLIGHT_CORGI=y ++ ++# ++# Display device support ++# ++# CONFIG_DISPLAY_SUPPORT is not set ++# CONFIG_DISPLAY_JBT6K74 is not set ++ ++# ++# Console display driver support ++# ++# CONFIG_VGA_CONSOLE is not set ++CONFIG_DUMMY_CONSOLE=y ++CONFIG_FRAMEBUFFER_CONSOLE=y ++CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y ++CONFIG_FRAMEBUFFER_CONSOLE_ROTATION=y ++CONFIG_FONTS=y ++CONFIG_FONT_8x8=y ++CONFIG_FONT_8x16=y ++# CONFIG_FONT_6x11 is not set ++# CONFIG_FONT_7x14 is not set ++# CONFIG_FONT_PEARL_8x8 is not set ++# CONFIG_FONT_ACORN_8x8 is not set ++# CONFIG_FONT_MINI_4x6 is not set ++# CONFIG_FONT_SUN8x16 is not set ++# CONFIG_FONT_SUN12x22 is not set ++# CONFIG_FONT_10x18 is not set ++CONFIG_LOGO=y ++CONFIG_LOGO_LINUX_MONO=y ++CONFIG_LOGO_LINUX_VGA16=y ++# CONFIG_LOGO_LINUX_CLUT224 is not set ++CONFIG_SOUND=y ++# CONFIG_SOUND_OSS_CORE is not set ++CONFIG_SND=y ++CONFIG_SND_TIMER=y ++CONFIG_SND_PCM=y ++# CONFIG_SND_SEQUENCER is not set ++# CONFIG_SND_MIXER_OSS is not set ++# CONFIG_SND_PCM_OSS is not set ++# CONFIG_SND_DYNAMIC_MINORS is not set ++CONFIG_SND_SUPPORT_OLD_API=y ++CONFIG_SND_VERBOSE_PROCFS=y ++# CONFIG_SND_VERBOSE_PRINTK is not set ++# CONFIG_SND_DEBUG is not set ++CONFIG_SND_DRIVERS=y ++# CONFIG_SND_DUMMY is not set ++# CONFIG_SND_MTPAV is not set ++# CONFIG_SND_SERIAL_U16550 is not set ++# CONFIG_SND_MPU401 is not set ++CONFIG_SND_ARM=y ++CONFIG_SND_SPI=y ++CONFIG_SND_SOC=y ++# CONFIG_SND_SOC_ALL_CODECS is not set ++# CONFIG_SOUND_PRIME is not set ++CONFIG_HID_SUPPORT=y ++CONFIG_HID=y ++CONFIG_HID_DEBUG=y ++# CONFIG_HIDRAW is not set ++# CONFIG_HID_PID is not set ++ ++# ++# Special HID drivers ++# ++# CONFIG_HID_COMPAT is not set ++CONFIG_USB_SUPPORT=y ++CONFIG_USB_ARCH_HAS_HCD=y ++# CONFIG_USB_ARCH_HAS_OHCI is not set ++# CONFIG_USB_ARCH_HAS_EHCI is not set ++# CONFIG_USB is not set ++ ++# ++# Enable Host or Gadget support to see Inventra options ++# ++ ++# ++# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' ++# ++# CONFIG_USB_GADGET is not set ++# CONFIG_AR6000_WLAN is not set ++CONFIG_MMC=y ++CONFIG_MMC_DEBUG=y ++CONFIG_MMC_UNSAFE_RESUME=y ++ ++# ++# MMC/SD/SDIO Card Drivers ++# ++CONFIG_MMC_BLOCK=y ++CONFIG_MMC_BLOCK_BOUNCE=y ++CONFIG_SDIO_UART=y ++# CONFIG_MMC_TEST is not set ++ ++# ++# MMC/SD/SDIO Host Controller Drivers ++# ++CONFIG_MMC_SDHCI=y ++CONFIG_MMC_SDHCI_S3C=y ++# CONFIG_MMC_SPI is not set ++# CONFIG_MEMSTICK is not set ++# CONFIG_ACCESSIBILITY is not set ++CONFIG_NEW_LEDS=y ++# CONFIG_LEDS_CLASS is not set ++ ++# ++# LED drivers ++# ++ ++# ++# LED Triggers ++# ++CONFIG_LEDS_TRIGGERS=y ++# CONFIG_LEDS_TRIGGER_TIMER is not set ++# CONFIG_LEDS_TRIGGER_HEARTBEAT is not set ++# CONFIG_LEDS_TRIGGER_BACKLIGHT is not set ++# CONFIG_LEDS_TRIGGER_DEFAULT_ON is not set ++CONFIG_RTC_LIB=y ++CONFIG_RTC_CLASS=y ++CONFIG_RTC_HCTOSYS=y ++CONFIG_RTC_HCTOSYS_DEVICE="rtc0" ++# CONFIG_RTC_DEBUG is not set ++ ++# ++# RTC interfaces ++# ++CONFIG_RTC_INTF_SYSFS=y ++CONFIG_RTC_INTF_PROC=y ++CONFIG_RTC_INTF_DEV=y ++# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set ++# CONFIG_RTC_DRV_TEST is not set ++ ++# ++# I2C RTC drivers ++# ++# CONFIG_RTC_DRV_DS1307 is not set ++# CONFIG_RTC_DRV_DS1374 is not set ++# CONFIG_RTC_DRV_DS1672 is not set ++# CONFIG_RTC_DRV_MAX6900 is not set ++# CONFIG_RTC_DRV_RS5C372 is not set ++# CONFIG_RTC_DRV_ISL1208 is not set ++# CONFIG_RTC_DRV_X1205 is not set ++# CONFIG_RTC_DRV_PCF8563 is not set ++# CONFIG_RTC_DRV_PCF8583 is not set ++CONFIG_RTC_DRV_PCF50633=y ++# CONFIG_RTC_DRV_PCF50606 is not set ++# CONFIG_RTC_DRV_M41T80 is not set ++# CONFIG_RTC_DRV_S35390A is not set ++# CONFIG_RTC_DRV_FM3130 is not set ++ ++# ++# SPI RTC drivers ++# ++# CONFIG_RTC_DRV_M41T94 is not set ++# CONFIG_RTC_DRV_DS1305 is not set ++# CONFIG_RTC_DRV_MAX6902 is not set ++# CONFIG_RTC_DRV_R9701 is not set ++# CONFIG_RTC_DRV_RS5C348 is not set ++# CONFIG_RTC_DRV_DS3234 is not set ++ ++# ++# Platform RTC drivers ++# ++# CONFIG_RTC_DRV_CMOS is not set ++# CONFIG_RTC_DRV_DS1286 is not set ++# CONFIG_RTC_DRV_DS1511 is not set ++# CONFIG_RTC_DRV_DS1553 is not set ++# CONFIG_RTC_DRV_DS1742 is not set ++# CONFIG_RTC_DRV_STK17TA8 is not set ++# CONFIG_RTC_DRV_M48T86 is not set ++# CONFIG_RTC_DRV_M48T35 is not set ++# CONFIG_RTC_DRV_M48T59 is not set ++# CONFIG_RTC_DRV_BQ4802 is not set ++# CONFIG_RTC_DRV_V3020 is not set ++ ++# ++# on-CPU RTC drivers ++# ++# CONFIG_DMADEVICES is not set ++ ++# ++# Android ++# ++CONFIG_ANDROID_BINDER_IPC=y ++# CONFIG_ANDROID_POWER is not set ++CONFIG_ANDROID_LOGGER=y ++# CONFIG_ANDROID_RAM_CONSOLE is not set ++# CONFIG_ANDROID_TIMED_GPIO is not set ++# CONFIG_ANDROID_PARANOID_NETWORK is not set ++CONFIG_REGULATOR=y ++# CONFIG_REGULATOR_DEBUG is not set ++# CONFIG_REGULATOR_FIXED_VOLTAGE is not set ++# CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set ++# CONFIG_REGULATOR_BQ24022 is not set ++CONFIG_REGULATOR_PCF50633=y ++# CONFIG_UIO is not set ++ ++# ++# File systems ++# ++CONFIG_EXT2_FS=y ++# CONFIG_EXT2_FS_XATTR is not set ++# CONFIG_EXT2_FS_XIP is not set ++CONFIG_EXT3_FS=y ++CONFIG_EXT3_FS_XATTR=y ++CONFIG_EXT3_FS_POSIX_ACL=y ++CONFIG_EXT3_FS_SECURITY=y ++# CONFIG_EXT4_FS is not set ++CONFIG_JBD=y ++CONFIG_FS_MBCACHE=y ++# CONFIG_REISERFS_FS is not set ++# CONFIG_JFS_FS is not set ++CONFIG_FS_POSIX_ACL=y ++CONFIG_FILE_LOCKING=y ++# CONFIG_XFS_FS is not set ++# CONFIG_GFS2_FS is not set ++# CONFIG_OCFS2_FS is not set ++CONFIG_DNOTIFY=y ++CONFIG_INOTIFY=y ++CONFIG_INOTIFY_USER=y ++# CONFIG_QUOTA is not set ++# CONFIG_AUTOFS_FS is not set ++# CONFIG_AUTOFS4_FS is not set ++# CONFIG_FUSE_FS is not set ++CONFIG_GENERIC_ACL=y ++ ++# ++# CD-ROM/DVD Filesystems ++# ++# CONFIG_ISO9660_FS is not set ++# CONFIG_UDF_FS is not set ++ ++# ++# DOS/FAT/NT Filesystems ++# ++CONFIG_FAT_FS=y ++# CONFIG_MSDOS_FS is not set ++CONFIG_VFAT_FS=y ++CONFIG_FAT_DEFAULT_CODEPAGE=437 ++CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" ++# CONFIG_NTFS_FS is not set ++ ++# ++# Pseudo filesystems ++# ++CONFIG_PROC_FS=y ++CONFIG_PROC_SYSCTL=y ++CONFIG_PROC_PAGE_MONITOR=y ++CONFIG_SYSFS=y ++CONFIG_TMPFS=y ++CONFIG_TMPFS_POSIX_ACL=y ++# CONFIG_HUGETLB_PAGE is not set ++# CONFIG_CONFIGFS_FS is not set ++ ++# ++# Miscellaneous filesystems ++# ++# CONFIG_ADFS_FS is not set ++# CONFIG_AFFS_FS is not set ++# CONFIG_HFS_FS is not set ++# CONFIG_HFSPLUS_FS is not set ++# CONFIG_BEFS_FS is not set ++# CONFIG_BFS_FS is not set ++# CONFIG_EFS_FS is not set ++CONFIG_JFFS2_FS=y ++CONFIG_JFFS2_FS_DEBUG=0 ++CONFIG_JFFS2_FS_WRITEBUFFER=y ++# CONFIG_JFFS2_FS_WBUF_VERIFY is not set ++CONFIG_JFFS2_SUMMARY=y ++# CONFIG_JFFS2_FS_XATTR is not set ++# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set ++CONFIG_JFFS2_ZLIB=y ++# CONFIG_JFFS2_LZO is not set ++CONFIG_JFFS2_RTIME=y ++# CONFIG_JFFS2_RUBIN is not set ++CONFIG_CRAMFS=y ++# CONFIG_VXFS_FS is not set ++# CONFIG_MINIX_FS is not set ++# CONFIG_OMFS_FS is not set ++# CONFIG_HPFS_FS is not set ++# CONFIG_QNX4FS_FS is not set ++CONFIG_ROMFS_FS=y ++# CONFIG_SYSV_FS is not set ++# CONFIG_UFS_FS is not set ++CONFIG_NETWORK_FILESYSTEMS=y ++# CONFIG_NFS_FS is not set ++# CONFIG_NFSD is not set ++# CONFIG_SMB_FS is not set ++# CONFIG_CIFS is not set ++# CONFIG_NCP_FS is not set ++# CONFIG_CODA_FS is not set ++# CONFIG_AFS_FS is not set ++ ++# ++# Partition Types ++# ++CONFIG_PARTITION_ADVANCED=y ++# CONFIG_ACORN_PARTITION is not set ++# CONFIG_OSF_PARTITION is not set ++# CONFIG_AMIGA_PARTITION is not set ++# CONFIG_ATARI_PARTITION is not set ++# CONFIG_MAC_PARTITION is not set ++CONFIG_MSDOS_PARTITION=y ++# CONFIG_BSD_DISKLABEL is not set ++# CONFIG_MINIX_SUBPARTITION is not set ++# CONFIG_SOLARIS_X86_PARTITION is not set ++# CONFIG_UNIXWARE_DISKLABEL is not set ++# CONFIG_LDM_PARTITION is not set ++# CONFIG_SGI_PARTITION is not set ++# CONFIG_ULTRIX_PARTITION is not set ++# CONFIG_SUN_PARTITION is not set ++# CONFIG_KARMA_PARTITION is not set ++# CONFIG_EFI_PARTITION is not set ++# CONFIG_SYSV68_PARTITION is not set ++CONFIG_NLS=y ++CONFIG_NLS_DEFAULT="iso8859-1" ++CONFIG_NLS_CODEPAGE_437=y ++# CONFIG_NLS_CODEPAGE_737 is not set ++# CONFIG_NLS_CODEPAGE_775 is not set ++# CONFIG_NLS_CODEPAGE_850 is not set ++# CONFIG_NLS_CODEPAGE_852 is not set ++# CONFIG_NLS_CODEPAGE_855 is not set ++# CONFIG_NLS_CODEPAGE_857 is not set ++# CONFIG_NLS_CODEPAGE_860 is not set ++# CONFIG_NLS_CODEPAGE_861 is not set ++# CONFIG_NLS_CODEPAGE_862 is not set ++# CONFIG_NLS_CODEPAGE_863 is not set ++# CONFIG_NLS_CODEPAGE_864 is not set ++# CONFIG_NLS_CODEPAGE_865 is not set ++# CONFIG_NLS_CODEPAGE_866 is not set ++# CONFIG_NLS_CODEPAGE_869 is not set ++# CONFIG_NLS_CODEPAGE_936 is not set ++# CONFIG_NLS_CODEPAGE_950 is not set ++# CONFIG_NLS_CODEPAGE_932 is not set ++# CONFIG_NLS_CODEPAGE_949 is not set ++# CONFIG_NLS_CODEPAGE_874 is not set ++# CONFIG_NLS_ISO8859_8 is not set ++# CONFIG_NLS_CODEPAGE_1250 is not set ++# CONFIG_NLS_CODEPAGE_1251 is not set ++# CONFIG_NLS_ASCII is not set ++CONFIG_NLS_ISO8859_1=y ++# CONFIG_NLS_ISO8859_2 is not set ++# CONFIG_NLS_ISO8859_3 is not set ++# CONFIG_NLS_ISO8859_4 is not set ++# CONFIG_NLS_ISO8859_5 is not set ++# CONFIG_NLS_ISO8859_6 is not set ++# CONFIG_NLS_ISO8859_7 is not set ++# CONFIG_NLS_ISO8859_9 is not set ++# CONFIG_NLS_ISO8859_13 is not set ++# CONFIG_NLS_ISO8859_14 is not set ++# CONFIG_NLS_ISO8859_15 is not set ++# CONFIG_NLS_KOI8_R is not set ++# CONFIG_NLS_KOI8_U is not set ++CONFIG_NLS_UTF8=y ++# CONFIG_DLM is not set ++ ++# ++# Kernel hacking ++# ++CONFIG_PRINTK_TIME=y ++CONFIG_ENABLE_WARN_DEPRECATED=y ++CONFIG_ENABLE_MUST_CHECK=y ++CONFIG_FRAME_WARN=1024 ++CONFIG_MAGIC_SYSRQ=y ++# CONFIG_UNUSED_SYMBOLS is not set ++# CONFIG_DEBUG_FS is not set ++# CONFIG_HEADERS_CHECK is not set ++CONFIG_DEBUG_KERNEL=y ++# CONFIG_DEBUG_SHIRQ is not set ++CONFIG_DETECT_SOFTLOCKUP=y ++# CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set ++CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0 ++CONFIG_SCHED_DEBUG=y ++# CONFIG_SCHEDSTATS is not set ++# CONFIG_TIMER_STATS is not set ++# CONFIG_DEBUG_OBJECTS is not set ++# CONFIG_SLUB_DEBUG_ON is not set ++# CONFIG_SLUB_STATS is not set ++CONFIG_DEBUG_RT_MUTEXES=y ++CONFIG_DEBUG_PI_LIST=y ++# CONFIG_RT_MUTEX_TESTER is not set ++CONFIG_DEBUG_SPINLOCK=y ++CONFIG_DEBUG_MUTEXES=y ++# CONFIG_DEBUG_LOCK_ALLOC is not set ++# CONFIG_PROVE_LOCKING is not set ++# CONFIG_LOCK_STAT is not set ++CONFIG_DEBUG_SPINLOCK_SLEEP=y ++# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set ++# CONFIG_DEBUG_KOBJECT is not set ++CONFIG_DEBUG_BUGVERBOSE=y ++CONFIG_DEBUG_INFO=y ++# CONFIG_DEBUG_VM is not set ++# CONFIG_DEBUG_WRITECOUNT is not set ++CONFIG_DEBUG_MEMORY_INIT=y ++# CONFIG_DEBUG_LIST is not set ++# CONFIG_DEBUG_SG is not set ++CONFIG_FRAME_POINTER=y ++# CONFIG_BOOT_PRINTK_DELAY is not set ++# CONFIG_RCU_TORTURE_TEST is not set ++# CONFIG_RCU_CPU_STALL_DETECTOR is not set ++# CONFIG_BACKTRACE_SELF_TEST is not set ++# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set ++# CONFIG_FAULT_INJECTION is not set ++# CONFIG_LATENCYTOP is not set ++CONFIG_SYSCTL_SYSCALL_CHECK=y ++CONFIG_HAVE_FUNCTION_TRACER=y ++ ++# ++# Tracers ++# ++# CONFIG_FUNCTION_TRACER is not set ++# CONFIG_SCHED_TRACER is not set ++# CONFIG_CONTEXT_SWITCH_TRACER is not set ++# CONFIG_BOOT_TRACER is not set ++# CONFIG_STACK_TRACER is not set ++CONFIG_DYNAMIC_PRINTK_DEBUG=y ++# CONFIG_SAMPLES is not set ++CONFIG_HAVE_ARCH_KGDB=y ++# CONFIG_KGDB is not set ++CONFIG_DEBUG_USER=y ++CONFIG_DEBUG_ERRORS=y ++# CONFIG_DEBUG_STACK_USAGE is not set ++CONFIG_DEBUG_LL=y ++# CONFIG_DEBUG_ICEDCC is not set ++CONFIG_DEBUG_S3C_PORT=y ++CONFIG_DEBUG_S3C_UART=3 ++ ++# ++# Security options ++# ++# CONFIG_KEYS is not set ++# CONFIG_SECURITY is not set ++# CONFIG_SECURITYFS is not set ++# CONFIG_SECURITY_FILE_CAPABILITIES is not set ++CONFIG_CRYPTO=y ++ ++# ++# Crypto core or helper ++# ++# CONFIG_CRYPTO_FIPS is not set ++CONFIG_CRYPTO_ALGAPI=y ++CONFIG_CRYPTO_AEAD=y ++CONFIG_CRYPTO_BLKCIPHER=y ++CONFIG_CRYPTO_HASH=y ++CONFIG_CRYPTO_RNG=y ++CONFIG_CRYPTO_MANAGER=y ++# CONFIG_CRYPTO_GF128MUL is not set ++# CONFIG_CRYPTO_NULL is not set ++# CONFIG_CRYPTO_CRYPTD is not set ++# CONFIG_CRYPTO_AUTHENC is not set ++# CONFIG_CRYPTO_TEST is not set ++ ++# ++# Authenticated Encryption with Associated Data ++# ++# CONFIG_CRYPTO_CCM is not set ++# CONFIG_CRYPTO_GCM is not set ++# CONFIG_CRYPTO_SEQIV is not set ++ ++# ++# Block modes ++# ++# CONFIG_CRYPTO_CBC is not set ++# CONFIG_CRYPTO_CTR is not set ++# CONFIG_CRYPTO_CTS is not set ++CONFIG_CRYPTO_ECB=y ++# CONFIG_CRYPTO_LRW is not set ++# CONFIG_CRYPTO_PCBC is not set ++# CONFIG_CRYPTO_XTS is not set ++ ++# ++# Hash modes ++# ++# CONFIG_CRYPTO_HMAC is not set ++# CONFIG_CRYPTO_XCBC is not set ++ ++# ++# Digest ++# ++# CONFIG_CRYPTO_CRC32C is not set ++# CONFIG_CRYPTO_MD4 is not set ++CONFIG_CRYPTO_MD5=y ++# CONFIG_CRYPTO_MICHAEL_MIC is not set ++# CONFIG_CRYPTO_RMD128 is not set ++# CONFIG_CRYPTO_RMD160 is not set ++# CONFIG_CRYPTO_RMD256 is not set ++# CONFIG_CRYPTO_RMD320 is not set ++CONFIG_CRYPTO_SHA1=y ++# CONFIG_CRYPTO_SHA256 is not set ++# CONFIG_CRYPTO_SHA512 is not set ++# CONFIG_CRYPTO_TGR192 is not set ++# CONFIG_CRYPTO_WP512 is not set ++ ++# ++# Ciphers ++# ++CONFIG_CRYPTO_AES=y ++# CONFIG_CRYPTO_ANUBIS is not set ++CONFIG_CRYPTO_ARC4=y ++# CONFIG_CRYPTO_BLOWFISH is not set ++# CONFIG_CRYPTO_CAMELLIA is not set ++# CONFIG_CRYPTO_CAST5 is not set ++# CONFIG_CRYPTO_CAST6 is not set ++# CONFIG_CRYPTO_DES is not set ++# CONFIG_CRYPTO_FCRYPT is not set ++# CONFIG_CRYPTO_KHAZAD is not set ++# CONFIG_CRYPTO_SALSA20 is not set ++# CONFIG_CRYPTO_SEED is not set ++# CONFIG_CRYPTO_SERPENT is not set ++# CONFIG_CRYPTO_TEA is not set ++# CONFIG_CRYPTO_TWOFISH is not set ++ ++# ++# Compression ++# ++# CONFIG_CRYPTO_DEFLATE is not set ++# CONFIG_CRYPTO_LZO is not set ++ ++# ++# Random Number Generation ++# ++# CONFIG_CRYPTO_ANSI_CPRNG is not set ++CONFIG_CRYPTO_HW=y ++ ++# ++# Library routines ++# ++CONFIG_BITREVERSE=y ++CONFIG_CRC_CCITT=y ++# CONFIG_CRC16 is not set ++# CONFIG_CRC_T10DIF is not set ++# CONFIG_CRC_ITU_T is not set ++CONFIG_CRC32=y ++# CONFIG_CRC7 is not set ++# CONFIG_LIBCRC32C is not set ++CONFIG_ZLIB_INFLATE=y ++CONFIG_ZLIB_DEFLATE=y ++CONFIG_PLIST=y ++CONFIG_HAS_IOMEM=y ++CONFIG_HAS_DMA=y +Index: linux-2.6.28/arch/arm/configs/s3c6400_defconfig +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-2.6.28/arch/arm/configs/s3c6400_defconfig 2009-01-02 00:01:56.000000000 +0100 +@@ -0,0 +1,845 @@ ++# ++# Automatically generated make config: don't edit ++# Linux kernel version: 2.6.28-rc3 ++# Mon Nov 3 10:10:30 2008 ++# ++CONFIG_ARM=y ++CONFIG_SYS_SUPPORTS_APM_EMULATION=y ++CONFIG_GENERIC_GPIO=y ++# CONFIG_GENERIC_TIME is not set ++# CONFIG_GENERIC_CLOCKEVENTS is not set ++CONFIG_MMU=y ++CONFIG_NO_IOPORT=y ++CONFIG_GENERIC_HARDIRQS=y ++CONFIG_STACKTRACE_SUPPORT=y ++CONFIG_HAVE_LATENCYTOP_SUPPORT=y ++CONFIG_LOCKDEP_SUPPORT=y ++CONFIG_TRACE_IRQFLAGS_SUPPORT=y ++CONFIG_HARDIRQS_SW_RESEND=y ++CONFIG_GENERIC_IRQ_PROBE=y ++CONFIG_RWSEM_GENERIC_SPINLOCK=y ++# CONFIG_ARCH_HAS_ILOG2_U32 is not set ++# CONFIG_ARCH_HAS_ILOG2_U64 is not set ++CONFIG_GENERIC_HWEIGHT=y ++CONFIG_GENERIC_CALIBRATE_DELAY=y ++CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y ++CONFIG_VECTORS_BASE=0xffff0000 ++CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" ++ ++# ++# General setup ++# ++CONFIG_EXPERIMENTAL=y ++CONFIG_BROKEN_ON_SMP=y ++CONFIG_INIT_ENV_ARG_LIMIT=32 ++CONFIG_LOCALVERSION="" ++CONFIG_LOCALVERSION_AUTO=y ++CONFIG_SWAP=y ++# CONFIG_SYSVIPC is not set ++# CONFIG_BSD_PROCESS_ACCT is not set ++# CONFIG_IKCONFIG is not set ++CONFIG_LOG_BUF_SHIFT=17 ++# CONFIG_CGROUPS is not set ++# CONFIG_GROUP_SCHED is not set ++CONFIG_SYSFS_DEPRECATED=y ++CONFIG_SYSFS_DEPRECATED_V2=y ++# CONFIG_RELAY is not set ++CONFIG_NAMESPACES=y ++# CONFIG_UTS_NS is not set ++# CONFIG_USER_NS is not set ++# CONFIG_PID_NS is not set ++CONFIG_BLK_DEV_INITRD=y ++CONFIG_INITRAMFS_SOURCE="" ++CONFIG_CC_OPTIMIZE_FOR_SIZE=y ++CONFIG_SYSCTL=y ++# CONFIG_EMBEDDED is not set ++CONFIG_UID16=y ++CONFIG_SYSCTL_SYSCALL=y ++CONFIG_KALLSYMS=y ++CONFIG_KALLSYMS_ALL=y ++# CONFIG_KALLSYMS_EXTRA_PASS is not set ++CONFIG_HOTPLUG=y ++CONFIG_PRINTK=y ++CONFIG_BUG=y ++CONFIG_ELF_CORE=y ++CONFIG_COMPAT_BRK=y ++CONFIG_BASE_FULL=y ++CONFIG_FUTEX=y ++CONFIG_ANON_INODES=y ++CONFIG_EPOLL=y ++CONFIG_SIGNALFD=y ++CONFIG_TIMERFD=y ++CONFIG_EVENTFD=y ++CONFIG_SHMEM=y ++CONFIG_AIO=y ++CONFIG_VM_EVENT_COUNTERS=y ++CONFIG_SLUB_DEBUG=y ++# CONFIG_SLAB is not set ++CONFIG_SLUB=y ++# CONFIG_SLOB is not set ++# CONFIG_PROFILING is not set ++# CONFIG_MARKERS is not set ++CONFIG_HAVE_OPROFILE=y ++# CONFIG_KPROBES is not set ++CONFIG_HAVE_KPROBES=y ++CONFIG_HAVE_KRETPROBES=y ++CONFIG_HAVE_CLK=y ++CONFIG_HAVE_GENERIC_DMA_COHERENT=y ++CONFIG_SLABINFO=y ++CONFIG_RT_MUTEXES=y ++# CONFIG_TINY_SHMEM is not set ++CONFIG_BASE_SMALL=0 ++CONFIG_MODULES=y ++# CONFIG_MODULE_FORCE_LOAD is not set ++CONFIG_MODULE_UNLOAD=y ++# CONFIG_MODULE_FORCE_UNLOAD is not set ++# CONFIG_MODVERSIONS is not set ++# CONFIG_MODULE_SRCVERSION_ALL is not set ++CONFIG_KMOD=y ++CONFIG_BLOCK=y ++CONFIG_LBD=y ++# CONFIG_BLK_DEV_IO_TRACE is not set ++CONFIG_LSF=y ++# CONFIG_BLK_DEV_BSG is not set ++# CONFIG_BLK_DEV_INTEGRITY is not set ++ ++# ++# IO Schedulers ++# ++CONFIG_IOSCHED_NOOP=y ++CONFIG_IOSCHED_AS=y ++CONFIG_IOSCHED_DEADLINE=y ++CONFIG_IOSCHED_CFQ=y ++# CONFIG_DEFAULT_AS is not set ++# CONFIG_DEFAULT_DEADLINE is not set ++CONFIG_DEFAULT_CFQ=y ++# CONFIG_DEFAULT_NOOP is not set ++CONFIG_DEFAULT_IOSCHED="cfq" ++CONFIG_CLASSIC_RCU=y ++# CONFIG_FREEZER is not set ++ ++# ++# System Type ++# ++# CONFIG_ARCH_AAEC2000 is not set ++# CONFIG_ARCH_INTEGRATOR is not set ++# CONFIG_ARCH_REALVIEW is not set ++# CONFIG_ARCH_VERSATILE is not set ++# CONFIG_ARCH_AT91 is not set ++# CONFIG_ARCH_CLPS7500 is not set ++# CONFIG_ARCH_CLPS711X is not set ++# CONFIG_ARCH_EBSA110 is not set ++# CONFIG_ARCH_EP93XX is not set ++# CONFIG_ARCH_FOOTBRIDGE is not set ++# CONFIG_ARCH_NETX is not set ++# CONFIG_ARCH_H720X is not set ++# CONFIG_ARCH_IMX is not set ++# CONFIG_ARCH_IOP13XX is not set ++# CONFIG_ARCH_IOP32X is not set ++# CONFIG_ARCH_IOP33X is not set ++# CONFIG_ARCH_IXP23XX is not set ++# CONFIG_ARCH_IXP2000 is not set ++# CONFIG_ARCH_IXP4XX is not set ++# CONFIG_ARCH_L7200 is not set ++# CONFIG_ARCH_KIRKWOOD is not set ++# CONFIG_ARCH_KS8695 is not set ++# CONFIG_ARCH_NS9XXX is not set ++# CONFIG_ARCH_LOKI is not set ++# CONFIG_ARCH_MV78XX0 is not set ++# CONFIG_ARCH_MXC is not set ++# CONFIG_ARCH_ORION5X is not set ++# CONFIG_ARCH_PNX4008 is not set ++# CONFIG_ARCH_PXA is not set ++# CONFIG_ARCH_RPC is not set ++# CONFIG_ARCH_SA1100 is not set ++# CONFIG_ARCH_S3C2410 is not set ++CONFIG_ARCH_S3C64XX=y ++# CONFIG_ARCH_SHARK is not set ++# CONFIG_ARCH_LH7A40X is not set ++# CONFIG_ARCH_DAVINCI is not set ++# CONFIG_ARCH_OMAP is not set ++# CONFIG_ARCH_MSM is not set ++CONFIG_PLAT_S3C64XX=y ++CONFIG_CPU_S3C6400_INIT=y ++CONFIG_CPU_S3C6400_CLOCK=y ++CONFIG_S3C64XX_SETUP_I2C0=y ++CONFIG_S3C64XX_SETUP_I2C1=y ++CONFIG_PLAT_S3C=y ++ ++# ++# Boot options ++# ++CONFIG_S3C_BOOT_ERROR_RESET=y ++ ++# ++# Power management ++# ++CONFIG_S3C_LOWLEVEL_UART_PORT=0 ++CONFIG_S3C_GPIO_SPACE=0 ++CONFIG_S3C_GPIO_TRACK=y ++CONFIG_S3C_GPIO_PULL_UPDOWN=y ++CONFIG_S3C_GPIO_CFG_S3C24XX=y ++CONFIG_S3C_GPIO_CFG_S3C64XX=y ++CONFIG_S3C_DEV_HSMMC=y ++CONFIG_S3C_DEV_HSMMC1=y ++CONFIG_S3C_DEV_I2C1=y ++CONFIG_CPU_S3C6410=y ++CONFIG_S3C6410_SETUP_SDHCI=y ++CONFIG_MACH_SMDK6410=y ++CONFIG_SMDK6410_SD_CH0=y ++# CONFIG_SMDK6410_SD_CH1 is not set ++ ++# ++# Processor Type ++# ++CONFIG_CPU_32=y ++CONFIG_CPU_V6=y ++CONFIG_CPU_32v6K=y ++CONFIG_CPU_32v6=y ++CONFIG_CPU_ABRT_EV6=y ++CONFIG_CPU_PABRT_NOIFAR=y ++CONFIG_CPU_CACHE_V6=y ++CONFIG_CPU_CACHE_VIPT=y ++CONFIG_CPU_COPY_V6=y ++CONFIG_CPU_TLB_V6=y ++CONFIG_CPU_HAS_ASID=y ++CONFIG_CPU_CP15=y ++CONFIG_CPU_CP15_MMU=y ++ ++# ++# Processor Features ++# ++CONFIG_ARM_THUMB=y ++# CONFIG_CPU_ICACHE_DISABLE is not set ++# CONFIG_CPU_DCACHE_DISABLE is not set ++# CONFIG_CPU_BPREDICT_DISABLE is not set ++# CONFIG_OUTER_CACHE is not set ++CONFIG_ARM_VIC=y ++ ++# ++# Bus support ++# ++# CONFIG_PCI_SYSCALL is not set ++# CONFIG_ARCH_SUPPORTS_MSI is not set ++# CONFIG_PCCARD is not set ++ ++# ++# Kernel Features ++# ++CONFIG_VMSPLIT_3G=y ++# CONFIG_VMSPLIT_2G is not set ++# CONFIG_VMSPLIT_1G is not set ++CONFIG_PAGE_OFFSET=0xC0000000 ++# CONFIG_PREEMPT is not set ++CONFIG_HZ=100 ++CONFIG_AEABI=y ++CONFIG_OABI_COMPAT=y ++CONFIG_ARCH_FLATMEM_HAS_HOLES=y ++# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set ++# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set ++CONFIG_SELECT_MEMORY_MODEL=y ++CONFIG_FLATMEM_MANUAL=y ++# CONFIG_DISCONTIGMEM_MANUAL is not set ++# CONFIG_SPARSEMEM_MANUAL is not set ++CONFIG_FLATMEM=y ++CONFIG_FLAT_NODE_MEM_MAP=y ++CONFIG_PAGEFLAGS_EXTENDED=y ++CONFIG_SPLIT_PTLOCK_CPUS=4 ++# CONFIG_RESOURCES_64BIT is not set ++# CONFIG_PHYS_ADDR_T_64BIT is not set ++CONFIG_ZONE_DMA_FLAG=0 ++CONFIG_VIRT_TO_BUS=y ++CONFIG_UNEVICTABLE_LRU=y ++CONFIG_ALIGNMENT_TRAP=y ++ ++# ++# Boot options ++# ++CONFIG_ZBOOT_ROM_TEXT=0 ++CONFIG_ZBOOT_ROM_BSS=0 ++CONFIG_CMDLINE="console=ttySAC0,115200 root=/dev/ram init=/bin/bash initrd=0x51000000,4M" ++# CONFIG_XIP_KERNEL is not set ++# CONFIG_KEXEC is not set ++ ++# ++# CPU Power Management ++# ++# CONFIG_CPU_IDLE is not set ++ ++# ++# Floating point emulation ++# ++ ++# ++# At least one emulation must be selected ++# ++# CONFIG_FPE_NWFPE is not set ++# CONFIG_FPE_FASTFPE is not set ++CONFIG_VFP=y ++ ++# ++# Userspace binary formats ++# ++CONFIG_BINFMT_ELF=y ++# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set ++CONFIG_HAVE_AOUT=y ++# CONFIG_BINFMT_AOUT is not set ++# CONFIG_BINFMT_MISC is not set ++ ++# ++# Power management options ++# ++# CONFIG_PM is not set ++CONFIG_ARCH_SUSPEND_POSSIBLE=y ++# CONFIG_NET is not set ++ ++# ++# Device Drivers ++# ++ ++# ++# Generic Driver Options ++# ++CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" ++CONFIG_STANDALONE=y ++CONFIG_PREVENT_FIRMWARE_BUILD=y ++CONFIG_FW_LOADER=y ++CONFIG_FIRMWARE_IN_KERNEL=y ++CONFIG_EXTRA_FIRMWARE="" ++# CONFIG_DEBUG_DRIVER is not set ++# CONFIG_DEBUG_DEVRES is not set ++# CONFIG_SYS_HYPERVISOR is not set ++# CONFIG_MTD is not set ++# CONFIG_PARPORT is not set ++CONFIG_BLK_DEV=y ++# CONFIG_BLK_DEV_COW_COMMON is not set ++CONFIG_BLK_DEV_LOOP=y ++# CONFIG_BLK_DEV_CRYPTOLOOP is not set ++CONFIG_BLK_DEV_RAM=y ++CONFIG_BLK_DEV_RAM_COUNT=16 ++CONFIG_BLK_DEV_RAM_SIZE=4096 ++# CONFIG_BLK_DEV_XIP is not set ++# CONFIG_CDROM_PKTCDVD is not set ++CONFIG_MISC_DEVICES=y ++# CONFIG_EEPROM_93CX6 is not set ++# CONFIG_ENCLOSURE_SERVICES is not set ++CONFIG_HAVE_IDE=y ++# CONFIG_IDE is not set ++ ++# ++# SCSI device support ++# ++# CONFIG_RAID_ATTRS is not set ++# CONFIG_SCSI is not set ++# CONFIG_SCSI_DMA is not set ++# CONFIG_SCSI_NETLINK is not set ++# CONFIG_ATA is not set ++# CONFIG_MD is not set ++ ++# ++# Input device support ++# ++CONFIG_INPUT=y ++# CONFIG_INPUT_FF_MEMLESS is not set ++# CONFIG_INPUT_POLLDEV is not set ++ ++# ++# Userland interfaces ++# ++CONFIG_INPUT_MOUSEDEV=y ++CONFIG_INPUT_MOUSEDEV_PSAUX=y ++CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 ++CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 ++# CONFIG_INPUT_JOYDEV is not set ++# CONFIG_INPUT_EVDEV is not set ++# CONFIG_INPUT_EVBUG is not set ++ ++# ++# Input Device Drivers ++# ++CONFIG_INPUT_KEYBOARD=y ++CONFIG_KEYBOARD_ATKBD=y ++# CONFIG_KEYBOARD_SUNKBD is not set ++# CONFIG_KEYBOARD_LKKBD is not set ++# CONFIG_KEYBOARD_XTKBD is not set ++# CONFIG_KEYBOARD_NEWTON is not set ++# CONFIG_KEYBOARD_STOWAWAY is not set ++# CONFIG_KEYBOARD_GPIO is not set ++CONFIG_INPUT_MOUSE=y ++CONFIG_MOUSE_PS2=y ++CONFIG_MOUSE_PS2_ALPS=y ++CONFIG_MOUSE_PS2_LOGIPS2PP=y ++CONFIG_MOUSE_PS2_SYNAPTICS=y ++CONFIG_MOUSE_PS2_LIFEBOOK=y ++CONFIG_MOUSE_PS2_TRACKPOINT=y ++# CONFIG_MOUSE_PS2_ELANTECH is not set ++# CONFIG_MOUSE_PS2_TOUCHKIT is not set ++# CONFIG_MOUSE_SERIAL is not set ++# CONFIG_MOUSE_APPLETOUCH is not set ++# CONFIG_MOUSE_BCM5974 is not set ++# CONFIG_MOUSE_VSXXXAA is not set ++# CONFIG_MOUSE_GPIO is not set ++# CONFIG_INPUT_JOYSTICK is not set ++# CONFIG_INPUT_TABLET is not set ++# CONFIG_INPUT_TOUCHSCREEN is not set ++# CONFIG_INPUT_MISC is not set ++ ++# ++# Hardware I/O ports ++# ++CONFIG_SERIO=y ++CONFIG_SERIO_SERPORT=y ++CONFIG_SERIO_LIBPS2=y ++# CONFIG_SERIO_RAW is not set ++# CONFIG_GAMEPORT is not set ++ ++# ++# Character devices ++# ++CONFIG_VT=y ++CONFIG_CONSOLE_TRANSLATIONS=y ++CONFIG_VT_CONSOLE=y ++CONFIG_HW_CONSOLE=y ++# CONFIG_VT_HW_CONSOLE_BINDING is not set ++CONFIG_DEVKMEM=y ++# CONFIG_SERIAL_NONSTANDARD is not set ++ ++# ++# Serial drivers ++# ++CONFIG_SERIAL_8250=y ++# CONFIG_SERIAL_8250_CONSOLE is not set ++CONFIG_SERIAL_8250_NR_UARTS=4 ++CONFIG_SERIAL_8250_RUNTIME_UARTS=4 ++# CONFIG_SERIAL_8250_EXTENDED is not set ++ ++# ++# Non-8250 serial port support ++# ++CONFIG_SERIAL_SAMSUNG=y ++CONFIG_SERIAL_SAMSUNG_UARTS=4 ++# CONFIG_SERIAL_SAMSUNG_DEBUG is not set ++CONFIG_SERIAL_SAMSUNG_CONSOLE=y ++CONFIG_SERIAL_S3C6400=y ++CONFIG_SERIAL_CORE=y ++CONFIG_SERIAL_CORE_CONSOLE=y ++CONFIG_UNIX98_PTYS=y ++CONFIG_LEGACY_PTYS=y ++CONFIG_LEGACY_PTY_COUNT=256 ++# CONFIG_IPMI_HANDLER is not set ++CONFIG_HW_RANDOM=y ++# CONFIG_NVRAM is not set ++# CONFIG_R3964 is not set ++# CONFIG_RAW_DRIVER is not set ++# CONFIG_TCG_TPM is not set ++CONFIG_I2C=y ++CONFIG_I2C_BOARDINFO=y ++CONFIG_I2C_CHARDEV=y ++CONFIG_I2C_HELPER_AUTO=y ++ ++# ++# I2C Hardware Bus support ++# ++ ++# ++# I2C system bus drivers (mostly embedded / system-on-chip) ++# ++# CONFIG_I2C_GPIO is not set ++# CONFIG_I2C_OCORES is not set ++CONFIG_I2C_S3C2410=y ++# CONFIG_I2C_SIMTEC is not set ++ ++# ++# External I2C/SMBus adapter drivers ++# ++# CONFIG_I2C_PARPORT_LIGHT is not set ++# CONFIG_I2C_TAOS_EVM is not set ++ ++# ++# Other I2C/SMBus bus drivers ++# ++# CONFIG_I2C_PCA_PLATFORM is not set ++# CONFIG_I2C_STUB is not set ++ ++# ++# Miscellaneous I2C Chip support ++# ++# CONFIG_DS1682 is not set ++CONFIG_AT24=y ++# CONFIG_SENSORS_EEPROM is not set ++# CONFIG_SENSORS_PCF8574 is not set ++# CONFIG_PCF8575 is not set ++# CONFIG_SENSORS_PCA9539 is not set ++# CONFIG_SENSORS_PCF8591 is not set ++# CONFIG_TPS65010 is not set ++# CONFIG_SENSORS_MAX6875 is not set ++# CONFIG_SENSORS_TSL2550 is not set ++# CONFIG_I2C_DEBUG_CORE is not set ++# CONFIG_I2C_DEBUG_ALGO is not set ++# CONFIG_I2C_DEBUG_BUS is not set ++# CONFIG_I2C_DEBUG_CHIP is not set ++# CONFIG_SPI is not set ++CONFIG_ARCH_REQUIRE_GPIOLIB=y ++CONFIG_GPIOLIB=y ++# CONFIG_DEBUG_GPIO is not set ++# CONFIG_GPIO_SYSFS is not set ++ ++# ++# I2C GPIO expanders: ++# ++# CONFIG_GPIO_MAX732X is not set ++# CONFIG_GPIO_PCA953X is not set ++# CONFIG_GPIO_PCF857X is not set ++ ++# ++# PCI GPIO expanders: ++# ++ ++# ++# SPI GPIO expanders: ++# ++# CONFIG_W1 is not set ++# CONFIG_POWER_SUPPLY is not set ++CONFIG_HWMON=y ++# CONFIG_HWMON_VID is not set ++# CONFIG_SENSORS_AD7414 is not set ++# CONFIG_SENSORS_AD7418 is not set ++# CONFIG_SENSORS_ADM1021 is not set ++# CONFIG_SENSORS_ADM1025 is not set ++# CONFIG_SENSORS_ADM1026 is not set ++# CONFIG_SENSORS_ADM1029 is not set ++# CONFIG_SENSORS_ADM1031 is not set ++# CONFIG_SENSORS_ADM9240 is not set ++# CONFIG_SENSORS_ADT7470 is not set ++# CONFIG_SENSORS_ADT7473 is not set ++# CONFIG_SENSORS_ATXP1 is not set ++# CONFIG_SENSORS_DS1621 is not set ++# CONFIG_SENSORS_F71805F is not set ++# CONFIG_SENSORS_F71882FG is not set ++# CONFIG_SENSORS_F75375S is not set ++# CONFIG_SENSORS_GL518SM is not set ++# CONFIG_SENSORS_GL520SM is not set ++# CONFIG_SENSORS_IT87 is not set ++# CONFIG_SENSORS_LM63 is not set ++# CONFIG_SENSORS_LM75 is not set ++# CONFIG_SENSORS_LM77 is not set ++# CONFIG_SENSORS_LM78 is not set ++# CONFIG_SENSORS_LM80 is not set ++# CONFIG_SENSORS_LM83 is not set ++# CONFIG_SENSORS_LM85 is not set ++# CONFIG_SENSORS_LM87 is not set ++# CONFIG_SENSORS_LM90 is not set ++# CONFIG_SENSORS_LM92 is not set ++# CONFIG_SENSORS_LM93 is not set ++# CONFIG_SENSORS_MAX1619 is not set ++# CONFIG_SENSORS_MAX6650 is not set ++# CONFIG_SENSORS_PC87360 is not set ++# CONFIG_SENSORS_PC87427 is not set ++# CONFIG_SENSORS_DME1737 is not set ++# CONFIG_SENSORS_SMSC47M1 is not set ++# CONFIG_SENSORS_SMSC47M192 is not set ++# CONFIG_SENSORS_SMSC47B397 is not set ++# CONFIG_SENSORS_ADS7828 is not set ++# CONFIG_SENSORS_THMC50 is not set ++# CONFIG_SENSORS_VT1211 is not set ++# CONFIG_SENSORS_W83781D is not set ++# CONFIG_SENSORS_W83791D is not set ++# CONFIG_SENSORS_W83792D is not set ++# CONFIG_SENSORS_W83793 is not set ++# CONFIG_SENSORS_W83L785TS is not set ++# CONFIG_SENSORS_W83L786NG is not set ++# CONFIG_SENSORS_W83627HF is not set ++# CONFIG_SENSORS_W83627EHF is not set ++# CONFIG_HWMON_DEBUG_CHIP is not set ++# CONFIG_THERMAL is not set ++# CONFIG_THERMAL_HWMON is not set ++# CONFIG_WATCHDOG is not set ++ ++# ++# Sonics Silicon Backplane ++# ++CONFIG_SSB_POSSIBLE=y ++# CONFIG_SSB is not set ++ ++# ++# Multifunction device drivers ++# ++# CONFIG_MFD_CORE is not set ++# CONFIG_MFD_SM501 is not set ++# CONFIG_MFD_ASIC3 is not set ++# CONFIG_HTC_EGPIO is not set ++# CONFIG_HTC_PASIC3 is not set ++# CONFIG_MFD_TMIO is not set ++# CONFIG_MFD_T7L66XB is not set ++# CONFIG_MFD_TC6387XB is not set ++# CONFIG_MFD_TC6393XB is not set ++# CONFIG_PMIC_DA903X is not set ++# CONFIG_MFD_WM8400 is not set ++# CONFIG_MFD_WM8350_I2C is not set ++ ++# ++# Multimedia devices ++# ++ ++# ++# Multimedia core support ++# ++# CONFIG_VIDEO_DEV is not set ++# CONFIG_VIDEO_MEDIA is not set ++ ++# ++# Multimedia drivers ++# ++# CONFIG_DAB is not set ++ ++# ++# Graphics support ++# ++# CONFIG_VGASTATE is not set ++# CONFIG_VIDEO_OUTPUT_CONTROL is not set ++# CONFIG_FB is not set ++# CONFIG_BACKLIGHT_LCD_SUPPORT is not set ++ ++# ++# Display device support ++# ++# CONFIG_DISPLAY_SUPPORT is not set ++ ++# ++# Console display driver support ++# ++# CONFIG_VGA_CONSOLE is not set ++CONFIG_DUMMY_CONSOLE=y ++# CONFIG_SOUND is not set ++CONFIG_HID_SUPPORT=y ++CONFIG_HID=y ++CONFIG_HID_DEBUG=y ++# CONFIG_HIDRAW is not set ++# CONFIG_HID_PID is not set ++ ++# ++# Special HID drivers ++# ++# CONFIG_HID_COMPAT is not set ++CONFIG_USB_SUPPORT=y ++CONFIG_USB_ARCH_HAS_HCD=y ++# CONFIG_USB_ARCH_HAS_OHCI is not set ++# CONFIG_USB_ARCH_HAS_EHCI is not set ++# CONFIG_USB is not set ++ ++# ++# Enable Host or Gadget support to see Inventra options ++# ++ ++# ++# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' ++# ++# CONFIG_USB_GADGET is not set ++CONFIG_MMC=y ++CONFIG_MMC_DEBUG=y ++CONFIG_MMC_UNSAFE_RESUME=y ++ ++# ++# MMC/SD/SDIO Card Drivers ++# ++CONFIG_MMC_BLOCK=y ++CONFIG_MMC_BLOCK_BOUNCE=y ++CONFIG_SDIO_UART=y ++# CONFIG_MMC_TEST is not set ++ ++# ++# MMC/SD/SDIO Host Controller Drivers ++# ++CONFIG_MMC_SDHCI=y ++CONFIG_MMC_SDHCI_S3C=y ++# CONFIG_MEMSTICK is not set ++# CONFIG_ACCESSIBILITY is not set ++# CONFIG_NEW_LEDS is not set ++CONFIG_RTC_LIB=y ++# CONFIG_RTC_CLASS is not set ++# CONFIG_DMADEVICES is not set ++ ++# ++# Voltage and Current regulators ++# ++# CONFIG_REGULATOR is not set ++# CONFIG_REGULATOR_FIXED_VOLTAGE is not set ++# CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set ++# CONFIG_REGULATOR_BQ24022 is not set ++# CONFIG_UIO is not set ++ ++# ++# File systems ++# ++CONFIG_EXT2_FS=y ++# CONFIG_EXT2_FS_XATTR is not set ++# CONFIG_EXT2_FS_XIP is not set ++CONFIG_EXT3_FS=y ++CONFIG_EXT3_FS_XATTR=y ++CONFIG_EXT3_FS_POSIX_ACL=y ++CONFIG_EXT3_FS_SECURITY=y ++# CONFIG_EXT4_FS is not set ++CONFIG_JBD=y ++CONFIG_FS_MBCACHE=y ++# CONFIG_REISERFS_FS is not set ++# CONFIG_JFS_FS is not set ++CONFIG_FS_POSIX_ACL=y ++CONFIG_FILE_LOCKING=y ++# CONFIG_XFS_FS is not set ++# CONFIG_GFS2_FS is not set ++CONFIG_DNOTIFY=y ++CONFIG_INOTIFY=y ++CONFIG_INOTIFY_USER=y ++# CONFIG_QUOTA is not set ++# CONFIG_AUTOFS_FS is not set ++# CONFIG_AUTOFS4_FS is not set ++# CONFIG_FUSE_FS is not set ++CONFIG_GENERIC_ACL=y ++ ++# ++# CD-ROM/DVD Filesystems ++# ++# CONFIG_ISO9660_FS is not set ++# CONFIG_UDF_FS is not set ++ ++# ++# DOS/FAT/NT Filesystems ++# ++# CONFIG_MSDOS_FS is not set ++# CONFIG_VFAT_FS is not set ++# CONFIG_NTFS_FS is not set ++ ++# ++# Pseudo filesystems ++# ++CONFIG_PROC_FS=y ++CONFIG_PROC_SYSCTL=y ++CONFIG_PROC_PAGE_MONITOR=y ++CONFIG_SYSFS=y ++CONFIG_TMPFS=y ++CONFIG_TMPFS_POSIX_ACL=y ++# CONFIG_HUGETLB_PAGE is not set ++# CONFIG_CONFIGFS_FS is not set ++ ++# ++# Miscellaneous filesystems ++# ++# CONFIG_ADFS_FS is not set ++# CONFIG_AFFS_FS is not set ++# CONFIG_HFS_FS is not set ++# CONFIG_HFSPLUS_FS is not set ++# CONFIG_BEFS_FS is not set ++# CONFIG_BFS_FS is not set ++# CONFIG_EFS_FS is not set ++CONFIG_CRAMFS=y ++# CONFIG_VXFS_FS is not set ++# CONFIG_MINIX_FS is not set ++# CONFIG_OMFS_FS is not set ++# CONFIG_HPFS_FS is not set ++# CONFIG_QNX4FS_FS is not set ++CONFIG_ROMFS_FS=y ++# CONFIG_SYSV_FS is not set ++# CONFIG_UFS_FS is not set ++ ++# ++# Partition Types ++# ++# CONFIG_PARTITION_ADVANCED is not set ++CONFIG_MSDOS_PARTITION=y ++# CONFIG_NLS is not set ++ ++# ++# Kernel hacking ++# ++# CONFIG_PRINTK_TIME is not set ++CONFIG_ENABLE_WARN_DEPRECATED=y ++CONFIG_ENABLE_MUST_CHECK=y ++CONFIG_FRAME_WARN=1024 ++CONFIG_MAGIC_SYSRQ=y ++# CONFIG_UNUSED_SYMBOLS is not set ++# CONFIG_DEBUG_FS is not set ++# CONFIG_HEADERS_CHECK is not set ++CONFIG_DEBUG_KERNEL=y ++# CONFIG_DEBUG_SHIRQ is not set ++CONFIG_DETECT_SOFTLOCKUP=y ++# CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set ++CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0 ++CONFIG_SCHED_DEBUG=y ++# CONFIG_SCHEDSTATS is not set ++# CONFIG_TIMER_STATS is not set ++# CONFIG_DEBUG_OBJECTS is not set ++# CONFIG_SLUB_DEBUG_ON is not set ++# CONFIG_SLUB_STATS is not set ++CONFIG_DEBUG_RT_MUTEXES=y ++CONFIG_DEBUG_PI_LIST=y ++# CONFIG_RT_MUTEX_TESTER is not set ++CONFIG_DEBUG_SPINLOCK=y ++CONFIG_DEBUG_MUTEXES=y ++# CONFIG_DEBUG_LOCK_ALLOC is not set ++# CONFIG_PROVE_LOCKING is not set ++# CONFIG_LOCK_STAT is not set ++CONFIG_DEBUG_SPINLOCK_SLEEP=y ++# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set ++# CONFIG_DEBUG_KOBJECT is not set ++CONFIG_DEBUG_BUGVERBOSE=y ++CONFIG_DEBUG_INFO=y ++# CONFIG_DEBUG_VM is not set ++# CONFIG_DEBUG_WRITECOUNT is not set ++CONFIG_DEBUG_MEMORY_INIT=y ++# CONFIG_DEBUG_LIST is not set ++# CONFIG_DEBUG_SG is not set ++CONFIG_FRAME_POINTER=y ++# CONFIG_BOOT_PRINTK_DELAY is not set ++# CONFIG_RCU_TORTURE_TEST is not set ++# CONFIG_RCU_CPU_STALL_DETECTOR is not set ++# CONFIG_BACKTRACE_SELF_TEST is not set ++# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set ++# CONFIG_FAULT_INJECTION is not set ++# CONFIG_LATENCYTOP is not set ++CONFIG_SYSCTL_SYSCALL_CHECK=y ++CONFIG_HAVE_FUNCTION_TRACER=y ++ ++# ++# Tracers ++# ++# CONFIG_FUNCTION_TRACER is not set ++# CONFIG_SCHED_TRACER is not set ++# CONFIG_CONTEXT_SWITCH_TRACER is not set ++# CONFIG_BOOT_TRACER is not set ++# CONFIG_STACK_TRACER is not set ++# CONFIG_DYNAMIC_PRINTK_DEBUG is not set ++# CONFIG_SAMPLES is not set ++CONFIG_HAVE_ARCH_KGDB=y ++# CONFIG_KGDB is not set ++CONFIG_DEBUG_USER=y ++CONFIG_DEBUG_ERRORS=y ++# CONFIG_DEBUG_STACK_USAGE is not set ++CONFIG_DEBUG_LL=y ++# CONFIG_DEBUG_ICEDCC is not set ++CONFIG_DEBUG_S3C_PORT=y ++CONFIG_DEBUG_S3C_UART=0 ++ ++# ++# Security options ++# ++# CONFIG_KEYS is not set ++# CONFIG_SECURITY is not set ++# CONFIG_SECURITYFS is not set ++# CONFIG_SECURITY_FILE_CAPABILITIES is not set ++# CONFIG_CRYPTO is not set ++ ++# ++# Library routines ++# ++CONFIG_BITREVERSE=y ++# CONFIG_CRC_CCITT is not set ++# CONFIG_CRC16 is not set ++# CONFIG_CRC_T10DIF is not set ++# CONFIG_CRC_ITU_T is not set ++CONFIG_CRC32=y ++# CONFIG_CRC7 is not set ++# CONFIG_LIBCRC32C is not set ++CONFIG_ZLIB_INFLATE=y ++CONFIG_PLIST=y ++CONFIG_HAS_IOMEM=y ++CONFIG_HAS_DMA=y +Index: linux-2.6.28/arch/arm/Kconfig +=================================================================== +--- linux-2.6.28.orig/arch/arm/Kconfig 2008-12-25 00:26:37.000000000 +0100 ++++ linux-2.6.28/arch/arm/Kconfig 2009-01-02 00:01:56.000000000 +0100 +@@ -498,6 +498,13 @@ config ARCH_S3C2410 + BAST (), the IPAQ 1940 or + the Samsung SMDK2410 development board (and derivatives). + ++config ARCH_S3C64XX ++ bool "Samsung S3C64XX" ++ select GENERIC_GPIO ++ select HAVE_CLK ++ help ++ Samsung S3C64XX series based systems ++ + config ARCH_SHARK + bool "Shark" + select ISA +@@ -590,6 +597,7 @@ source "arch/arm/mach-orion5x/Kconfig" + source "arch/arm/mach-kirkwood/Kconfig" + + source "arch/arm/plat-s3c24xx/Kconfig" ++source "arch/arm/plat-s3c64xx/Kconfig" + source "arch/arm/plat-s3c/Kconfig" + + if ARCH_S3C2410 +@@ -601,6 +609,11 @@ source "arch/arm/mach-s3c2442/Kconfig" + source "arch/arm/mach-s3c2443/Kconfig" + endif + ++if ARCH_S3C64XX ++source "arch/arm/mach-s3c6400/Kconfig" ++source "arch/arm/mach-s3c6410/Kconfig" ++endif ++ + source "arch/arm/mach-lh7a40x/Kconfig" + + source "arch/arm/mach-imx/Kconfig" +@@ -1256,6 +1269,8 @@ source "drivers/usb/Kconfig" + + source "drivers/uwb/Kconfig" + ++source "drivers/ar6000/Kconfig" ++ + source "drivers/mmc/Kconfig" + + source "drivers/memstick/Kconfig" +@@ -1268,6 +1283,8 @@ source "drivers/rtc/Kconfig" + + source "drivers/dma/Kconfig" + ++source "drivers/android/Kconfig" ++ + source "drivers/dca/Kconfig" + + source "drivers/auxdisplay/Kconfig" +Index: linux-2.6.28/arch/arm/kernel/vmlinux.lds.S +=================================================================== +--- linux-2.6.28.orig/arch/arm/kernel/vmlinux.lds.S 2008-12-25 00:26:37.000000000 +0100 ++++ linux-2.6.28/arch/arm/kernel/vmlinux.lds.S 2009-01-02 00:01:56.000000000 +0100 +@@ -106,6 +106,8 @@ SECTIONS + *(.got) /* Global offset table */ + } + ++ NOTES ++ + RODATA + + _etext = .; /* End of text and rodata section */ +Index: linux-2.6.28/arch/arm/mach-s3c2410/clock.c +=================================================================== +--- linux-2.6.28.orig/arch/arm/mach-s3c2410/clock.c 2008-12-25 00:26:37.000000000 +0100 ++++ /dev/null 1970-01-01 00:00:00.000000000 +0000 +@@ -1,276 +0,0 @@ +-/* linux/arch/arm/mach-s3c2410/clock.c +- * +- * Copyright (c) 2006 Simtec Electronics +- * Ben Dooks +- * +- * S3C2410,S3C2440,S3C2442 Clock control support +- * +- * This program is free software; you can redistribute it and/or modify +- * it under the terms of the GNU General Public License as published by +- * the Free Software Foundation; either version 2 of the License, or +- * (at your option) any later version. +- * +- * This program is distributed in the hope that it will be useful, +- * but WITHOUT ANY WARRANTY; without even the implied warranty of +- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +- * GNU General Public License for more details. +- * +- * You should have received a copy of the GNU General Public License +- * along with this program; if not, write to the Free Software +- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA +-*/ +- +-#include +-#include +-#include +-#include +-#include +-#include +-#include +-#include +-#include +-#include +-#include +-#include +- +-#include +- +-#include +- +-#include +-#include +-#include +- +-#include +-#include +-#include +- +-int s3c2410_clkcon_enable(struct clk *clk, int enable) +-{ +- unsigned int clocks = clk->ctrlbit; +- unsigned long clkcon; +- +- clkcon = __raw_readl(S3C2410_CLKCON); +- +- if (enable) +- clkcon |= clocks; +- else +- clkcon &= ~clocks; +- +- /* ensure none of the special function bits set */ +- clkcon &= ~(S3C2410_CLKCON_IDLE|S3C2410_CLKCON_POWER); +- +- __raw_writel(clkcon, S3C2410_CLKCON); +- +- return 0; +-} +- +-static int s3c2410_upll_enable(struct clk *clk, int enable) +-{ +- unsigned long clkslow = __raw_readl(S3C2410_CLKSLOW); +- unsigned long orig = clkslow; +- +- if (enable) +- clkslow &= ~S3C2410_CLKSLOW_UCLK_OFF; +- else +- clkslow |= S3C2410_CLKSLOW_UCLK_OFF; +- +- __raw_writel(clkslow, S3C2410_CLKSLOW); +- +- /* if we started the UPLL, then allow to settle */ +- +- if (enable && (orig & S3C2410_CLKSLOW_UCLK_OFF)) +- udelay(200); +- +- return 0; +-} +- +-/* standard clock definitions */ +- +-static struct clk init_clocks_disable[] = { +- { +- .name = "nand", +- .id = -1, +- .parent = &clk_h, +- .enable = s3c2410_clkcon_enable, +- .ctrlbit = S3C2410_CLKCON_NAND, +- }, { +- .name = "sdi", +- .id = -1, +- .parent = &clk_p, +- .enable = s3c2410_clkcon_enable, +- .ctrlbit = S3C2410_CLKCON_SDI, +- }, { +- .name = "adc", +- .id = -1, +- .parent = &clk_p, +- .enable = s3c2410_clkcon_enable, +- .ctrlbit = S3C2410_CLKCON_ADC, +- }, { +- .name = "i2c", +- .id = -1, +- .parent = &clk_p, +- .enable = s3c2410_clkcon_enable, +- .ctrlbit = S3C2410_CLKCON_IIC, +- }, { +- .name = "iis", +- .id = -1, +- .parent = &clk_p, +- .enable = s3c2410_clkcon_enable, +- .ctrlbit = S3C2410_CLKCON_IIS, +- }, { +- .name = "spi", +- .id = -1, +- .parent = &clk_p, +- .enable = s3c2410_clkcon_enable, +- .ctrlbit = S3C2410_CLKCON_SPI, +- } +-}; +- +-static struct clk init_clocks[] = { +- { +- .name = "lcd", +- .id = -1, +- .parent = &clk_h, +- .enable = s3c2410_clkcon_enable, +- .ctrlbit = S3C2410_CLKCON_LCDC, +- }, { +- .name = "gpio", +- .id = -1, +- .parent = &clk_p, +- .enable = s3c2410_clkcon_enable, +- .ctrlbit = S3C2410_CLKCON_GPIO, +- }, { +- .name = "usb-host", +- .id = -1, +- .parent = &clk_h, +- .enable = s3c2410_clkcon_enable, +- .ctrlbit = S3C2410_CLKCON_USBH, +- }, { +- .name = "usb-device", +- .id = -1, +- .parent = &clk_h, +- .enable = s3c2410_clkcon_enable, +- .ctrlbit = S3C2410_CLKCON_USBD, +- }, { +- .name = "timers", +- .id = -1, +- .parent = &clk_p, +- .enable = s3c2410_clkcon_enable, +- .ctrlbit = S3C2410_CLKCON_PWMT, +- }, { +- .name = "uart", +- .id = 0, +- .parent = &clk_p, +- .enable = s3c2410_clkcon_enable, +- .ctrlbit = S3C2410_CLKCON_UART0, +- }, { +- .name = "uart", +- .id = 1, +- .parent = &clk_p, +- .enable = s3c2410_clkcon_enable, +- .ctrlbit = S3C2410_CLKCON_UART1, +- }, { +- .name = "uart", +- .id = 2, +- .parent = &clk_p, +- .enable = s3c2410_clkcon_enable, +- .ctrlbit = S3C2410_CLKCON_UART2, +- }, { +- .name = "rtc", +- .id = -1, +- .parent = &clk_p, +- .enable = s3c2410_clkcon_enable, +- .ctrlbit = S3C2410_CLKCON_RTC, +- }, { +- .name = "watchdog", +- .id = -1, +- .parent = &clk_p, +- .ctrlbit = 0, +- }, { +- .name = "usb-bus-host", +- .id = -1, +- .parent = &clk_usb_bus, +- }, { +- .name = "usb-bus-gadget", +- .id = -1, +- .parent = &clk_usb_bus, +- }, +-}; +- +-/* s3c2410_baseclk_add() +- * +- * Add all the clocks used by the s3c2410 or compatible CPUs +- * such as the S3C2440 and S3C2442. +- * +- * We cannot use a system device as we are needed before any +- * of the init-calls that initialise the devices are actually +- * done. +-*/ +- +-int __init s3c2410_baseclk_add(void) +-{ +- unsigned long clkslow = __raw_readl(S3C2410_CLKSLOW); +- unsigned long clkcon = __raw_readl(S3C2410_CLKCON); +- struct clk *clkp; +- struct clk *xtal; +- int ret; +- int ptr; +- +- clk_upll.enable = s3c2410_upll_enable; +- +- if (s3c24xx_register_clock(&clk_usb_bus) < 0) +- printk(KERN_ERR "failed to register usb bus clock\n"); +- +- /* register clocks from clock array */ +- +- clkp = init_clocks; +- for (ptr = 0; ptr < ARRAY_SIZE(init_clocks); ptr++, clkp++) { +- /* ensure that we note the clock state */ +- +- clkp->usage = clkcon & clkp->ctrlbit ? 1 : 0; +- +- ret = s3c24xx_register_clock(clkp); +- if (ret < 0) { +- printk(KERN_ERR "Failed to register clock %s (%d)\n", +- clkp->name, ret); +- } +- } +- +- /* We must be careful disabling the clocks we are not intending to +- * be using at boot time, as subsystems such as the LCD which do +- * their own DMA requests to the bus can cause the system to lockup +- * if they where in the middle of requesting bus access. +- * +- * Disabling the LCD clock if the LCD is active is very dangerous, +- * and therefore the bootloader should be careful to not enable +- * the LCD clock if it is not needed. +- */ +- +- /* install (and disable) the clocks we do not need immediately */ +- +- clkp = init_clocks_disable; +- for (ptr = 0; ptr < ARRAY_SIZE(init_clocks_disable); ptr++, clkp++) { +- +- ret = s3c24xx_register_clock(clkp); +- if (ret < 0) { +- printk(KERN_ERR "Failed to register clock %s (%d)\n", +- clkp->name, ret); +- } +- +- s3c2410_clkcon_enable(clkp, 0); +- } +- +- /* show the clock-slow value */ +- +- xtal = clk_get(NULL, "xtal"); +- +- printk("CLOCK: Slow mode (%ld.%ld MHz), %s, MPLL %s, UPLL %s\n", +- print_mhz(clk_get_rate(xtal) / +- ( 2 * S3C2410_CLKSLOW_GET_SLOWVAL(clkslow))), +- (clkslow & S3C2410_CLKSLOW_SLOW) ? "slow" : "fast", +- (clkslow & S3C2410_CLKSLOW_MPLL_OFF) ? "off" : "on", +- (clkslow & S3C2410_CLKSLOW_UCLK_OFF) ? "off" : "on"); +- +- return 0; +-} +Index: linux-2.6.28/arch/arm/mach-s3c2410/dma.c +=================================================================== +--- linux-2.6.28.orig/arch/arm/mach-s3c2410/dma.c 2008-12-25 00:26:37.000000000 +0100 ++++ linux-2.6.28/arch/arm/mach-s3c2410/dma.c 2009-01-02 00:01:56.000000000 +0100 +@@ -25,12 +25,12 @@ + + #include + #include +-#include ++#include + #include + #include + #include + #include +-#include ++#include + + static struct s3c24xx_dma_map __initdata s3c2410_dma_mappings[] = { + [DMACH_XD0] = { +Index: linux-2.6.28/arch/arm/mach-s3c2410/include/mach/fiq_ipc_gta02.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-2.6.28/arch/arm/mach-s3c2410/include/mach/fiq_ipc_gta02.h 2009-01-02 00:01:56.000000000 +0100 +@@ -0,0 +1,60 @@ ++#ifndef _LINUX_FIQ_IPC_H ++#define _LINUX_FIQ_IPC_H ++ ++/* ++ * this defines the struct which is used to communicate between the FIQ ++ * world and the normal linux kernel world. One of these structs is ++ * statically defined for you in the monolithic kernel so the FIQ ISR code ++ * can safely touch it any any time. ++ * ++ * You also want to include this file in your kernel module that wants to ++ * communicate with your FIQ code. Add any kinds of vars that are used by ++ * the FIQ ISR and the module in here. ++ * ++ * To get you started there is just an int that is incremented every FIQ ++ * you can remove this when you are ready to customize, but it is useful ++ * for testing ++ */ ++ ++#include ++#include ++ ++extern u8 fiq_ready; ++ ++enum hdq_bitbang_states { ++ HDQB_IDLE = 0, ++ HDQB_TX_BREAK, ++ HDQB_TX_BREAK_RECOVERY, ++ HDQB_ADS_CALC, ++ HDQB_ADS_LOW, ++ HDQB_ADS_HIGH, ++ HDQB_WAIT_RX, ++ HDQB_DATA_RX_LOW, ++ HDQB_DATA_RX_HIGH, ++ HDQB_WAIT_TX, ++}; ++ ++struct fiq_ipc { ++ /* vibrator */ ++ unsigned long vib_gpio_pin; /* which pin to meddle with */ ++ u8 vib_pwm; /* 0 = OFF -- will ensure GPIO deasserted and stop FIQ */ ++ u8 vib_pwm_latched; ++ ++ /* hdq */ ++ u8 hdq_probed; /* nonzero after HDQ driver probed */ ++ struct mutex hdq_lock; /* if you want to use hdq, you have to take lock */ ++ unsigned long hdq_gpio_pin; /* GTA02 = GPD14 which pin to meddle with */ ++ u8 hdq_ads; /* b7..b6 = register address, b0 = r/w */ ++ u8 hdq_tx_data; /* data to tx for write action */ ++ u8 hdq_rx_data; /* data received in read action */ ++ u8 hdq_request_ctr; /* incremented by "user" to request a transfer */ ++ u8 hdq_transaction_ctr; /* incremented after each transfer */ ++ u8 hdq_error; /* 0 = no error */ ++}; ++ ++/* actual definition lives in arch/arm/mach-s3c2440/fiq_c_isr.c */ ++extern struct fiq_ipc fiq_ipc; ++extern unsigned long _fiq_count_fiqs; ++extern void fiq_kick(void); /* provoke a FIQ "immediately" */ ++ ++#endif /* _LINUX_FIQ_IPC_H */ +Index: linux-2.6.28/arch/arm/mach-s3c2410/include/mach/gpio-core.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-2.6.28/arch/arm/mach-s3c2410/include/mach/gpio-core.h 2009-01-02 00:01:56.000000000 +0100 +@@ -0,0 +1,21 @@ ++/* arch/arm/mach-s3c24100/include/mach/gpio-core.h ++ * ++ * Copyright 2008 Openmoko, Inc. ++ * Copyright 2008 Simtec Electronics ++ * Ben Dooks ++ * http://armlinux.simtec.co.uk/ ++ * ++ * S3C2410 - GPIO core support ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation. ++*/ ++ ++#ifndef __ASM_ARCH_GPIO_CORE_H ++#define __ASM_ARCH_GPIO_CORE_H __FILE__ ++ ++/* currently we just include the platform support */ ++#include ++ ++#endif /* __ASM_ARCH_GPIO_CORE_H */ +Index: linux-2.6.28/arch/arm/mach-s3c2410/include/mach/gpio.h +=================================================================== +--- linux-2.6.28.orig/arch/arm/mach-s3c2410/include/mach/gpio.h 2008-12-25 00:26:37.000000000 +0100 ++++ linux-2.6.28/arch/arm/mach-s3c2410/include/mach/gpio.h 2009-01-02 00:01:56.000000000 +0100 +@@ -15,4 +15,14 @@ + #define gpio_set_value __gpio_set_value + #define gpio_cansleep __gpio_cansleep + ++/* These two defines should be removed as soon as the ++ * generic irq handling makes it upstream */ ++#include ++#define gpio_to_irq(gpio) s3c2410_gpio_getirq(gpio) ++#define irq_to_gpio(irq) s3c2410_gpio_irq2pin(irq) ++/* -- cut to here when generic irq makes it */ ++ + #include ++#include ++ ++#define S3C_GPIO_END (S3C2410_GPIO_BANKH + 32) +Index: linux-2.6.28/arch/arm/mach-s3c2410/include/mach/gpio-nrs.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-2.6.28/arch/arm/mach-s3c2410/include/mach/gpio-nrs.h 2009-01-02 00:01:56.000000000 +0100 +@@ -0,0 +1,23 @@ ++/* arch/arm/mach-s3c2410/include/mach/gpio-nrs.h ++ * ++ * Copyright (c) 2008 Simtec Electronics ++ * http://armlinux.simtec.co.uk/ ++ * Ben Dooks ++ * ++ * S3C2410 - GPIO bank numbering ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation. ++*/ ++ ++#define S3C2410_GPIONO(bank,offset) ((bank) + (offset)) ++ ++#define S3C2410_GPIO_BANKA (32*0) ++#define S3C2410_GPIO_BANKB (32*1) ++#define S3C2410_GPIO_BANKC (32*2) ++#define S3C2410_GPIO_BANKD (32*3) ++#define S3C2410_GPIO_BANKE (32*4) ++#define S3C2410_GPIO_BANKF (32*5) ++#define S3C2410_GPIO_BANKG (32*6) ++#define S3C2410_GPIO_BANKH (32*7) +Index: linux-2.6.28/arch/arm/mach-s3c2410/include/mach/gta01.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-2.6.28/arch/arm/mach-s3c2410/include/mach/gta01.h 2009-01-02 00:01:56.000000000 +0100 +@@ -0,0 +1,74 @@ ++#ifndef _GTA01_H ++#define _GTA01_H ++ ++#include ++#include ++ ++/* Different hardware revisions, passed in ATAG_REVISION by u-boot */ ++#define GTA01v3_SYSTEM_REV 0x00000130 ++#define GTA01v4_SYSTEM_REV 0x00000140 ++#define GTA01Bv2_SYSTEM_REV 0x00000220 ++#define GTA01Bv3_SYSTEM_REV 0x00000230 ++#define GTA01Bv4_SYSTEM_REV 0x00000240 ++ ++/* Backlight */ ++ ++extern void gta01bl_deferred_resume(void); ++ ++struct gta01bl_machinfo { ++ unsigned int default_intensity; ++ unsigned int max_intensity; ++ unsigned int limit_mask; ++ unsigned int defer_resume_backlight; ++}; ++ ++/* Definitions common to all revisions */ ++#define GTA01_GPIO_BACKLIGHT S3C2410_GPB0 ++#define GTA01_GPIO_GPS_PWRON S3C2410_GPB1 ++#define GTA01_GPIO_MODEM_RST S3C2410_GPB6 ++#define GTA01_GPIO_MODEM_ON S3C2410_GPB7 ++#define GTA01_GPIO_LCD_RESET S3C2410_GPC6 ++#define GTA01_GPIO_PMU_IRQ S3C2410_GPG8 ++#define GTA01_GPIO_JACK_INSERT S3C2410_GPF4 ++#define GTA01_GPIO_nSD_DETECT S3C2410_GPF5 ++#define GTA01_GPIO_AUX_KEY S3C2410_GPF6 ++#define GTA01_GPIO_HOLD_KEY S3C2410_GPF7 ++#define GTA01_GPIO_VIBRATOR_ON S3C2410_GPG11 ++ ++#define GTA01_IRQ_MODEM IRQ_EINT1 ++#define GTA01_IRQ_JACK_INSERT IRQ_EINT4 ++#define GTA01_IRQ_nSD_DETECT IRQ_EINT5 ++#define GTA01_IRQ_AUX_KEY IRQ_EINT6 ++#define GTA01_IRQ_PCF50606 IRQ_EINT16 ++ ++/* GTA01v3 */ ++#define GTA01v3_GPIO_nGSM_EN S3C2410_GPG9 ++ ++/* GTA01v4 */ ++#define GTA01_GPIO_MODEM_DNLOAD S3C2410_GPG0 ++ ++/* GTA01Bv2 */ ++#define GTA01Bv2_GPIO_nGSM_EN S3C2410_GPF2 ++#define GTA01Bv2_GPIO_VIBRATOR_ON S3C2410_GPB10 ++ ++/* GTA01Bv3 */ ++#define GTA01_GPIO_GPS_EN_3V3 S3C2410_GPG9 ++ ++#define GTA01_GPIO_SDMMC_ON S3C2410_GPB2 ++#define GTA01_GPIO_BT_EN S3C2410_GPB5 ++#define GTA01_GPIO_AB_DETECT S3C2410_GPB8 ++#define GTA01_GPIO_USB_PULLUP S3C2410_GPB9 ++#define GTA01_GPIO_USB_ATTACH S3C2410_GPB10 ++ ++#define GTA01_GPIO_GPS_EN_2V8 S3C2410_GPG9 ++#define GTA01_GPIO_GPS_EN_3V S3C2410_GPG10 ++#define GTA01_GPIO_GPS_RESET S3C2410_GPC0 ++ ++/* GTA01Bv4 */ ++#define GTA01Bv4_GPIO_nNAND_WP S3C2410_GPA16 ++#define GTA01Bv4_GPIO_VIBRATOR_ON S3C2410_GPB3 ++#define GTA01Bv4_GPIO_PMU_IRQ S3C2410_GPG1 ++ ++#define GTA01Bv4_IRQ_PCF50606 IRQ_EINT9 ++ ++#endif /* _GTA01_H */ +Index: linux-2.6.28/arch/arm/mach-s3c2410/include/mach/gta02.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-2.6.28/arch/arm/mach-s3c2410/include/mach/gta02.h 2009-01-02 00:01:56.000000000 +0100 +@@ -0,0 +1,113 @@ ++#ifndef _GTA02_H ++#define _GTA02_H ++ ++#include ++#include ++ ++#include ++ ++/* Different hardware revisions, passed in ATAG_REVISION by u-boot */ ++#define GTA02v1_SYSTEM_REV 0x00000310 ++#define GTA02v2_SYSTEM_REV 0x00000320 ++#define GTA02v3_SYSTEM_REV 0x00000330 ++#define GTA02v4_SYSTEM_REV 0x00000340 ++#define GTA02v5_SYSTEM_REV 0x00000350 ++#define GTA02v6_SYSTEM_REV 0x00000360 ++ ++#define GTA02_GPIO_n3DL_GSM S3C2410_GPA13 /* v1 + v2 + v3 only */ ++ ++#define GTA02_GPIO_PWR_LED1 S3C2410_GPB0 ++#define GTA02_GPIO_PWR_LED2 S3C2410_GPB1 ++#define GTA02_GPIO_AUX_LED S3C2410_GPB2 ++#define GTA02_GPIO_VIBRATOR_ON S3C2410_GPB3 ++#define GTA02v1_GPIO_GPS_PWRON S3C2410_GPB4 /* v1 only */ ++#define GTA02_GPIO_MODEM_RST S3C2410_GPB5 ++#define GTA02_GPIO_BT_EN S3C2410_GPB6 ++#define GTA02_GPIO_MODEM_ON S3C2410_GPB7 ++#define GTA02v1_GPIO_EN_AGPS3V S3C2410_GPB8 /* v1 only */ ++#define GTA02_GPIO_EXTINT8 S3C2410_GPB8 ++#define GTA02_GPIO_USB_PULLUP S3C2410_GPB9 ++ ++#define GTA02v1_GPIO_nGPS_RST S3C2410_GPC0 /* v1 only */ ++#define GTA02v12_GPIO_PIO3 S3C2410_GPC5 /* v1 + v2 only */ ++#define GTA02_GPIO_PIO5 S3C2410_GPC5 /* v3 + v4 only */ ++#define GTA02_GPIO_LCD_RESET S3C2410_GPC6 /* v1 + v2 only */ ++#define GTA02v12_GPIO_PIO2 S3C2410_GPC7 /* v1 + v2 only */ ++#define GTA02v2_nUSB_FLT S3C2410_GPC9 /* v2 only */ ++#define GTA02v2_nUSB_OC S3C2410_GPC10 /* v2 only */ ++#define GTA02v2_nGSM_OC S3C2410_GPC12 /* v2 only */ ++ ++#define GTA02v3_GPIO_nG1_CS S3C2410_GPD12 /* v3 + v4 only */ ++#define GTA02v3_GPIO_nG2_CS S3C2410_GPD13 /* v3 + v4 only */ ++#define GTA02v5_GPIO_HDQ S3C2410_GPD14 /* v5 + */ ++ ++#define GTA02_GPIO_nG1_INT S3C2410_GPF0 ++#define GTA02_GPIO_IO1 S3C2410_GPF1 ++#define GTA02v1_GPIO_nG2_INT S3C2410_GPF2 /* v1 only */ ++#define GTA02_GPIO_PIO_2 S3C2410_GPF2 /* v2 + v3 + v4 only */ ++#define GTA02_GPIO_JACK_INSERT S3C2410_GPF4 ++#define GTA02v1_GPIO_nSD_DETECT S3C2410_GPF5 /* v1 only */ ++#define GTA02_GPIO_WLAN_GPIO1 S3C2410_GPF5 /* v2 + v3 + v4 only */ ++#define GTA02_GPIO_AUX_KEY S3C2410_GPF6 ++#define GTA02_GPIO_HOLD_KEY S3C2410_GPF7 ++ ++#define GTA02_GPIO_3D_IRQ S3C2410_GPG4 ++#define GTA02v1_GPIO_nG1_CS S3C2410_GPG8 /* v1 only */ ++#define GTA02v2_GPIO_nG2_INT S3C2410_GPG8 /* v2 + v3 + v4 only */ ++#define GTA02v3_GPIO_nUSB_OC S3C2410_GPG9 /* v3 + v4 only */ ++#define GTA02v3_GPIO_nUSB_FLT S3C2410_GPG10 /* v3 + v4 only */ ++#define GTA02v1_GPIO_nG2_CS S3C2410_GPG11 /* v1 only */ ++#define GTA02v3_GPIO_nGSM_OC S3C2410_GPG11 /* v3 + v4 only */ ++ ++#define GTA02v1_GPIO_3D_RESET S3C2440_GPJ0 /* v1 only */ ++#define GTA02v2_GPIO_BAT_ID S3C2440_GPJ0 /* v2 only */ ++#define GTA02v1_GPIO_WLAN_GPIO8 S3C2440_GPJ1 /* v1 only */ ++#define GTA02_GPIO_AMP_SHUT S3C2440_GPJ1 /* v2 + v3 + v4 only */ ++#define GTA02v1_GPIO_WLAN_GPIO10 S3C2440_GPJ2 ++#define GTA02_GPIO_HP_IN S3C2440_GPJ2 /* v2 + v3 + v4 only */ ++#define GTA02v1_GPIO_KEEPACT S3C2440_GPJ3 /* v1 only */ ++#define GTA02_GPIO_INT0 S3C2440_GPJ3 /* v2 + v3 + v4 only */ ++#define GTA02_GPIO_nGSM_EN S3C2440_GPJ4 ++#define GTA02_GPIO_3D_RESET S3C2440_GPJ5 ++#define GTA02_GPIO_nDL_GSM S3C2440_GPJ6 /* v4 + v5 only */ ++#define GTA02_GPIO_WLAN_GPIO0 S3C2440_GPJ7 ++#define GTA02v1_GPIO_BAT_ID S3C2440_GPJ8 ++#define GTA02_GPIO_KEEPACT S3C2440_GPJ8 ++#define GTA02v1_GPIO_AMP_SHUT S3C2440_GPJ9 /* v1 only */ ++#define GTA02v2_nG1_CS S3C2440_GPJ9 /* v2 only */ ++#define GTA02v1_GPIO_HP_IN S3C2440_GPJ10 ++#define GTA02v2_nG2_CS S3C2440_GPJ10 /* v2 only */ ++#define GTA02v1_GPIO_INT0 S3C2440_GPJ11 /* v1 only */ ++#define GTA02_CHIP_PWD S3C2440_GPJ11 /* v2 + v3 + v4 only */ ++#define GTA02v1_GPIO_nGSM_EN S3C2440_GPJ12 /* v1 only */ ++#define GTA02_GPIO_nWLAN_RESET S3C2440_GPJ12 /* v2 + v3 + v4 only */ ++ ++#define GTA02_IRQ_GSENSOR_1 IRQ_EINT0 ++#define GTA02_IRQ_MODEM IRQ_EINT1 ++#define GTA02v1_IRQ_GSENSOR_2 IRQ_EINT2 /* v1 only */ ++#define GTA02_IRQ_PIO_2 IRQ_EINT2 /* v2 + v3 + v4 only */ ++#define GTA02_IRQ_nJACK_INSERT IRQ_EINT4 ++#define GTA02v1_IRQ_nSD_CD IRQ_EINT5 /* v1 only */ ++#define GTA02_IRQ_WLAN_GPIO1 IRQ_EINT5 ++#define GTA02_IRQ_AUX IRQ_EINT6 ++#define GTA02_IRQ_nHOLD IRQ_EINT7 ++#define GTA02v1_IRQ_nSIM_CD IRQ_EINT8 /* v1 only */ ++#define GTA02_IRQ_PCF50633 IRQ_EINT9 ++#define GTA02_IRQ_3D IRQ_EINT12 ++#define GTA02_IRQ_GSENSOR_2 IRQ_EINT16 /* v2 + v3 + v4 only */ ++#define GTA02v3_IRQ_nUSB_OC IRQ_EINT17 /* v3 + v4 only */ ++#define GTA02v3_IRQ_nUSB_FLT IRQ_EINT18 /* v3 + v4 only */ ++#define GTA02v3_IRQ_nGSM_OC IRQ_EINT19 /* v3 + v4 only */ ++ ++/* returns 00 000 on GTA02 A5 and earlier, A6 returns 01 001 */ ++#define GTA02_PCB_ID1_0 S3C2410_GPC13 ++#define GTA02_PCB_ID1_1 S3C2410_GPC15 ++#define GTA02_PCB_ID1_2 S3C2410_GPD0 ++#define GTA02_PCB_ID2_0 S3C2410_GPD3 ++#define GTA02_PCB_ID2_1 S3C2410_GPD4 ++ ++int gta02_get_pcb_revision(void); ++ ++extern struct pcf50633_platform_data gta02_pcf_pdata; ++ ++#endif /* _GTA02_H */ +Index: linux-2.6.28/arch/arm/mach-s3c2410/include/mach/gta02-pm-wlan.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-2.6.28/arch/arm/mach-s3c2410/include/mach/gta02-pm-wlan.h 2009-01-02 00:01:56.000000000 +0100 +@@ -0,0 +1 @@ ++void gta02_wlan_power(int on); +Index: linux-2.6.28/arch/arm/mach-s3c2410/include/mach/irqs.h +=================================================================== +--- linux-2.6.28.orig/arch/arm/mach-s3c2410/include/mach/irqs.h 2008-12-25 00:26:37.000000000 +0100 ++++ linux-2.6.28/arch/arm/mach-s3c2410/include/mach/irqs.h 2009-01-02 00:01:56.000000000 +0100 +@@ -12,9 +12,9 @@ + #ifndef __ASM_ARCH_IRQS_H + #define __ASM_ARCH_IRQS_H __FILE__ + +-#ifndef __ASM_ARM_IRQ_H +-#error "Do not include this directly, instead #include " +-#endif ++//#ifndef __ASM_ARM_IRQ_H ++//#error "Do not include this directly, instead #include " ++//#endif + + /* we keep the first set of CPU IRQs out of the range of + * the ISA space, so that the PC104 has them to itself +@@ -84,7 +84,7 @@ + #define IRQ_EINT22 S3C2410_IRQ(50) + #define IRQ_EINT23 S3C2410_IRQ(51) + +- ++#define IRQ_EINT_BIT(x) ((x) - IRQ_EINT4 + 4) + #define IRQ_EINT(x) (((x) >= 4) ? (IRQ_EINT4 + (x) - 4) : (IRQ_EINT0 + (x))) + + #define IRQ_LCD_FIFO S3C2410_IRQ(52) +@@ -134,6 +134,8 @@ + #define IRQ_S3C2443_HSMMC S3C2410_IRQ(20) /* IRQ_SDI */ + #define IRQ_S3C2443_NAND S3C2410_IRQ(24) /* reserved */ + ++#define IRQ_HSMMC0 IRQ_S3C2443_HSMMC ++ + #define IRQ_S3C2443_LCD1 S3C2410_IRQSUB(14) + #define IRQ_S3C2443_LCD2 S3C2410_IRQSUB(15) + #define IRQ_S3C2443_LCD3 S3C2410_IRQSUB(16) +@@ -155,12 +157,47 @@ + #define IRQ_S3C2443_AC97 S3C2410_IRQSUB(28) + + #ifdef CONFIG_CPU_S3C2443 +-#define NR_IRQS (IRQ_S3C2443_AC97+1) ++#define _NR_IRQS (IRQ_S3C2443_AC97+1) + #else +-#define NR_IRQS (IRQ_S3C2440_AC97+1) ++#define _NR_IRQS (IRQ_S3C2440_AC97+1) + #endif + ++/* compatibility define. */ ++#define IRQ_UART3 IRQ_S3C2443_UART3 ++#define IRQ_S3CUART_RX3 IRQ_S3C2443_RX3 ++#define IRQ_S3CUART_TX3 IRQ_S3C2443_TX3 ++#define IRQ_S3CUART_ERR3 IRQ_S3C2443_ERR3 ++ + /* Our FIQs are routable from IRQ_EINT0 to IRQ_ADCPARENT */ + #define FIQ_START IRQ_EINT0 + ++ ++/* ++ * The next 16 interrupts are for board specific purposes. Since ++ * the kernel can only run on one machine at a time, we can re-use ++ * these. If you need more, increase IRQ_BOARD_END, but keep it ++ * within sensible limits. ++ */ ++#define IRQ_BOARD_START _NR_IRQS ++#define IRQ_BOARD_END (_NR_IRQS + 10) ++ ++#if defined(CONFIG_MACH_NEO1973_GTA02) ++#define NR_IRQS (IRQ_BOARD_END) ++#else ++#define NR_IRQS (IRQ_BOARD_START) ++#endif ++ ++/* Neo1973 GTA02 interrupts */ ++#define NEO1973_GTA02_IRQ(x) (IRQ_BOARD_START + (x)) ++#define IRQ_GLAMO(x) NEO1973_GTA02_IRQ(x) ++#define IRQ_GLAMO_HOSTBUS IRQ_GLAMO(0) ++#define IRQ_GLAMO_JPEG IRQ_GLAMO(1) ++#define IRQ_GLAMO_MPEG IRQ_GLAMO(2) ++#define IRQ_GLAMO_MPROC1 IRQ_GLAMO(3) ++#define IRQ_GLAMO_MPROC0 IRQ_GLAMO(4) ++#define IRQ_GLAMO_CMDQUEUE IRQ_GLAMO(5) ++#define IRQ_GLAMO_2D IRQ_GLAMO(6) ++#define IRQ_GLAMO_MMC IRQ_GLAMO(7) ++#define IRQ_GLAMO_RISC IRQ_GLAMO(8) ++ + #endif /* __ASM_ARCH_IRQ_H */ +Index: linux-2.6.28/arch/arm/mach-s3c2410/include/mach/map.h +=================================================================== +--- linux-2.6.28.orig/arch/arm/mach-s3c2410/include/mach/map.h 2008-12-25 00:26:37.000000000 +0100 ++++ linux-2.6.28/arch/arm/mach-s3c2410/include/mach/map.h 2009-01-02 00:01:56.000000000 +0100 +@@ -13,34 +13,20 @@ + #ifndef __ASM_ARCH_MAP_H + #define __ASM_ARCH_MAP_H + ++#include + #include + + #define S3C2410_ADDR(x) S3C_ADDR(x) + +-/* interrupt controller is the first thing we put in, to make +- * the assembly code for the irq detection easier +- */ +-#define S3C24XX_VA_IRQ S3C_VA_IRQ +-#define S3C2410_PA_IRQ (0x4A000000) +-#define S3C24XX_SZ_IRQ SZ_1M +- +-/* memory controller registers */ +-#define S3C24XX_VA_MEMCTRL S3C_VA_MEM +-#define S3C2410_PA_MEMCTRL (0x48000000) +-#define S3C24XX_SZ_MEMCTRL SZ_1M +- + /* USB host controller */ + #define S3C2410_PA_USBHOST (0x49000000) +-#define S3C24XX_SZ_USBHOST SZ_1M + + /* DMA controller */ + #define S3C2410_PA_DMA (0x4B000000) + #define S3C24XX_SZ_DMA SZ_1M + + /* Clock and Power management */ +-#define S3C24XX_VA_CLKPWR S3C_VA_SYS + #define S3C2410_PA_CLKPWR (0x4C000000) +-#define S3C24XX_SZ_CLKPWR SZ_1M + + /* LCD controller */ + #define S3C2410_PA_LCD (0x4D000000) +@@ -48,48 +34,12 @@ + + /* NAND flash controller */ + #define S3C2410_PA_NAND (0x4E000000) +-#define S3C24XX_SZ_NAND SZ_1M +- +-/* UARTs */ +-#define S3C24XX_VA_UART S3C_VA_UART +-#define S3C2410_PA_UART (0x50000000) +-#define S3C24XX_SZ_UART SZ_1M +- +-/* Timers */ +-#define S3C24XX_VA_TIMER S3C_VA_TIMER +-#define S3C2410_PA_TIMER (0x51000000) +-#define S3C24XX_SZ_TIMER SZ_1M +- +-/* USB Device port */ +-#define S3C2410_PA_USBDEV (0x52000000) +-#define S3C24XX_SZ_USBDEV SZ_1M +- +-/* Watchdog */ +-#define S3C24XX_VA_WATCHDOG S3C_VA_WATCHDOG +-#define S3C2410_PA_WATCHDOG (0x53000000) +-#define S3C24XX_SZ_WATCHDOG SZ_1M + + /* IIC hardware controller */ + #define S3C2410_PA_IIC (0x54000000) +-#define S3C24XX_SZ_IIC SZ_1M + + /* IIS controller */ + #define S3C2410_PA_IIS (0x55000000) +-#define S3C24XX_SZ_IIS SZ_1M +- +-/* GPIO ports */ +- +-/* the calculation for the VA of this must ensure that +- * it is the same distance apart from the UART in the +- * phsyical address space, as the initial mapping for the IO +- * is done as a 1:1 maping. This puts it (currently) at +- * 0xFA800000, which is not in the way of any current mapping +- * by the base system. +-*/ +- +-#define S3C2410_PA_GPIO (0x56000000) +-#define S3C24XX_VA_GPIO ((S3C2410_PA_GPIO - S3C24XX_PA_UART) + S3C24XX_VA_UART) +-#define S3C24XX_SZ_GPIO SZ_1M + + /* RTC */ + #define S3C2410_PA_RTC (0x57000000) +@@ -97,15 +47,12 @@ + + /* ADC */ + #define S3C2410_PA_ADC (0x58000000) +-#define S3C24XX_SZ_ADC SZ_1M + + /* SPI */ + #define S3C2410_PA_SPI (0x59000000) +-#define S3C24XX_SZ_SPI SZ_1M + + /* SDI */ + #define S3C2410_PA_SDI (0x5A000000) +-#define S3C24XX_SZ_SDI SZ_1M + + /* CAMIF */ + #define S3C2440_PA_CAMIF (0x4F000000) +@@ -120,13 +67,6 @@ + #define S3C2443_PA_HSMMC (0x4A800000) + #define S3C2443_SZ_HSMMC (256) + +-/* ISA style IO, for each machine to sort out mappings for, if it +- * implements it. We reserve two 16M regions for ISA. +- */ +- +-#define S3C24XX_VA_ISA_WORD S3C2410_ADDR(0x02000000) +-#define S3C24XX_VA_ISA_BYTE S3C2410_ADDR(0x03000000) +- + /* physical addresses of all the chip-select areas */ + + #define S3C2410_CS0 (0x00000000) +@@ -152,27 +92,16 @@ + #define S3C24XX_PA_TIMER S3C2410_PA_TIMER + #define S3C24XX_PA_USBDEV S3C2410_PA_USBDEV + #define S3C24XX_PA_WATCHDOG S3C2410_PA_WATCHDOG +-#define S3C24XX_PA_IIC S3C2410_PA_IIC + #define S3C24XX_PA_IIS S3C2410_PA_IIS + #define S3C24XX_PA_GPIO S3C2410_PA_GPIO + #define S3C24XX_PA_RTC S3C2410_PA_RTC + #define S3C24XX_PA_ADC S3C2410_PA_ADC + #define S3C24XX_PA_SPI S3C2410_PA_SPI ++#define S3C24XX_PA_SDI S3C2410_PA_SDI ++#define S3C24XX_PA_NAND S3C2410_PA_NAND + +-/* deal with the registers that move under the 2412/2413 */ +- +-#if defined(CONFIG_CPU_S3C2412) || defined(CONFIG_CPU_S3C2413) +-#ifndef __ASSEMBLY__ +-extern void __iomem *s3c24xx_va_gpio2; +-#endif +-#ifdef CONFIG_CPU_S3C2412_ONLY +-#define S3C24XX_VA_GPIO2 (S3C24XX_VA_GPIO + 0x10) +-#else +-#define S3C24XX_VA_GPIO2 s3c24xx_va_gpio2 +-#endif +-#else +-#define s3c24xx_va_gpio2 S3C24XX_VA_GPIO +-#define S3C24XX_VA_GPIO2 S3C24XX_VA_GPIO +-#endif ++#define S3C_PA_IIC S3C2410_PA_IIC ++#define S3C_PA_UART S3C24XX_PA_UART ++#define S3C_PA_HSMMC0 S3C2443_PA_HSMMC + + #endif /* __ASM_ARCH_MAP_H */ +Index: linux-2.6.28/arch/arm/mach-s3c2410/include/mach/mci.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-2.6.28/arch/arm/mach-s3c2410/include/mach/mci.h 2009-01-02 00:01:56.000000000 +0100 +@@ -0,0 +1,13 @@ ++#ifndef _ARCH_MCI_H ++#define _ARCH_MCI_H ++ ++struct s3c24xx_mci_pdata { ++ unsigned int gpio_detect; ++ unsigned int gpio_wprotect; ++ unsigned long ocr_avail; ++ unsigned int do_dma; ++ void (*set_power)(unsigned char power_mode, ++ unsigned short vdd); ++}; ++ ++#endif /* _ARCH_NCI_H */ +Index: linux-2.6.28/arch/arm/mach-s3c2410/include/mach/neo1973-pm-gsm.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-2.6.28/arch/arm/mach-s3c2410/include/mach/neo1973-pm-gsm.h 2009-01-02 00:01:56.000000000 +0100 +@@ -0,0 +1 @@ ++extern int gta_gsm_interrupts; +Index: linux-2.6.28/arch/arm/mach-s3c2410/include/mach/pwm.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-2.6.28/arch/arm/mach-s3c2410/include/mach/pwm.h 2009-01-02 00:01:56.000000000 +0100 +@@ -0,0 +1,46 @@ ++#ifndef __S3C2410_PWM_H ++#define __S3C2410_PWM_H ++ ++#include ++#include ++#include ++ ++#include ++#include ++#include ++#include ++#include ++ ++enum pwm_timer { ++ PWM0, ++ PWM1, ++ PWM2, ++ PWM3, ++ PWM4 ++}; ++ ++struct s3c2410_pwm { ++ enum pwm_timer timerid; ++ struct clk *pclk; ++ unsigned long pclk_rate; ++ unsigned long prescaler; ++ unsigned long divider; ++ unsigned long counter; ++ unsigned long comparer; ++}; ++ ++struct s3c24xx_pwm_platform_data{ ++ /* callback to attach platform children (to enforce suspend / resume ++ * ordering */ ++ void (*attach_child_devices)(struct device *parent_device); ++}; ++ ++int s3c2410_pwm_init(struct s3c2410_pwm *s3c2410_pwm); ++int s3c2410_pwm_enable(struct s3c2410_pwm *s3c2410_pwm); ++int s3c2410_pwm_disable(struct s3c2410_pwm *s3c2410_pwm); ++int s3c2410_pwm_start(struct s3c2410_pwm *s3c2410_pwm); ++int s3c2410_pwm_stop(struct s3c2410_pwm *s3c2410_pwm); ++int s3c2410_pwm_duty_cycle(int reg_value, struct s3c2410_pwm *s3c2410_pwm); ++int s3c2410_pwm_dumpregs(void); ++ ++#endif /* __S3C2410_PWM_H */ +Index: linux-2.6.28/arch/arm/mach-s3c2410/include/mach/regs-clock.h +=================================================================== +--- linux-2.6.28.orig/arch/arm/mach-s3c2410/include/mach/regs-clock.h 2008-12-25 00:26:37.000000000 +0100 ++++ linux-2.6.28/arch/arm/mach-s3c2410/include/mach/regs-clock.h 2009-01-02 00:01:56.000000000 +0100 +@@ -42,13 +42,6 @@ + #define S3C2410_CLKCON_IIS (1<<17) + #define S3C2410_CLKCON_SPI (1<<18) + +-#define S3C2410_PLLCON_MDIVSHIFT 12 +-#define S3C2410_PLLCON_PDIVSHIFT 4 +-#define S3C2410_PLLCON_SDIVSHIFT 0 +-#define S3C2410_PLLCON_MDIVMASK ((1<<(1+(19-12)))-1) +-#define S3C2410_PLLCON_PDIVMASK ((1<<5)-1) +-#define S3C2410_PLLCON_SDIVMASK 3 +- + /* DCLKCON register addresses in gpio.h */ + + #define S3C2410_DCLKCON_DCLK0EN (1<<0) +@@ -76,32 +69,6 @@ + #define S3C2410_CLKSLOW_SLOWVAL(x) (x) + #define S3C2410_CLKSLOW_GET_SLOWVAL(x) ((x) & 7) + +-#ifndef __ASSEMBLY__ +- +-#include +- +-static inline unsigned int +-s3c2410_get_pll(unsigned int pllval, unsigned int baseclk) +-{ +- unsigned int mdiv, pdiv, sdiv; +- uint64_t fvco; +- +- mdiv = pllval >> S3C2410_PLLCON_MDIVSHIFT; +- pdiv = pllval >> S3C2410_PLLCON_PDIVSHIFT; +- sdiv = pllval >> S3C2410_PLLCON_SDIVSHIFT; +- +- mdiv &= S3C2410_PLLCON_MDIVMASK; +- pdiv &= S3C2410_PLLCON_PDIVMASK; +- sdiv &= S3C2410_PLLCON_SDIVMASK; +- +- fvco = (uint64_t)baseclk * (mdiv + 8); +- do_div(fvco, (pdiv + 2) << sdiv); +- +- return (unsigned int)fvco; +-} +- +-#endif /* __ASSEMBLY__ */ +- + #if defined(CONFIG_CPU_S3C2440) || defined(CONFIG_CPU_S3C2442) + + /* extra registers */ +Index: linux-2.6.28/arch/arm/mach-s3c2410/include/mach/regs-gpio.h +=================================================================== +--- linux-2.6.28.orig/arch/arm/mach-s3c2410/include/mach/regs-gpio.h 2008-12-25 00:26:37.000000000 +0100 ++++ linux-2.6.28/arch/arm/mach-s3c2410/include/mach/regs-gpio.h 2009-01-02 00:01:56.000000000 +0100 +@@ -14,16 +14,7 @@ + #ifndef __ASM_ARCH_REGS_GPIO_H + #define __ASM_ARCH_REGS_GPIO_H + +-#define S3C2410_GPIONO(bank,offset) ((bank) + (offset)) +- +-#define S3C2410_GPIO_BANKA (32*0) +-#define S3C2410_GPIO_BANKB (32*1) +-#define S3C2410_GPIO_BANKC (32*2) +-#define S3C2410_GPIO_BANKD (32*3) +-#define S3C2410_GPIO_BANKE (32*4) +-#define S3C2410_GPIO_BANKF (32*5) +-#define S3C2410_GPIO_BANKG (32*6) +-#define S3C2410_GPIO_BANKH (32*7) ++#include + + #ifdef CONFIG_CPU_S3C2400 + #define S3C24XX_GPIO_BASE(x) S3C2400_GPIO_BASE(x) +@@ -1053,13 +1044,6 @@ + #define S3C24XX_EXTINT1 S3C24XX_GPIOREG2(0x8C) + #define S3C24XX_EXTINT2 S3C24XX_GPIOREG2(0x90) + +-/* values for S3C2410_EXTINT0/1/2 */ +-#define S3C2410_EXTINT_LOWLEV (0x00) +-#define S3C2410_EXTINT_HILEV (0x01) +-#define S3C2410_EXTINT_FALLEDGE (0x02) +-#define S3C2410_EXTINT_RISEEDGE (0x04) +-#define S3C2410_EXTINT_BOTHEDGE (0x06) +- + /* interrupt filtering conrrol for EINT16..EINT23 */ + #define S3C2410_EINFLT0 S3C2410_GPIOREG(0x94) + #define S3C2410_EINFLT1 S3C2410_GPIOREG(0x98) +Index: linux-2.6.28/arch/arm/mach-s3c2410/include/mach/regs-sdi.h +=================================================================== +--- linux-2.6.28.orig/arch/arm/mach-s3c2410/include/mach/regs-sdi.h 2008-12-25 00:26:37.000000000 +0100 ++++ linux-2.6.28/arch/arm/mach-s3c2410/include/mach/regs-sdi.h 2009-01-02 00:01:56.000000000 +0100 +@@ -30,6 +30,7 @@ + #define S3C2410_SDIFSTA (0x38) + + #define S3C2410_SDIDATA (0x3C) ++#define S3C2410_SDIDATA_BYTE (0x3C) + #define S3C2410_SDIIMSK (0x40) + + #define S3C2440_SDIDATA (0x40) +@@ -37,6 +38,8 @@ + + #define S3C2440_SDICON_SDRESET (1<<8) + #define S3C2440_SDICON_MMCCLOCK (1<<5) ++#define S3C2440_SDIDATA_BYTE (0x48) ++ + #define S3C2410_SDICON_BYTEORDER (1<<4) + #define S3C2410_SDICON_SDIOIRQ (1<<3) + #define S3C2410_SDICON_RWAITEN (1<<2) +Index: linux-2.6.28/arch/arm/mach-s3c2410/include/mach/s3c24xx-serial.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-2.6.28/arch/arm/mach-s3c2410/include/mach/s3c24xx-serial.h 2009-01-02 00:01:56.000000000 +0100 +@@ -0,0 +1,5 @@ ++#include ++ ++extern void s3c24xx_serial_console_set_silence(int silence); ++extern void s3c24xx_serial_register_resume_dependency(struct resume_dependency * ++ resume_dependency, int uart_index); +Index: linux-2.6.28/arch/arm/mach-s3c2410/include/mach/spi-gpio.h +=================================================================== +--- linux-2.6.28.orig/arch/arm/mach-s3c2410/include/mach/spi-gpio.h 2008-12-25 00:26:37.000000000 +0100 ++++ linux-2.6.28/arch/arm/mach-s3c2410/include/mach/spi-gpio.h 2009-01-02 00:43:03.000000000 +0100 +@@ -21,7 +21,15 @@ struct s3c2410_spigpio_info { + int num_chipselect; + int bus_num; + +- void (*chip_select)(struct s3c2410_spigpio_info *spi, int cs); ++ /* ++ * FIXME: board_size and board_info DO NOT belong here. ++ * These were already removed upstream... but we still rely on them ++ * so leave for now and revisit this. ++ */ ++ unsigned long board_size; ++ struct spi_board_info *board_info; ++ ++ void (*chip_select)(struct s3c2410_spigpio_info *spi, int csid, int cs); + }; + + +Index: linux-2.6.28/arch/arm/mach-s3c2410/include/mach/spi.h +=================================================================== +--- linux-2.6.28.orig/arch/arm/mach-s3c2410/include/mach/spi.h 2008-12-25 00:26:37.000000000 +0100 ++++ linux-2.6.28/arch/arm/mach-s3c2410/include/mach/spi.h 2009-01-02 00:01:56.000000000 +0100 +@@ -22,5 +22,12 @@ struct s3c2410_spi_info { + void (*set_cs)(struct s3c2410_spi_info *spi, int cs, int pol); + }; + ++/* Standard setup / suspend routines for SPI GPIO pins. */ ++ ++extern void s3c24xx_spi_gpiocfg_bus0_gpe11_12_13(struct s3c2410_spi_info *spi, ++ int enable); ++ ++extern void s3c24xx_spi_gpiocfg_bus1_gpg5_6_7(struct s3c2410_spi_info *spi, ++ int enable); + + #endif /* __ASM_ARCH_SPI_H */ +Index: linux-2.6.28/arch/arm/mach-s3c2410/include/mach/system-reset.h +=================================================================== +--- linux-2.6.28.orig/arch/arm/mach-s3c2410/include/mach/system-reset.h 2008-12-25 00:26:37.000000000 +0100 ++++ linux-2.6.28/arch/arm/mach-s3c2410/include/mach/system-reset.h 2009-01-02 00:01:56.000000000 +0100 +@@ -13,7 +13,7 @@ + #include + #include + +-#include ++#include + #include + + #include +Index: linux-2.6.28/arch/arm/mach-s3c2410/include/mach/tick.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-2.6.28/arch/arm/mach-s3c2410/include/mach/tick.h 2009-01-02 00:01:56.000000000 +0100 +@@ -0,0 +1,15 @@ ++/* linux/arch/arm/mach-s3c2410/include/mach/tick.h ++ * ++ * Copyright 2008 Simtec Electronics ++ * Ben Dooks ++ * http://armlinux.simtec.co.uk/ ++ * ++ * S3C2410 - timer tick support ++ */ ++ ++#define SRCPND_TIMER4 (1<<(IRQ_TIMER4 - IRQ_EINT0)) ++ ++static inline int s3c24xx_ostimer_pending(void) ++{ ++ return __raw_readl(S3C2410_SRCPND) & SRCPND_TIMER4; ++} +Index: linux-2.6.28/arch/arm/mach-s3c2410/include/mach/timex.h +=================================================================== +--- linux-2.6.28.orig/arch/arm/mach-s3c2410/include/mach/timex.h 2008-12-25 00:26:37.000000000 +0100 ++++ /dev/null 1970-01-01 00:00:00.000000000 +0000 +@@ -1,26 +0,0 @@ +-/* arch/arm/mach-s3c2410/include/mach/timex.h +- * +- * Copyright (c) 2003-2005 Simtec Electronics +- * Ben Dooks +- * +- * S3C2410 - time parameters +- * +- * This program is free software; you can redistribute it and/or modify +- * it under the terms of the GNU General Public License version 2 as +- * published by the Free Software Foundation. +-*/ +- +-#ifndef __ASM_ARCH_TIMEX_H +-#define __ASM_ARCH_TIMEX_H +- +-/* CLOCK_TICK_RATE needs to be evaluatable by the cpp, so making it +- * a variable is useless. It seems as long as we make our timers an +- * exact multiple of HZ, any value that makes a 1->1 correspondence +- * for the time conversion functions to/from jiffies is acceptable. +-*/ +- +- +-#define CLOCK_TICK_RATE 12000000 +- +- +-#endif /* __ASM_ARCH_TIMEX_H */ +Index: linux-2.6.28/arch/arm/mach-s3c2410/include/mach/ts.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-2.6.28/arch/arm/mach-s3c2410/include/mach/ts.h 2009-01-02 00:01:56.000000000 +0100 +@@ -0,0 +1,35 @@ ++/* arch/arm/mach-s3c2410/include/mach/ts.h ++ * ++ * Copyright (c) 2005 Arnaud Patard ++ * ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation. ++ * ++ * ++ * Changelog: ++ * 24-Mar-2005 RTP Created file ++ * 03-Aug-2005 RTP Renamed to ts.h ++ */ ++ ++#ifndef __ASM_ARM_TS_H ++#define __ASM_ARM_TS_H ++ ++#include ++ ++struct s3c2410_ts_mach_info { ++ int delay; ++ int presc; ++ /* array of pointers to filter APIs we want to use, in order ++ * ends on first NULL, all NULL is OK ++ */ ++ struct ts_filter_api *filter_sequence[MAX_TS_FILTER_CHAIN]; ++ /* array of configuration ints, one for each filter above */ ++ void *filter_config[MAX_TS_FILTER_CHAIN]; ++}; ++ ++void set_s3c2410ts_info(struct s3c2410_ts_mach_info *hard_s3c2410ts_info); ++ ++#endif /* __ASM_ARM_TS_H */ ++ +Index: linux-2.6.28/arch/arm/mach-s3c2410/include/mach/uncompress.h +=================================================================== +--- linux-2.6.28.orig/arch/arm/mach-s3c2410/include/mach/uncompress.h 2008-12-25 00:26:37.000000000 +0100 ++++ linux-2.6.28/arch/arm/mach-s3c2410/include/mach/uncompress.h 2009-01-02 00:01:56.000000000 +0100 +@@ -1,3 +1,4 @@ ++ + /* arch/arm/mach-s3c2410/include/mach/uncompress.h + * + * Copyright (c) 2003, 2007 Simtec Electronics +Index: linux-2.6.28/arch/arm/mach-s3c2410/include/mach/vmalloc.h +=================================================================== +--- linux-2.6.28.orig/arch/arm/mach-s3c2410/include/mach/vmalloc.h 2008-12-25 00:26:37.000000000 +0100 ++++ /dev/null 1970-01-01 00:00:00.000000000 +0000 +@@ -1,20 +0,0 @@ +-/* arch/arm/mach-s3c2410/include/mach/vmalloc.h +- * +- * from arch/arm/mach-iop3xx/include/mach/vmalloc.h +- * +- * Copyright (c) 2003 Simtec Electronics +- * http://www.simtec.co.uk/products/SWLINUX/ +- * +- * This program is free software; you can redistribute it and/or modify +- * it under the terms of the GNU General Public License version 2 as +- * published by the Free Software Foundation. +- * +- * S3C2410 vmalloc definition +-*/ +- +-#ifndef __ASM_ARCH_VMALLOC_H +-#define __ASM_ARCH_VMALLOC_H +- +-#define VMALLOC_END (0xE0000000) +- +-#endif /* __ASM_ARCH_VMALLOC_H */ +Index: linux-2.6.28/arch/arm/mach-s3c2410/Kconfig +=================================================================== +--- linux-2.6.28.orig/arch/arm/mach-s3c2410/Kconfig 2008-12-25 00:26:37.000000000 +0100 ++++ linux-2.6.28/arch/arm/mach-s3c2410/Kconfig 2009-01-02 00:01:56.000000000 +0100 +@@ -9,6 +9,7 @@ config CPU_S3C2410 + depends on ARCH_S3C2410 + select S3C2410_CLOCK + select S3C2410_GPIO ++ select S3C2410_PWM + select CPU_LLSERIAL_S3C2410 + select S3C2410_PM if PM + help +@@ -32,11 +33,6 @@ config S3C2410_GPIO + help + GPIO code for S3C2410 and similar processors + +-config S3C2410_CLOCK +- bool +- help +- Clock code for the S3C2410, and similar processors +- + config SIMTEC_NOR + bool + help +@@ -49,6 +45,12 @@ config MACH_BAST_IDE + Internal node for machines with an BAST style IDE + interface + ++config S3C2410_PWM ++ bool ++ help ++ PWM timer code for the S3C2410, and similar processors ++ ++ + menu "S3C2410 Machines" + + config ARCH_SMDK2410 +@@ -84,6 +86,7 @@ config ARCH_BAST + select PM_SIMTEC if PM + select SIMTEC_NOR + select MACH_BAST_IDE ++ select S3C24XX_DCLK + select ISA + help + Say Y here if you are using the Simtec Electronics EB2410ITX +@@ -121,6 +124,7 @@ config MACH_TCT_HAMMER + config MACH_VR1000 + bool "Thorcom VR1000" + select PM_SIMTEC if PM ++ select S3C24XX_DCLK + select SIMTEC_NOR + select MACH_BAST_IDE + select CPU_S3C2410 +@@ -130,7 +134,16 @@ config MACH_VR1000 + config MACH_QT2410 + bool "QT2410" + select CPU_S3C2410 ++ select DISPLAY_JBT6K74 + help + Say Y here if you are using the Armzone QT2410 + ++config MACH_NEO1973_GTA01 ++ bool "FIC Neo1973 GSM Phone (GTA01 Hardware)" ++ select CPU_S3C2410 ++ select MACH_NEO1973 ++ select SENSORS_PCF50606 ++ help ++ Say Y here if you are using the FIC Neo1973 GSM Phone ++ + endmenu +Index: linux-2.6.28/arch/arm/mach-s3c2410/mach-amlm5900.c +=================================================================== +--- linux-2.6.28.orig/arch/arm/mach-s3c2410/mach-amlm5900.c 2008-12-25 00:26:37.000000000 +0100 ++++ linux-2.6.28/arch/arm/mach-s3c2410/mach-amlm5900.c 2009-01-02 00:01:56.000000000 +0100 +@@ -52,6 +52,7 @@ + #include + #include + ++#include + #include + #include + +@@ -150,7 +151,7 @@ static struct platform_device *amlm5900_ + #endif + &s3c_device_adc, + &s3c_device_wdt, +- &s3c_device_i2c, ++ &s3c_device_i2c0, + &s3c_device_usb, + &s3c_device_rtc, + &s3c_device_usbgadget, +@@ -233,6 +234,7 @@ static void __init amlm5900_init(void) + #ifdef CONFIG_FB_S3C2410 + s3c24xx_fb_set_platdata(&amlm5900_fb_info); + #endif ++ s3c_i2c0_set_platdata(NULL); + platform_add_devices(amlm5900_devices, ARRAY_SIZE(amlm5900_devices)); + } + +Index: linux-2.6.28/arch/arm/mach-s3c2410/mach-bast.c +=================================================================== +--- linux-2.6.28.orig/arch/arm/mach-s3c2410/mach-bast.c 2008-12-25 00:26:37.000000000 +0100 ++++ linux-2.6.28/arch/arm/mach-s3c2410/mach-bast.c 2009-01-02 00:01:56.000000000 +0100 +@@ -44,8 +44,8 @@ + #include + #include + +-#include +-#include ++#include ++#include + #include + + #include +@@ -406,7 +406,7 @@ static struct platform_device bast_sio = + * standard 100KHz i2c bus frequency + */ + +-static struct s3c2410_platform_i2c bast_i2c_info = { ++static struct s3c2410_platform_i2c __initdata bast_i2c_info = { + .flags = 0, + .slave_addr = 0x10, + .bus_freq = 100*1000, +@@ -553,7 +553,7 @@ static struct platform_device *bast_devi + &s3c_device_usb, + &s3c_device_lcd, + &s3c_device_wdt, +- &s3c_device_i2c, ++ &s3c_device_i2c0, + &s3c_device_rtc, + &s3c_device_nand, + &bast_device_dm9k, +@@ -588,7 +588,8 @@ static void __init bast_map_io(void) + s3c24xx_register_clocks(bast_clocks, ARRAY_SIZE(bast_clocks)); + + s3c_device_nand.dev.platform_data = &bast_nand_info; +- s3c_device_i2c.dev.platform_data = &bast_i2c_info; ++ ++ s3c_i2c0_set_platdata(&bast_i2c_info); + + s3c24xx_init_io(bast_iodesc, ARRAY_SIZE(bast_iodesc)); + s3c24xx_init_clocks(0); +Index: linux-2.6.28/arch/arm/mach-s3c2410/mach-gta01.c +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-2.6.28/arch/arm/mach-s3c2410/mach-gta01.c 2009-01-02 00:01:56.000000000 +0100 +@@ -0,0 +1,786 @@ ++/* ++ * linux/arch/arm/mach-s3c2410/mach-gta01.c ++ * ++ * S3C2410 Machine Support for the FIC Neo1973 GTA01 ++ * ++ * Copyright (C) 2006-2007 by Openmoko, Inc. ++ * Author: Harald Welte ++ * All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or ++ * modify it under the terms of the GNU General Public License as ++ * published by the Free Software Foundation; either version 2 of ++ * the License, or (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not, write to the Free Software ++ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, ++ * MA 02111-1307 USA ++ * ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include ++#include ++#include ++#include ++ ++#include ++ ++#include ++ ++#include ++#include ++#include ++ ++#include ++#include ++#include ++#include ++ ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include ++ ++#include ++#include ++ ++ ++static struct map_desc gta01_iodesc[] __initdata = { ++ { ++ .virtual = 0xe0000000, ++ .pfn = __phys_to_pfn(S3C2410_CS3+0x01000000), ++ .length = SZ_1M, ++ .type = MT_DEVICE ++ }, ++}; ++ ++#define UCON S3C2410_UCON_DEFAULT ++#define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB ++#define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE ++/* UFCON for the gta01 sets the FIFO trigger level at 4, not 8 */ ++#define UFCON_GTA01_PORT0 S3C2410_UFCON_FIFOMODE ++ ++static struct s3c2410_uartcfg gta01_uartcfgs[] = { ++ [0] = { ++ .hwport = 0, ++ .flags = 0, ++ .ucon = UCON, ++ .ulcon = ULCON, ++ .ufcon = UFCON_GTA01_PORT0, ++ }, ++ [1] = { ++ .hwport = 1, ++ .flags = 0, ++ .ucon = UCON, ++ .ulcon = ULCON, ++ .ufcon = UFCON, ++ }, ++}; ++ ++/* PMU driver info */ ++ ++static int pmu_callback(struct device *dev, unsigned int feature, ++ enum pmu_event event) ++{ ++ switch (feature) { ++ case PCF50606_FEAT_ACD: ++ switch (event) { ++ case PMU_EVT_INSERT: ++ pcf50606_charge_fast(pcf50606_global, 1); ++ break; ++ case PMU_EVT_REMOVE: ++ pcf50606_charge_fast(pcf50606_global, 0); ++ break; ++ default: ++ break; ++ } ++ break; ++ default: ++ break; ++ } ++ ++ return 0; ++} ++ ++static struct pcf50606_platform_data gta01_pcf_pdata = { ++ .used_features = PCF50606_FEAT_EXTON | ++ PCF50606_FEAT_MBC | ++ PCF50606_FEAT_BBC | ++ PCF50606_FEAT_RTC | ++ PCF50606_FEAT_WDT | ++ PCF50606_FEAT_CHGCUR | ++ PCF50606_FEAT_BATVOLT | ++ PCF50606_FEAT_BATTEMP, ++ .onkey_seconds_required = 3, ++ .cb = &pmu_callback, ++ .r_fix_batt = 10000, ++ .r_fix_batt_par = 10000, ++ .r_sense_milli = 220, ++ .rails = { ++ [PCF50606_REGULATOR_D1REG] = { ++ .name = "bt_3v15", ++ .voltage = { ++ .init = 3150, ++ .max = 3150, ++ }, ++ }, ++ [PCF50606_REGULATOR_D2REG] = { ++ .name = "gl_2v5", ++ .voltage = { ++ .init = 2500, ++ .max = 2500, ++ }, ++ }, ++ [PCF50606_REGULATOR_D3REG] = { ++ .name = "stby_1v8", ++ .flags = PMU_VRAIL_F_SUSPEND_ON, ++ .voltage = { ++ .init = 1800, ++ .max = 2100, ++ }, ++ }, ++ [PCF50606_REGULATOR_DCD] = { ++ .name = "gl_1v5", ++ .voltage = { ++ .init = 1500, ++ .max = 1500, ++ }, ++ }, ++ [PCF50606_REGULATOR_DCDE] = { ++ .name = "io_3v3", ++ .flags = PMU_VRAIL_F_SUSPEND_ON, ++ .voltage = { ++ .init = 3300, ++ .max = 3330, ++ }, ++ }, ++ [PCF50606_REGULATOR_DCUD] = { ++ .name = "core_1v8", ++ .flags = PMU_VRAIL_F_SUSPEND_ON, ++ .voltage = { ++ .init = 2100, ++ .max = 2100, ++ }, ++ }, ++ [PCF50606_REGULATOR_IOREG] = { ++ .name = "codec_3v3", ++ .voltage = { ++ .init = 3300, ++ .max = 3300, ++ }, ++ }, ++ [PCF50606_REGULATOR_LPREG] = { ++ .name = "lcm_3v3", ++ .voltage = { ++ .init = 3300, ++ .max = 3300, ++ }, ++ } ++ }, ++}; ++ ++static void cfg_pmu_vrail(struct pmu_voltage_rail *vrail, char *name, ++ unsigned int flags, unsigned int init, ++ unsigned int max) ++{ ++ vrail->name = name; ++ vrail->flags = flags; ++ vrail->voltage.init = init; ++ vrail->voltage.max = max; ++} ++ ++static void mangle_pmu_pdata_by_system_rev(void) ++{ ++ switch (system_rev) { ++ case GTA01Bv4_SYSTEM_REV: ++ gta01_pcf_pdata.used_features |= PCF50606_FEAT_ACD; ++ break; ++ case GTA01Bv3_SYSTEM_REV: ++ case GTA01Bv2_SYSTEM_REV: ++ gta01_pcf_pdata.rails[PCF50606_REGULATOR_D3REG] ++ .name = "user1"; ++ gta01_pcf_pdata.rails[PCF50606_REGULATOR_D3REG] ++ .flags &= ~PMU_VRAIL_F_SUSPEND_ON; ++ gta01_pcf_pdata.rails[PCF50606_REGULATOR_D3REG] ++ .flags = PMU_VRAIL_F_UNUSED; ++ break; ++ case GTA01v4_SYSTEM_REV: ++ cfg_pmu_vrail(>a01_pcf_pdata.rails[PCF50606_REGULATOR_DCUD], ++ "core_1v8", PMU_VRAIL_F_SUSPEND_ON, 1800, 1800); ++ cfg_pmu_vrail(>a01_pcf_pdata.rails[PCF50606_REGULATOR_D1REG], ++ "vrf_3v", 0, 3000, 3000); ++ cfg_pmu_vrail(>a01_pcf_pdata.rails[PCF50606_REGULATOR_D3REG], ++ "vtcxo_2v8", 0, 2800, 2800); ++ cfg_pmu_vrail(>a01_pcf_pdata.rails[PCF50606_REGULATOR_DCD], ++ "gl_3v5", 0, 3500, 3500); ++ break; ++ case GTA01v3_SYSTEM_REV: ++ cfg_pmu_vrail(>a01_pcf_pdata.rails[PCF50606_REGULATOR_D1REG], ++ "vrf_3v", 0, 3000, 3000); ++ cfg_pmu_vrail(>a01_pcf_pdata.rails[PCF50606_REGULATOR_D2REG], ++ "sd_3v3", 0, 3300, 3300); ++ cfg_pmu_vrail(>a01_pcf_pdata.rails[PCF50606_REGULATOR_D3REG], ++ "codec_3v3", 0, 3300, 3300); ++ cfg_pmu_vrail(>a01_pcf_pdata.rails[PCF50606_REGULATOR_DCD], ++ "gpsio_3v3", 0, 3300, 3300); ++ cfg_pmu_vrail(>a01_pcf_pdata.rails[PCF50606_REGULATOR_DCUD], ++ "core_1v8", PMU_VRAIL_F_SUSPEND_ON, 1800, 1800); ++ cfg_pmu_vrail(>a01_pcf_pdata.rails[PCF50606_REGULATOR_IOREG], ++ "vtcxo_2v8", 0, 2800, 2800); ++ break; ++ } ++} ++ ++static struct resource gta01_pmu_resources[] = { ++ [0] = { ++ .flags = IORESOURCE_IRQ, ++ .start = GTA01_IRQ_PCF50606, ++ .end = GTA01_IRQ_PCF50606, ++ }, ++}; ++ ++struct platform_device gta01_pmu_dev = { ++ .name = "pcf50606", ++ .num_resources = ARRAY_SIZE(gta01_pmu_resources), ++ .resource = gta01_pmu_resources, ++ .dev = { ++ .platform_data = >a01_pcf_pdata, ++ }, ++}; ++ ++/* LCD driver info */ ++ ++/* Configuration for 480x640 toppoly TD028TTEC1. ++ * Do not mark this as __initdata or it will break! */ ++static struct s3c2410fb_display gta01_displays[] = { ++ { ++ .type = S3C2410_LCDCON1_TFT, ++ .width = 43, ++ .height = 58, ++ .xres = 480, ++ .yres = 640, ++ .bpp = 16, ++ ++ .pixclock = 40000, /* HCLK/4 */ ++ .left_margin = 104, ++ .right_margin = 8, ++ .hsync_len = 8, ++ .upper_margin = 2, ++ .lower_margin = 16, ++ .vsync_len = 2, ++ .lcdcon5 = S3C2410_LCDCON5_FRM565 | ++ S3C2410_LCDCON5_INVVCLK | ++ S3C2410_LCDCON5_INVVLINE | ++ S3C2410_LCDCON5_INVVFRAME | ++ S3C2410_LCDCON5_PWREN | ++ S3C2410_LCDCON5_HWSWP, ++ }, ++ { ++ .type = S3C2410_LCDCON1_TFT, ++ .width = 43, ++ .height = 58, ++ .xres = 480, ++ .yres = 640, ++ .bpp = 32, ++ ++ .pixclock = 40000, /* HCLK/4 */ ++ .left_margin = 104, ++ .right_margin = 8, ++ .hsync_len = 8, ++ .upper_margin = 2, ++ .lower_margin = 16, ++ .vsync_len = 2, ++ .lcdcon5 = S3C2410_LCDCON5_FRM565 | ++ S3C2410_LCDCON5_INVVCLK | ++ S3C2410_LCDCON5_INVVLINE | ++ S3C2410_LCDCON5_INVVFRAME | ++ S3C2410_LCDCON5_PWREN | ++ S3C2410_LCDCON5_HWSWP, ++ }, ++ { ++ .type = S3C2410_LCDCON1_TFT, ++ .width = 43, ++ .height = 58, ++ .xres = 240, ++ .yres = 320, ++ .bpp = 16, ++ ++ .pixclock = 40000, /* HCLK/4 */ ++ .left_margin = 104, ++ .right_margin = 8, ++ .hsync_len = 8, ++ .upper_margin = 2, ++ .lower_margin = 16, ++ .vsync_len = 2, ++ .lcdcon5 = S3C2410_LCDCON5_FRM565 | ++ S3C2410_LCDCON5_INVVCLK | ++ S3C2410_LCDCON5_INVVLINE | ++ S3C2410_LCDCON5_INVVFRAME | ++ S3C2410_LCDCON5_PWREN | ++ S3C2410_LCDCON5_HWSWP, ++ }, ++}; ++ ++static struct s3c2410fb_mach_info gta01_lcd_cfg __initdata = { ++ .displays = gta01_displays, ++ .num_displays = ARRAY_SIZE(gta01_displays), ++ .default_display = 0, ++ ++ .lpcsel = ((0xCE6) & ~7) | 1<<4, ++}; ++ ++static struct platform_device *gta01_devices[] __initdata = { ++ &s3c_device_usb, ++ &s3c_device_lcd, ++ &s3c_device_wdt, ++ &s3c_device_i2c0, ++ &s3c_device_iis, ++ &s3c_device_sdi, ++ &s3c_device_usbgadget, ++ &s3c_device_nand, ++ &s3c_device_ts, ++}; ++ ++static struct s3c2410_nand_set gta01_nand_sets[] = { ++ [0] = { ++ .name = "neo1973-nand", ++ .nr_chips = 1, ++ .flags = S3C2410_NAND_BBT, ++ }, ++}; ++ ++static struct s3c2410_platform_nand gta01_nand_info = { ++ .tacls = 20, ++ .twrph0 = 60, ++ .twrph1 = 20, ++ .nr_sets = ARRAY_SIZE(gta01_nand_sets), ++ .sets = gta01_nand_sets, ++}; ++ ++static void gta01_mmc_set_power(unsigned char power_mode, unsigned short vdd) ++{ ++ int bit; ++ int mv = 1700; /* 1.7V for MMC_VDD_165_195 */ ++ ++ printk(KERN_DEBUG "mmc_set_power(power_mode=%u, vdd=%u)\n", ++ power_mode, vdd); ++ ++ switch (system_rev) { ++ case GTA01v3_SYSTEM_REV: ++ switch (power_mode) { ++ case MMC_POWER_OFF: ++ pcf50606_onoff_set(pcf50606_global, ++ PCF50606_REGULATOR_D2REG, 0); ++ break; ++ case MMC_POWER_ON: ++ /* translate MMC_VDD_* VDD bit to mv */ ++ for (bit = 8; bit != 24; bit++) ++ if (vdd == (1 << bit)) ++ mv += 100 * (bit - 4); ++ pcf50606_voltage_set(pcf50606_global, ++ PCF50606_REGULATOR_D2REG, mv); ++ pcf50606_onoff_set(pcf50606_global, ++ PCF50606_REGULATOR_D2REG, 1); ++ break; ++ } ++ break; ++ case GTA01v4_SYSTEM_REV: ++ case GTA01Bv2_SYSTEM_REV: ++ case GTA01Bv3_SYSTEM_REV: ++ case GTA01Bv4_SYSTEM_REV: ++ switch (power_mode) { ++ case MMC_POWER_OFF: ++ neo1973_gpb_setpin(GTA01_GPIO_SDMMC_ON, 1); ++ break; ++ case MMC_POWER_ON: ++ neo1973_gpb_setpin(GTA01_GPIO_SDMMC_ON, 0); ++ break; ++ } ++ break; ++ } ++} ++ ++static struct s3c24xx_mci_pdata gta01_mmc_cfg = { ++ .gpio_detect = GTA01_GPIO_nSD_DETECT, ++ .set_power = >a01_mmc_set_power, ++ .ocr_avail = MMC_VDD_165_195|MMC_VDD_20_21| ++ MMC_VDD_21_22|MMC_VDD_22_23|MMC_VDD_23_24| ++ MMC_VDD_24_25|MMC_VDD_25_26|MMC_VDD_26_27| ++ MMC_VDD_27_28|MMC_VDD_28_29|MMC_VDD_29_30| ++ MMC_VDD_30_31|MMC_VDD_31_32|MMC_VDD_32_33, ++}; ++ ++static void gta01_udc_command(enum s3c2410_udc_cmd_e cmd) ++{ ++ printk(KERN_DEBUG "%s(%d)\n", __func__, cmd); ++ ++ switch (cmd) { ++ case S3C2410_UDC_P_ENABLE: ++ neo1973_gpb_setpin(GTA01_GPIO_USB_PULLUP, 1); ++ break; ++ case S3C2410_UDC_P_DISABLE: ++ neo1973_gpb_setpin(GTA01_GPIO_USB_PULLUP, 0); ++ break; ++ default: ++ break; ++ } ++} ++ ++/* use a work queue, since I2C API inherently schedules ++ * and we get called in hardirq context from UDC driver */ ++ ++struct vbus_draw { ++ struct work_struct work; ++ int ma; ++}; ++static struct vbus_draw gta01_udc_vbus_drawer; ++ ++static void __gta01_udc_vbus_draw(struct work_struct *work) ++{ ++ /* this is a fix to work around boot-time ordering problems if the ++ * s3c2410_udc is initialized before the pcf50606 driver has defined ++ * pcf50606_global */ ++ if (!pcf50606_global) ++ return; ++ ++ if (gta01_udc_vbus_drawer.ma >= 500) { ++ /* enable fast charge */ ++ printk(KERN_DEBUG "udc: enabling fast charge\n"); ++ pcf50606_charge_fast(pcf50606_global, 1); ++ } else { ++ /* disable fast charge */ ++ printk(KERN_DEBUG "udc: disabling fast charge\n"); ++ pcf50606_charge_fast(pcf50606_global, 0); ++ } ++} ++ ++static void gta01_udc_vbus_draw(unsigned int ma) ++{ ++ gta01_udc_vbus_drawer.ma = ma; ++ schedule_work(>a01_udc_vbus_drawer.work); ++} ++ ++static struct s3c2410_udc_mach_info gta01_udc_cfg = { ++ .vbus_draw = gta01_udc_vbus_draw, ++}; ++ ++ ++/* touchscreen configuration */ ++ ++static struct ts_filter_median_configuration gta01_ts_median_config = { ++ .extent = 31, ++ .decimation_below = 24, ++ .decimation_threshold = 8 * 3, ++ .decimation_above = 12, ++}; ++ ++static struct ts_filter_mean_configuration gta01_ts_mean_config = { ++ .bits_filter_length = 5, ++ .averaging_threshold = 12 ++}; ++ ++static struct s3c2410_ts_mach_info gta01_ts_cfg = { ++ .delay = 10000, ++ .presc = 0xff, /* slow as we can go */ ++ .filter_sequence = { ++ [0] = &ts_filter_median_api, ++ [1] = &ts_filter_mean_api, ++ }, ++ .filter_config = { ++ [0] = >a01_ts_median_config, ++ [1] = >a01_ts_mean_config, ++ }, ++}; ++ ++ ++/* SPI */ ++ ++static void gta01_jbt6k74_reset(int devidx, int level) ++{ ++ /* empty place holder; gta01 does not yet use this */ ++ printk(KERN_DEBUG "gta01_jbt6k74_reset\n"); ++} ++ ++static void gta01_jbt6k74_resuming(int devidx) ++{ ++ gta01bl_deferred_resume(); ++} ++ ++const struct jbt6k74_platform_data gta01_jbt6k74_pdata = { ++ .reset = gta01_jbt6k74_reset, ++ .resuming = gta01_jbt6k74_resuming, ++}; ++ ++static struct spi_board_info gta01_spi_board_info[] = { ++ { ++ .modalias = "jbt6k74", ++ .platform_data = >a01_jbt6k74_pdata, ++ /* controller_data */ ++ /* irq */ ++ .max_speed_hz = 10 * 1000 * 1000, ++ .bus_num = 1, ++ /* chip_select */ ++ }, ++}; ++ ++static void spi_gpio_cs(struct s3c2410_spigpio_info *spi, int csidx, int cs) ++{ ++ switch (cs) { ++ case BITBANG_CS_ACTIVE: ++ s3c2410_gpio_setpin(S3C2410_GPG3, 0); ++ break; ++ case BITBANG_CS_INACTIVE: ++ s3c2410_gpio_setpin(S3C2410_GPG3, 1); ++ break; ++ } ++} ++ ++static struct s3c2410_spigpio_info spi_gpio_cfg = { ++ .pin_clk = S3C2410_GPG7, ++ .pin_mosi = S3C2410_GPG6, ++ .pin_miso = S3C2410_GPG5, ++ .board_size = ARRAY_SIZE(gta01_spi_board_info), ++ .board_info = gta01_spi_board_info, ++ .chip_select = &spi_gpio_cs, ++ .num_chipselect = 2, /*** Should be 1 or 2 for gta01? ***/ ++}; ++ ++static struct resource s3c_spi_lcm_resource[] = { ++ [0] = { ++ .start = S3C2410_GPG3, ++ .end = S3C2410_GPG3, ++ }, ++ [1] = { ++ .start = S3C2410_GPG5, ++ .end = S3C2410_GPG5, ++ }, ++ [2] = { ++ .start = S3C2410_GPG6, ++ .end = S3C2410_GPG6, ++ }, ++ [3] = { ++ .start = S3C2410_GPG7, ++ .end = S3C2410_GPG7, ++ }, ++}; ++ ++struct platform_device s3c_device_spi_lcm = { ++ .name = "spi_s3c24xx_gpio", ++ .id = 1, ++ .num_resources = ARRAY_SIZE(s3c_spi_lcm_resource), ++ .resource = s3c_spi_lcm_resource, ++ .dev = { ++ .platform_data = &spi_gpio_cfg, ++ }, ++}; ++ ++static struct gta01bl_machinfo backlight_machinfo = { ++ .default_intensity = 1, ++ .max_intensity = 1, ++ .limit_mask = 1, ++ .defer_resume_backlight = 1, ++}; ++ ++static struct resource gta01_bl_resources[] = { ++ [0] = { ++ .start = GTA01_GPIO_BACKLIGHT, ++ .end = GTA01_GPIO_BACKLIGHT, ++ }, ++}; ++ ++struct platform_device gta01_bl_dev = { ++ .name = "gta01-bl", ++ .num_resources = ARRAY_SIZE(gta01_bl_resources), ++ .resource = gta01_bl_resources, ++ .dev = { ++ .platform_data = &backlight_machinfo, ++ }, ++}; ++ ++static struct resource gta01_led_resources[] = { ++ [0] = { ++ .start = GTA01_GPIO_VIBRATOR_ON, ++ .end = GTA01_GPIO_VIBRATOR_ON, ++ }, ++}; ++ ++struct platform_device gta01_led_dev = { ++ .name = "neo1973-vibrator", ++ .num_resources = ARRAY_SIZE(gta01_led_resources), ++ .resource = gta01_led_resources, ++}; ++ ++static struct resource gta01_button_resources[] = { ++ [0] = { ++ .start = GTA01_GPIO_AUX_KEY, ++ .end = GTA01_GPIO_AUX_KEY, ++ }, ++ [1] = { ++ .start = GTA01_GPIO_HOLD_KEY, ++ .end = GTA01_GPIO_HOLD_KEY, ++ }, ++ [2] = { ++ .start = GTA01_GPIO_JACK_INSERT, ++ .end = GTA01_GPIO_JACK_INSERT, ++ }, ++ [3] = { ++ .start = 0, ++ .end = 0, ++ }, ++ [4] = { ++ .start = 0, ++ .end = 0, ++ }, ++}; ++ ++struct platform_device gta01_button_dev = { ++ .name = "neo1973-button", ++ .num_resources = ARRAY_SIZE(gta01_button_resources), ++ .resource = gta01_button_resources, ++}; ++ ++static struct platform_device gta01_pm_gsm_dev = { ++ .name = "neo1973-pm-gsm", ++}; ++ ++/* USB */ ++static struct s3c2410_hcd_info gta01_usb_info = { ++ .port[0] = { ++ .flags = S3C_HCDFLG_USED, ++ }, ++ .port[1] = { ++ .flags = 0, ++ }, ++}; ++ ++static void __init gta01_map_io(void) ++{ ++ s3c24xx_init_io(gta01_iodesc, ARRAY_SIZE(gta01_iodesc)); ++ s3c24xx_init_clocks(12*1000*1000); ++ s3c24xx_init_uarts(gta01_uartcfgs, ARRAY_SIZE(gta01_uartcfgs)); ++} ++ ++static irqreturn_t gta01_modem_irq(int irq, void *param) ++{ ++ printk(KERN_DEBUG "GSM wakeup interrupt (IRQ %d)\n", irq); ++ gta_gsm_interrupts++; ++ return IRQ_HANDLED; ++} ++ ++static void __init gta01_machine_init(void) ++{ ++ int rc; ++ ++ if (system_rev == GTA01v4_SYSTEM_REV || ++ system_rev == GTA01Bv2_SYSTEM_REV || ++ system_rev == GTA01Bv3_SYSTEM_REV || ++ system_rev == GTA01Bv4_SYSTEM_REV) { ++ gta01_udc_cfg.udc_command = gta01_udc_command; ++ gta01_mmc_cfg.ocr_avail = MMC_VDD_32_33; ++ } ++ ++ s3c_device_usb.dev.platform_data = >a01_usb_info; ++ s3c_device_nand.dev.platform_data = >a01_nand_info; ++ s3c_device_sdi.dev.platform_data = >a01_mmc_cfg; ++ ++ s3c24xx_fb_set_platdata(>a01_lcd_cfg); ++ ++ INIT_WORK(>a01_udc_vbus_drawer.work, __gta01_udc_vbus_draw); ++ s3c24xx_udc_set_platdata(>a01_udc_cfg); ++ s3c_i2c0_set_platdata(NULL); ++ set_s3c2410ts_info(>a01_ts_cfg); ++ ++ /* Set LCD_RESET / XRES to high */ ++ s3c2410_gpio_cfgpin(S3C2410_GPC6, S3C2410_GPIO_OUTPUT); ++ s3c2410_gpio_setpin(S3C2410_GPC6, 1); ++ ++ /* SPI chip select is gpio output */ ++ s3c2410_gpio_cfgpin(S3C2410_GPG3, S3C2410_GPIO_OUTPUT); ++ s3c2410_gpio_setpin(S3C2410_GPG3, 1); ++ platform_device_register(&s3c_device_spi_lcm); ++ ++ platform_device_register(>a01_bl_dev); ++ platform_device_register(>a01_button_dev); ++ platform_device_register(>a01_pm_gsm_dev); ++ ++ switch (system_rev) { ++ case GTA01v3_SYSTEM_REV: ++ case GTA01v4_SYSTEM_REV: ++ /* just use the default (GTA01_IRQ_PCF50606) */ ++ break; ++ case GTA01Bv2_SYSTEM_REV: ++ case GTA01Bv3_SYSTEM_REV: ++ /* just use the default (GTA01_IRQ_PCF50606) */ ++ gta01_led_resources[0].start = ++ gta01_led_resources[0].end = GTA01Bv2_GPIO_VIBRATOR_ON; ++ break; ++ case GTA01Bv4_SYSTEM_REV: ++ gta01_pmu_resources[0].start = ++ gta01_pmu_resources[0].end = GTA01Bv4_IRQ_PCF50606; ++ gta01_led_resources[0].start = ++ gta01_led_resources[0].end = GTA01Bv4_GPIO_VIBRATOR_ON; ++ break; ++ } ++ mangle_pmu_pdata_by_system_rev(); ++ platform_device_register(>a01_pmu_dev); ++ platform_device_register(>a01_led_dev); ++ ++ platform_add_devices(gta01_devices, ARRAY_SIZE(gta01_devices)); ++ ++ s3c2410_pm_init(); ++ ++ set_irq_type(GTA01_IRQ_MODEM, IRQ_TYPE_EDGE_RISING); ++ rc = request_irq(GTA01_IRQ_MODEM, gta01_modem_irq, IRQF_DISABLED, ++ "modem", NULL); ++ enable_irq_wake(GTA01_IRQ_MODEM); ++ printk(KERN_DEBUG "Enabled GSM wakeup IRQ %d (rc=%d)\n", ++ GTA01_IRQ_MODEM, rc); ++} ++ ++MACHINE_START(NEO1973_GTA01, "GTA01") ++ .phys_io = S3C2410_PA_UART, ++ .io_pg_offst = (((u32)S3C24XX_VA_UART) >> 18) & 0xfffc, ++ .boot_params = S3C2410_SDRAM_PA + 0x100, ++ .map_io = gta01_map_io, ++ .init_irq = s3c24xx_init_irq, ++ .init_machine = gta01_machine_init, ++ .timer = &s3c24xx_timer, ++MACHINE_END +Index: linux-2.6.28/arch/arm/mach-s3c2410/mach-h1940.c +=================================================================== +--- linux-2.6.28.orig/arch/arm/mach-s3c2410/mach-h1940.c 2008-12-25 00:26:37.000000000 +0100 ++++ linux-2.6.28/arch/arm/mach-s3c2410/mach-h1940.c 2009-01-02 00:01:56.000000000 +0100 +@@ -38,11 +38,13 @@ + #include + #include + #include +-#include ++#include ++#include + + #include + #include + #include ++#include + #include + + static struct map_desc h1940_iodesc[] __initdata = { +@@ -129,6 +131,11 @@ static struct s3c2410_udc_mach_info h194 + .vbus_pin_inverted = 1, + }; + ++static struct s3c2410_ts_mach_info h1940_ts_cfg __initdata = { ++ .delay = 10000, ++ .presc = 49, ++ .oversampling_shift = 2, ++}; + + /** + * Set lcd on or off +@@ -183,9 +190,10 @@ static struct platform_device *h1940_dev + &s3c_device_usb, + &s3c_device_lcd, + &s3c_device_wdt, +- &s3c_device_i2c, ++ &s3c_device_i2c0, + &s3c_device_iis, + &s3c_device_usbgadget, ++ &s3c_device_ts, + &s3c_device_leds, + &s3c_device_bluetooth, + }; +@@ -201,7 +209,7 @@ static void __init h1940_map_io(void) + #ifdef CONFIG_PM_H1940 + memcpy(phys_to_virt(H1940_SUSPEND_RESUMEAT), h1940_pm_return, 1024); + #endif +- s3c2410_pm_init(); ++ s3c_pm_init(); + } + + static void __init h1940_init_irq(void) +@@ -214,7 +222,9 @@ static void __init h1940_init(void) + u32 tmp; + + s3c24xx_fb_set_platdata(&h1940_fb_info); ++ set_s3c2410ts_info(&h1940_ts_cfg); + s3c24xx_udc_set_platdata(&h1940_udc_cfg); ++ s3c_i2c0_set_platdata(NULL); + + /* Turn off suspend on both USB ports, and switch the + * selectable USB port to USB device mode. */ +@@ -223,10 +233,9 @@ static void __init h1940_init(void) + S3C2410_MISCCR_USBSUSPND0 | + S3C2410_MISCCR_USBSUSPND1, 0x0); + +- tmp = ( +- 0x78 << S3C2410_PLLCON_MDIVSHIFT) +- | (0x02 << S3C2410_PLLCON_PDIVSHIFT) +- | (0x03 << S3C2410_PLLCON_SDIVSHIFT); ++ tmp = (0x78 << S3C24XX_PLLCON_MDIVSHIFT) ++ | (0x02 << S3C24XX_PLLCON_PDIVSHIFT) ++ | (0x03 << S3C24XX_PLLCON_SDIVSHIFT); + writel(tmp, S3C2410_UPLLCON); + + platform_add_devices(h1940_devices, ARRAY_SIZE(h1940_devices)); +Index: linux-2.6.28/arch/arm/mach-s3c2410/mach-n30.c +=================================================================== +--- linux-2.6.28.orig/arch/arm/mach-s3c2410/mach-n30.c 2008-12-25 00:26:37.000000000 +0100 ++++ linux-2.6.28/arch/arm/mach-s3c2410/mach-n30.c 2009-01-02 00:01:56.000000000 +0100 +@@ -40,14 +40,14 @@ + #include + #include + +-#include ++#include + #include + + #include + #include + #include + #include +-#include ++#include + + static struct map_desc n30_iodesc[] __initdata = { + /* nothing here yet */ +@@ -320,7 +320,7 @@ static struct s3c2410fb_mach_info n30_fb + static struct platform_device *n30_devices[] __initdata = { + &s3c_device_lcd, + &s3c_device_wdt, +- &s3c_device_i2c, ++ &s3c_device_i2c0, + &s3c_device_iis, + &s3c_device_usb, + &s3c_device_usbgadget, +@@ -332,7 +332,7 @@ static struct platform_device *n30_devic + static struct platform_device *n35_devices[] __initdata = { + &s3c_device_lcd, + &s3c_device_wdt, +- &s3c_device_i2c, ++ &s3c_device_i2c0, + &s3c_device_iis, + &s3c_device_usbgadget, + &n35_button_device, +@@ -501,7 +501,7 @@ static void __init n30_init_irq(void) + static void __init n30_init(void) + { + s3c24xx_fb_set_platdata(&n30_fb_info); +- s3c_device_i2c.dev.platform_data = &n30_i2ccfg; ++ s3c_device_i2c0.dev.platform_data = &n30_i2ccfg; + s3c24xx_udc_set_platdata(&n30_udc_cfg); + + /* Turn off suspend on both USB ports, and switch the +Index: linux-2.6.28/arch/arm/mach-s3c2410/mach-otom.c +=================================================================== +--- linux-2.6.28.orig/arch/arm/mach-s3c2410/mach-otom.c 2008-12-25 00:26:37.000000000 +0100 ++++ linux-2.6.28/arch/arm/mach-s3c2410/mach-otom.c 2009-01-02 00:01:56.000000000 +0100 +@@ -35,6 +35,7 @@ + #include + #include + #include ++#include + #include + + static struct map_desc otom11_iodesc[] __initdata = { +@@ -94,7 +95,7 @@ static struct platform_device *otom11_de + &s3c_device_usb, + &s3c_device_lcd, + &s3c_device_wdt, +- &s3c_device_i2c, ++ &s3c_device_i2c0, + &s3c_device_iis, + &s3c_device_rtc, + &otom_device_nor, +@@ -109,6 +110,7 @@ static void __init otom11_map_io(void) + + static void __init otom11_init(void) + { ++ s3c_i2c0_set_platdata(NULL); + platform_add_devices(otom11_devices, ARRAY_SIZE(otom11_devices)); + } + +Index: linux-2.6.28/arch/arm/mach-s3c2410/mach-qt2410.c +=================================================================== +--- linux-2.6.28.orig/arch/arm/mach-s3c2410/mach-qt2410.c 2008-12-25 00:26:37.000000000 +0100 ++++ linux-2.6.28/arch/arm/mach-s3c2410/mach-qt2410.c 2009-01-02 00:01:56.000000000 +0100 +@@ -1,6 +1,6 @@ + /* linux/arch/arm/mach-s3c2410/mach-qt2410.c + * +- * Copyright (C) 2006 by OpenMoko, Inc. ++ * Copyright (C) 2006 by Openmoko, Inc. + * Author: Harald Welte + * All rights reserved. + * +@@ -50,10 +50,11 @@ + #include + #include + #include +-#include +-#include ++#include ++#include + #include + #include ++#include + + #include + #include +@@ -213,7 +214,7 @@ static struct platform_device qt2410_led + + /* SPI */ + +-static void spi_gpio_cs(struct s3c2410_spigpio_info *spi, int cs) ++static void spi_gpio_cs(struct s3c2410_spigpio_info *spi, int csidx, int cs) + { + switch (cs) { + case BITBANG_CS_ACTIVE: +@@ -247,7 +248,7 @@ static struct platform_device *qt2410_de + &s3c_device_usb, + &s3c_device_lcd, + &s3c_device_wdt, +- &s3c_device_i2c, ++ &s3c_device_i2c0, + &s3c_device_iis, + &s3c_device_sdi, + &s3c_device_usbgadget, +@@ -320,6 +321,24 @@ static int __init qt2410_tft_setup(char + + __setup("tft=", qt2410_tft_setup); + ++static struct resource qt2410_button_resources[] = { ++ [0] = { ++ .start = S3C2410_GPF0, ++ .end = S3C2410_GPF0, ++ }, ++ [1] = { ++ .start = S3C2410_GPF2, ++ .end = S3C2410_GPF2, ++ }, ++}; ++ ++struct platform_device qt2410_button_dev = { ++ .name ="qt2410-button", ++ .num_resources = ARRAY_SIZE(qt2410_button_resources), ++ .resource = qt2410_button_resources, ++}; ++ ++ + static void __init qt2410_map_io(void) + { + s3c24xx_init_io(qt2410_iodesc, ARRAY_SIZE(qt2410_iodesc)); +@@ -349,11 +368,12 @@ static void __init qt2410_machine_init(v + s3c2410_gpio_setpin(S3C2410_GPB0, 1); + + s3c24xx_udc_set_platdata(&qt2410_udc_cfg); ++ s3c_i2c0_set_platdata(NULL); + + s3c2410_gpio_cfgpin(S3C2410_GPB5, S3C2410_GPIO_OUTPUT); + + platform_add_devices(qt2410_devices, ARRAY_SIZE(qt2410_devices)); +- s3c2410_pm_init(); ++ s3c_pm_init(); + } + + MACHINE_START(QT2410, "QT2410") +Index: linux-2.6.28/arch/arm/mach-s3c2410/mach-smdk2410.c +=================================================================== +--- linux-2.6.28.orig/arch/arm/mach-s3c2410/mach-smdk2410.c 2008-12-25 00:26:37.000000000 +0100 ++++ linux-2.6.28/arch/arm/mach-s3c2410/mach-smdk2410.c 2009-01-02 00:01:56.000000000 +0100 +@@ -47,6 +47,7 @@ + #include + + #include ++#include + + #include + #include +@@ -89,7 +90,7 @@ static struct platform_device *smdk2410_ + &s3c_device_usb, + &s3c_device_lcd, + &s3c_device_wdt, +- &s3c_device_i2c, ++ &s3c_device_i2c0, + &s3c_device_iis, + }; + +@@ -102,6 +103,7 @@ static void __init smdk2410_map_io(void) + + static void __init smdk2410_init(void) + { ++ s3c_i2c0_set_platdata(NULL); + platform_add_devices(smdk2410_devices, ARRAY_SIZE(smdk2410_devices)); + smdk_machine_init(); + } +Index: linux-2.6.28/arch/arm/mach-s3c2410/mach-tct_hammer.c +=================================================================== +--- linux-2.6.28.orig/arch/arm/mach-s3c2410/mach-tct_hammer.c 2008-12-25 00:26:37.000000000 +0100 ++++ linux-2.6.28/arch/arm/mach-s3c2410/mach-tct_hammer.c 2009-01-02 00:01:56.000000000 +0100 +@@ -45,6 +45,7 @@ + #include + + #include ++#include + #include + #include + +@@ -127,7 +128,7 @@ static struct s3c2410_uartcfg tct_hammer + static struct platform_device *tct_hammer_devices[] __initdata = { + &s3c_device_adc, + &s3c_device_wdt, +- &s3c_device_i2c, ++ &s3c_device_i2c0, + &s3c_device_usb, + &s3c_device_rtc, + &s3c_device_usbgadget, +@@ -146,6 +147,7 @@ static void __init tct_hammer_map_io(voi + + static void __init tct_hammer_init(void) + { ++ s3c_i2c0_set_platdata(NULL); + platform_add_devices(tct_hammer_devices, ARRAY_SIZE(tct_hammer_devices)); + } + +Index: linux-2.6.28/arch/arm/mach-s3c2410/mach-vr1000.c +=================================================================== +--- linux-2.6.28.orig/arch/arm/mach-s3c2410/mach-vr1000.c 2008-12-25 00:26:37.000000000 +0100 ++++ linux-2.6.28/arch/arm/mach-s3c2410/mach-vr1000.c 2009-01-02 00:01:56.000000000 +0100 +@@ -47,6 +47,7 @@ + #include + #include + #include ++#include + + #include "usb-simtec.h" + #include "nor-simtec.h" +@@ -334,7 +335,7 @@ static struct platform_device *vr1000_de + &s3c_device_usb, + &s3c_device_lcd, + &s3c_device_wdt, +- &s3c_device_i2c, ++ &s3c_device_i2c0, + &s3c_device_adc, + &serial_device, + &vr1000_dm9k0, +@@ -384,6 +385,7 @@ static void __init vr1000_map_io(void) + + static void __init vr1000_init(void) + { ++ s3c_i2c0_set_platdata(NULL); + platform_add_devices(vr1000_devices, ARRAY_SIZE(vr1000_devices)); + + i2c_register_board_info(0, vr1000_i2c_devs, +Index: linux-2.6.28/arch/arm/mach-s3c2410/Makefile +=================================================================== +--- linux-2.6.28.orig/arch/arm/mach-s3c2410/Makefile 2008-12-25 00:26:37.000000000 +0100 ++++ linux-2.6.28/arch/arm/mach-s3c2410/Makefile 2009-01-02 00:01:56.000000000 +0100 +@@ -15,7 +15,8 @@ obj-$(CONFIG_CPU_S3C2410_DMA) += dma.o + obj-$(CONFIG_CPU_S3C2410_DMA) += dma.o + obj-$(CONFIG_S3C2410_PM) += pm.o sleep.o + obj-$(CONFIG_S3C2410_GPIO) += gpio.o +-obj-$(CONFIG_S3C2410_CLOCK) += clock.o ++#obj-$(CONFIG_S3C2410_CLOCK) += clock.o ++obj-$(CONFIG_S3C2410_PWM) += pwm.o + + # Machine support + +@@ -38,3 +39,5 @@ obj-$(CONFIG_SIMTEC_NOR) += nor-simtec.o + # machine additions + + obj-$(CONFIG_MACH_BAST_IDE) += bast-ide.o ++obj-$(CONFIG_MACH_NEO1973_GTA01)+= mach-gta01.o ++ +Index: linux-2.6.28/arch/arm/mach-s3c2410/pm.c +=================================================================== +--- linux-2.6.28.orig/arch/arm/mach-s3c2410/pm.c 2008-12-25 00:26:37.000000000 +0100 ++++ linux-2.6.28/arch/arm/mach-s3c2410/pm.c 2009-01-02 00:01:56.000000000 +0100 +@@ -37,21 +37,14 @@ + #include + #include + +-#ifdef CONFIG_S3C2410_PM_DEBUG +-extern void pm_dbg(const char *fmt, ...); +-#define DBG(fmt...) pm_dbg(fmt) +-#else +-#define DBG(fmt...) printk(KERN_DEBUG fmt) +-#endif +- + static void s3c2410_pm_prepare(void) + { + /* ensure at least GSTATUS3 has the resume address */ + +- __raw_writel(virt_to_phys(s3c2410_cpu_resume), S3C2410_GSTATUS3); ++ __raw_writel(virt_to_phys(s3c_cpu_resume), S3C2410_GSTATUS3); + +- DBG("GSTATUS3 0x%08x\n", __raw_readl(S3C2410_GSTATUS3)); +- DBG("GSTATUS4 0x%08x\n", __raw_readl(S3C2410_GSTATUS4)); ++ S3C_PMDBG("GSTATUS3 0x%08x\n", __raw_readl(S3C2410_GSTATUS3)); ++ S3C_PMDBG("GSTATUS4 0x%08x\n", __raw_readl(S3C2410_GSTATUS4)); + + if (machine_is_h1940()) { + void *base = phys_to_virt(H1940_SUSPEND_CHECK); +Index: linux-2.6.28/arch/arm/mach-s3c2410/pwm.c +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-2.6.28/arch/arm/mach-s3c2410/pwm.c 2009-01-02 00:01:56.000000000 +0100 +@@ -0,0 +1,288 @@ ++/* ++ * arch/arm/mach-s3c2410/3c2410-pwm.c ++ * ++ * Copyright (c) by Javi Roman ++ * for the Openmoko Project. ++ * ++ * S3C2410A SoC PWM support ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; either version 2 of the License, or ++ * (at your option) any later version. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not, write to the Free Software ++ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA ++ * ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#ifdef CONFIG_PM ++ static unsigned long standby_reg_tcon; ++ static unsigned long standby_reg_tcfg0; ++ static unsigned long standby_reg_tcfg1; ++#endif ++ ++int s3c2410_pwm_disable(struct s3c2410_pwm *pwm) ++{ ++ unsigned long tcon; ++ ++ /* stop timer */ ++ tcon = __raw_readl(S3C2410_TCON); ++ tcon &= 0xffffff00; ++ __raw_writel(tcon, S3C2410_TCON); ++ ++ clk_disable(pwm->pclk); ++ clk_put(pwm->pclk); ++ ++ return 0; ++} ++EXPORT_SYMBOL_GPL(s3c2410_pwm_disable); ++ ++int s3c2410_pwm_init(struct s3c2410_pwm *pwm) ++{ ++ pwm->pclk = clk_get(NULL, "timers"); ++ if (IS_ERR(pwm->pclk)) ++ return PTR_ERR(pwm->pclk); ++ ++ clk_enable(pwm->pclk); ++ pwm->pclk_rate = clk_get_rate(pwm->pclk); ++ return 0; ++} ++EXPORT_SYMBOL_GPL(s3c2410_pwm_init); ++ ++int s3c2410_pwm_enable(struct s3c2410_pwm *pwm) ++{ ++ unsigned long tcfg0, tcfg1, tcnt, tcmp; ++ ++ /* control registers bits */ ++ tcfg1 = __raw_readl(S3C2410_TCFG1); ++ tcfg0 = __raw_readl(S3C2410_TCFG0); ++ ++ /* divider & scaler slection */ ++ switch (pwm->timerid) { ++ case PWM0: ++ tcfg1 &= ~S3C2410_TCFG1_MUX0_MASK; ++ tcfg0 &= ~S3C2410_TCFG_PRESCALER0_MASK; ++ break; ++ case PWM1: ++ tcfg1 &= ~S3C2410_TCFG1_MUX1_MASK; ++ tcfg0 &= ~S3C2410_TCFG_PRESCALER0_MASK; ++ break; ++ case PWM2: ++ tcfg1 &= ~S3C2410_TCFG1_MUX2_MASK; ++ tcfg0 &= ~S3C2410_TCFG_PRESCALER1_MASK; ++ break; ++ case PWM3: ++ tcfg1 &= ~S3C2410_TCFG1_MUX3_MASK; ++ tcfg0 &= ~S3C2410_TCFG_PRESCALER1_MASK; ++ break; ++ case PWM4: ++ /* timer four is not capable of doing PWM */ ++ break; ++ default: ++ clk_disable(pwm->pclk); ++ clk_put(pwm->pclk); ++ return -1; ++ } ++ ++ /* divider & scaler values */ ++ tcfg1 |= pwm->divider; ++ __raw_writel(tcfg1, S3C2410_TCFG1); ++ ++ switch (pwm->timerid) { ++ case PWM0: ++ case PWM1: ++ tcfg0 |= pwm->prescaler; ++ __raw_writel(tcfg0, S3C2410_TCFG0); ++ break; ++ default: ++ if ((tcfg0 | pwm->prescaler) != tcfg0) { ++ printk(KERN_WARNING "not changing prescaler of PWM %u," ++ " since it's shared with timer4 (clock tick)\n", ++ pwm->timerid); ++ } ++ break; ++ } ++ ++ /* timer count and compare buffer initial values */ ++ tcnt = pwm->counter; ++ tcmp = pwm->comparer; ++ ++ __raw_writel(tcnt, S3C2410_TCNTB(pwm->timerid)); ++ __raw_writel(tcmp, S3C2410_TCMPB(pwm->timerid)); ++ ++ /* ensure timer is stopped */ ++ s3c2410_pwm_stop(pwm); ++ ++ return 0; ++} ++EXPORT_SYMBOL_GPL(s3c2410_pwm_enable); ++ ++int s3c2410_pwm_start(struct s3c2410_pwm *pwm) ++{ ++ unsigned long tcon; ++ ++ tcon = __raw_readl(S3C2410_TCON); ++ ++ switch (pwm->timerid) { ++ case PWM0: ++ tcon |= S3C2410_TCON_T0START; ++ tcon &= ~S3C2410_TCON_T0MANUALUPD; ++ break; ++ case PWM1: ++ tcon |= S3C2410_TCON_T1START; ++ tcon &= ~S3C2410_TCON_T1MANUALUPD; ++ break; ++ case PWM2: ++ tcon |= S3C2410_TCON_T2START; ++ tcon &= ~S3C2410_TCON_T2MANUALUPD; ++ break; ++ case PWM3: ++ tcon |= S3C2410_TCON_T3START; ++ tcon &= ~S3C2410_TCON_T3MANUALUPD; ++ break; ++ case PWM4: ++ /* timer four is not capable of doing PWM */ ++ default: ++ return -ENODEV; ++ } ++ ++ __raw_writel(tcon, S3C2410_TCON); ++ ++ return 0; ++} ++EXPORT_SYMBOL_GPL(s3c2410_pwm_start); ++ ++int s3c2410_pwm_stop(struct s3c2410_pwm *pwm) ++{ ++ unsigned long tcon; ++ ++ tcon = __raw_readl(S3C2410_TCON); ++ ++ switch (pwm->timerid) { ++ case PWM0: ++ tcon &= ~0x00000000; ++ tcon |= S3C2410_TCON_T0RELOAD; ++ tcon |= S3C2410_TCON_T0MANUALUPD; ++ break; ++ case PWM1: ++ tcon &= ~0x00000080; ++ tcon |= S3C2410_TCON_T1RELOAD; ++ tcon |= S3C2410_TCON_T1MANUALUPD; ++ break; ++ case PWM2: ++ tcon &= ~0x00000800; ++ tcon |= S3C2410_TCON_T2RELOAD; ++ tcon |= S3C2410_TCON_T2MANUALUPD; ++ break; ++ case PWM3: ++ tcon &= ~0x00008000; ++ tcon |= S3C2410_TCON_T3RELOAD; ++ tcon |= S3C2410_TCON_T3MANUALUPD; ++ break; ++ case PWM4: ++ /* timer four is not capable of doing PWM */ ++ default: ++ return -ENODEV; ++ } ++ ++ __raw_writel(tcon, S3C2410_TCON); ++ ++ return 0; ++} ++EXPORT_SYMBOL_GPL(s3c2410_pwm_stop); ++ ++int s3c2410_pwm_duty_cycle(int reg_value, struct s3c2410_pwm *pwm) ++{ ++ __raw_writel(reg_value, S3C2410_TCMPB(pwm->timerid)); ++ ++ return 0; ++} ++EXPORT_SYMBOL_GPL(s3c2410_pwm_duty_cycle); ++ ++int s3c2410_pwm_dumpregs(void) ++{ ++ printk(KERN_INFO "TCON: %08lx, TCFG0: %08lx, TCFG1: %08lx\n", ++ (unsigned long) __raw_readl(S3C2410_TCON), ++ (unsigned long) __raw_readl(S3C2410_TCFG0), ++ (unsigned long) __raw_readl(S3C2410_TCFG1)); ++ ++ return 0; ++} ++EXPORT_SYMBOL_GPL(s3c2410_pwm_dumpregs); ++ ++static int __init s3c24xx_pwm_probe(struct platform_device *pdev) ++{ ++ struct s3c24xx_pwm_platform_data *pdata = pdev->dev.platform_data; ++ ++ dev_info(&pdev->dev, "s3c24xx_pwm is registered \n"); ++ ++ /* if platform was interested, give him a chance to register ++ * platform devices that switch power with us as the parent ++ * at registration time -- ensures suspend / resume ordering ++ */ ++ if (pdata) ++ if (pdata->attach_child_devices) ++ (pdata->attach_child_devices)(&pdev->dev); ++ ++ return 0; ++} ++ ++#ifdef CONFIG_PM ++static int s3c24xx_pwm_suspend(struct platform_device *pdev, pm_message_t state) ++{ ++ /* PWM config should be kept in suspending */ ++ standby_reg_tcon = __raw_readl(S3C2410_TCON); ++ standby_reg_tcfg0 = __raw_readl(S3C2410_TCFG0); ++ standby_reg_tcfg1 = __raw_readl(S3C2410_TCFG1); ++ ++ return 0; ++} ++ ++static int s3c24xx_pwm_resume(struct platform_device *pdev) ++{ ++ __raw_writel(standby_reg_tcon, S3C2410_TCON); ++ __raw_writel(standby_reg_tcfg0, S3C2410_TCFG0); ++ __raw_writel(standby_reg_tcfg1, S3C2410_TCFG1); ++ ++ return 0; ++} ++#else ++#define sc32440_pwm_suspend NULL ++#define sc32440_pwm_resume NULL ++#endif ++ ++static struct platform_driver s3c24xx_pwm_driver = { ++ .driver = { ++ .name = "s3c24xx_pwm", ++ .owner = THIS_MODULE, ++ }, ++ .probe = s3c24xx_pwm_probe, ++ .suspend = s3c24xx_pwm_suspend, ++ .resume = s3c24xx_pwm_resume, ++}; ++ ++static int __init s3c24xx_pwm_init(void) ++{ ++ return platform_driver_register(&s3c24xx_pwm_driver); ++} ++ ++static void __exit s3c24xx_pwm_exit(void) ++{ ++} ++ ++MODULE_AUTHOR("Javi Roman "); ++MODULE_LICENSE("GPL"); ++ ++module_init(s3c24xx_pwm_init); ++module_exit(s3c24xx_pwm_exit); +Index: linux-2.6.28/arch/arm/mach-s3c2410/s3c2410.c +=================================================================== +--- linux-2.6.28.orig/arch/arm/mach-s3c2410/s3c2410.c 2008-12-25 00:26:37.000000000 +0100 ++++ linux-2.6.28/arch/arm/mach-s3c2410/s3c2410.c 2009-01-02 00:01:56.000000000 +0100 +@@ -16,6 +16,7 @@ + #include + #include + #include ++#include + #include + #include + #include +@@ -28,6 +29,8 @@ + #include + #include + ++#include ++ + #include + #include + +@@ -35,6 +38,7 @@ + #include + #include + #include ++#include + + /* Initial IO mappings */ + +@@ -59,25 +63,28 @@ void __init s3c2410_init_uarts(struct s3 + * machine specific initialisation. + */ + +-void __init s3c2410_map_io(struct map_desc *mach_desc, int mach_size) ++void __init s3c2410_map_io(void) + { +- /* register our io-tables */ +- + iotable_init(s3c2410_iodesc, ARRAY_SIZE(s3c2410_iodesc)); +- iotable_init(mach_desc, mach_size); + } + +-void __init s3c2410_init_clocks(int xtal) ++void __init_or_cpufreq s3c2410_setup_clocks(void) + { ++ struct clk *xtal_clk; + unsigned long tmp; ++ unsigned long xtal; + unsigned long fclk; + unsigned long hclk; + unsigned long pclk; + ++ xtal_clk = clk_get(NULL, "xtal"); ++ xtal = clk_get_rate(xtal_clk); ++ clk_put(xtal_clk); ++ + /* now we've got our machine bits initialised, work out what + * clocks we've got */ + +- fclk = s3c2410_get_pll(__raw_readl(S3C2410_MPLLCON), xtal); ++ fclk = s3c24xx_get_pll(__raw_readl(S3C2410_MPLLCON), xtal); + + tmp = __raw_readl(S3C2410_CLKDIVN); + +@@ -95,7 +102,13 @@ void __init s3c2410_init_clocks(int xtal + * console to use them + */ + +- s3c24xx_setup_clocks(xtal, fclk, hclk, pclk); ++ s3c24xx_setup_clocks(fclk, hclk, pclk); ++} ++ ++void __init s3c2410_init_clocks(int xtal) ++{ ++ s3c24xx_register_baseclocks(xtal); ++ s3c2410_setup_clocks(); + s3c2410_baseclk_add(); + } + +Index: linux-2.6.28/arch/arm/mach-s3c2412/clock.c +=================================================================== +--- linux-2.6.28.orig/arch/arm/mach-s3c2412/clock.c 2008-12-25 00:26:37.000000000 +0100 ++++ linux-2.6.28/arch/arm/mach-s3c2412/clock.c 2009-01-02 00:01:56.000000000 +0100 +@@ -93,12 +93,6 @@ static int s3c2412_upll_enable(struct cl + + /* clock selections */ + +-/* CPU EXTCLK input */ +-static struct clk clk_ext = { +- .name = "extclk", +- .id = -1, +-}; +- + static struct clk clk_erefclk = { + .name = "erefclk", + .id = -1, +@@ -773,5 +767,6 @@ int __init s3c2412_baseclk_add(void) + s3c2412_clkcon_enable(clkp, 0); + } + ++ s3c_pwmclk_init(); + return 0; + } +Index: linux-2.6.28/arch/arm/mach-s3c2412/dma.c +=================================================================== +--- linux-2.6.28.orig/arch/arm/mach-s3c2412/dma.c 2008-12-25 00:26:37.000000000 +0100 ++++ linux-2.6.28/arch/arm/mach-s3c2412/dma.c 2009-01-02 00:01:56.000000000 +0100 +@@ -26,13 +26,13 @@ + + #include + #include +-#include ++#include + #include + #include + #include + #include + #include +-#include ++#include + + #define MAP(x) { (x)| DMA_CH_VALID, (x)| DMA_CH_VALID, (x)| DMA_CH_VALID, (x)| DMA_CH_VALID } + +Index: linux-2.6.28/arch/arm/mach-s3c2412/mach-jive.c +=================================================================== +--- linux-2.6.28.orig/arch/arm/mach-s3c2412/mach-jive.c 2008-12-25 00:26:37.000000000 +0100 ++++ linux-2.6.28/arch/arm/mach-s3c2412/mach-jive.c 2009-01-02 00:01:56.000000000 +0100 +@@ -31,8 +31,8 @@ + #include + + #include +-#include +-#include ++#include ++#include + + #include + #include +@@ -52,7 +52,8 @@ + #include + #include + #include +-#include ++#include ++#include + + static struct map_desc jive_iodesc[] __initdata = { + }; +@@ -450,14 +451,14 @@ static struct spi_board_info __initdata + + /* I2C bus and device configuration. */ + +-static struct s3c2410_platform_i2c jive_i2c_cfg = { ++static struct s3c2410_platform_i2c jive_i2c_cfg __initdata = { + .max_freq = 80 * 1000, + .bus_freq = 50 * 1000, + .flags = S3C_IICFLG_FILTER, + .sda_delay = 2, + }; + +-static struct i2c_board_info jive_i2c_devs[] = { ++static struct i2c_board_info jive_i2c_devs[] __initdata = { + [0] = { + I2C_BOARD_INFO("lis302dl", 0x1c), + .irq = IRQ_EINT14, +@@ -470,7 +471,7 @@ static struct platform_device *jive_devi + &s3c_device_usb, + &s3c_device_rtc, + &s3c_device_wdt, +- &s3c_device_i2c, ++ &s3c_device_i2c0, + &s3c_device_lcd, + &jive_device_lcdspi, + &jive_device_wm8750, +@@ -492,7 +493,7 @@ static int jive_pm_suspend(struct sys_de + * correct address to resume from. */ + + __raw_writel(0x2BED, S3C2412_INFORM0); +- __raw_writel(virt_to_phys(s3c2410_cpu_resume), S3C2412_INFORM1); ++ __raw_writel(virt_to_phys(s3c_cpu_resume), S3C2412_INFORM1); + + return 0; + } +@@ -628,7 +629,7 @@ static void __init jive_machine_init(voi + + /* initialise the power management now we've setup everything. */ + +- s3c2410_pm_init(); ++ s3c_pm_init(); + + s3c_device_nand.dev.platform_data = &jive_nand_info; + +@@ -663,7 +664,7 @@ static void __init jive_machine_init(voi + + spi_register_board_info(jive_spi_devs, ARRAY_SIZE(jive_spi_devs)); + +- s3c_device_i2c.dev.platform_data = &jive_i2c_cfg; ++ s3c_i2c0_set_platdata(&jive_i2c_cfg); + i2c_register_board_info(0, jive_i2c_devs, ARRAY_SIZE(jive_i2c_devs)); + + pm_power_off = jive_power_off; +Index: linux-2.6.28/arch/arm/mach-s3c2412/mach-smdk2413.c +=================================================================== +--- linux-2.6.28.orig/arch/arm/mach-s3c2412/mach-smdk2413.c 2008-12-25 00:26:37.000000000 +0100 ++++ linux-2.6.28/arch/arm/mach-s3c2412/mach-smdk2413.c 2009-01-02 00:01:56.000000000 +0100 +@@ -37,7 +37,8 @@ + #include + + #include +-#include ++#include ++#include + #include + + #include +@@ -105,7 +106,7 @@ static struct platform_device *smdk2413_ + &s3c_device_usb, + //&s3c_device_lcd, + &s3c_device_wdt, +- &s3c_device_i2c, ++ &s3c_device_i2c0, + &s3c_device_iis, + &s3c_device_usbgadget, + }; +@@ -142,6 +143,7 @@ static void __init smdk2413_machine_init + + + s3c24xx_udc_set_platdata(&smdk2413_udc_cfg); ++ s3c_i2c0_set_platdata(NULL); + + platform_add_devices(smdk2413_devices, ARRAY_SIZE(smdk2413_devices)); + smdk_machine_init(); +Index: linux-2.6.28/arch/arm/mach-s3c2412/mach-vstms.c +=================================================================== +--- linux-2.6.28.orig/arch/arm/mach-s3c2412/mach-vstms.c 2008-12-25 00:26:37.000000000 +0100 ++++ linux-2.6.28/arch/arm/mach-s3c2412/mach-vstms.c 2009-01-02 00:01:56.000000000 +0100 +@@ -39,7 +39,8 @@ + #include + #include + +-#include ++#include ++#include + + #include + #include +@@ -122,7 +123,7 @@ static struct s3c2410_platform_nand vstm + static struct platform_device *vstms_devices[] __initdata = { + &s3c_device_usb, + &s3c_device_wdt, +- &s3c_device_i2c, ++ &s3c_device_i2c0, + &s3c_device_iis, + &s3c_device_rtc, + &s3c_device_nand, +@@ -151,6 +152,7 @@ static void __init vstms_map_io(void) + + static void __init vstms_init(void) + { ++ s3c_i2c0_set_platdata(NULL); + platform_add_devices(vstms_devices, ARRAY_SIZE(vstms_devices)); + } + +Index: linux-2.6.28/arch/arm/mach-s3c2412/pm.c +=================================================================== +--- linux-2.6.28.orig/arch/arm/mach-s3c2412/pm.c 2008-12-25 00:26:37.000000000 +0100 ++++ linux-2.6.28/arch/arm/mach-s3c2412/pm.c 2009-01-02 00:01:56.000000000 +0100 +@@ -85,7 +85,7 @@ static struct sleep_save s3c2412_sleep[] + + static int s3c2412_pm_suspend(struct sys_device *dev, pm_message_t state) + { +- s3c2410_pm_do_save(s3c2412_sleep, ARRAY_SIZE(s3c2412_sleep)); ++ s3c_pm_do_save(s3c2412_sleep, ARRAY_SIZE(s3c2412_sleep)); + return 0; + } + +@@ -98,7 +98,7 @@ static int s3c2412_pm_resume(struct sys_ + tmp |= S3C2412_PWRCFG_STANDBYWFI_IDLE; + __raw_writel(tmp, S3C2412_PWRCFG); + +- s3c2410_pm_do_restore(s3c2412_sleep, ARRAY_SIZE(s3c2412_sleep)); ++ s3c_pm_do_restore(s3c2412_sleep, ARRAY_SIZE(s3c2412_sleep)); + return 0; + } + +Index: linux-2.6.28/arch/arm/mach-s3c2412/s3c2412.c +=================================================================== +--- linux-2.6.28.orig/arch/arm/mach-s3c2412/s3c2412.c 2008-12-25 00:26:37.000000000 +0100 ++++ linux-2.6.28/arch/arm/mach-s3c2412/s3c2412.c 2009-01-02 00:01:56.000000000 +0100 +@@ -16,6 +16,7 @@ + #include + #include + #include ++#include + #include + #include + #include +@@ -33,13 +34,15 @@ + #include + #include + ++#include ++ + #include + #include + #include + #include + #include + #include +-#include ++#include + #include + + #include +@@ -47,6 +50,7 @@ + #include + #include + #include ++#include + + #ifndef CONFIG_CPU_S3C2412_ONLY + void __iomem *s3c24xx_va_gpio2 = S3C24XX_VA_GPIO; +@@ -136,7 +140,7 @@ static void s3c2412_hard_reset(void) + * machine specific initialisation. + */ + +-void __init s3c2412_map_io(struct map_desc *mach_desc, int mach_size) ++void __init s3c2412_map_io(void) + { + /* move base of IO */ + +@@ -153,20 +157,25 @@ void __init s3c2412_map_io(struct map_de + /* register our io-tables */ + + iotable_init(s3c2412_iodesc, ARRAY_SIZE(s3c2412_iodesc)); +- iotable_init(mach_desc, mach_size); + } + +-void __init s3c2412_init_clocks(int xtal) ++void __init_or_cpufreq s3c2412_setup_clocks(void) + { ++ struct clk *xtal_clk; + unsigned long tmp; ++ unsigned long xtal; + unsigned long fclk; + unsigned long hclk; + unsigned long pclk; + ++ xtal_clk = clk_get(NULL, "xtal"); ++ xtal = clk_get_rate(xtal_clk); ++ clk_put(xtal_clk); ++ + /* now we've got our machine bits initialised, work out what + * clocks we've got */ + +- fclk = s3c2410_get_pll(__raw_readl(S3C2410_MPLLCON), xtal*2); ++ fclk = s3c24xx_get_pll(__raw_readl(S3C2410_MPLLCON), xtal * 2); + + clk_mpll.rate = fclk; + +@@ -183,11 +192,17 @@ void __init s3c2412_init_clocks(int xtal + printk("S3C2412: core %ld.%03ld MHz, memory %ld.%03ld MHz, peripheral %ld.%03ld MHz\n", + print_mhz(fclk), print_mhz(hclk), print_mhz(pclk)); + ++ s3c24xx_setup_clocks(fclk, hclk, pclk); ++} ++ ++void __init s3c2412_init_clocks(int xtal) ++{ + /* initialise the clocks here, to allow other things like the + * console to use them + */ + +- s3c24xx_setup_clocks(xtal, fclk, hclk, pclk); ++ s3c24xx_register_baseclocks(xtal); ++ s3c2412_setup_clocks(); + s3c2412_baseclk_add(); + } + +@@ -216,5 +231,8 @@ int __init s3c2412_init(void) + { + printk("S3C2412: Initialising architecture\n"); + ++ /* make sure SD/MMC driver can distinguish 2412 from 2410 */ ++ s3c_device_sdi.name = "s3c2412-sdi"; ++ + return sysdev_register(&s3c2412_sysdev); + } +Index: linux-2.6.28/arch/arm/mach-s3c2440/camera/bits.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-2.6.28/arch/arm/mach-s3c2440/camera/bits.h 2009-01-02 00:01:56.000000000 +0100 +@@ -0,0 +1,48 @@ ++/* ++ * Copyright (C) Samsung Electroincs 2003 ++ * Author: SW.LEE ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; either version 2 of the License, or ++ * (at your option) any later version. ++ * ++ */ ++ ++#ifndef __SW_BITS_H ++#define __SW_BITS_H ++ ++#define BIT0 0x00000001 ++#define BIT1 0x00000002 ++#define BIT2 0x00000004 ++#define BIT3 0x00000008 ++#define BIT4 0x00000010 ++#define BIT5 0x00000020 ++#define BIT6 0x00000040 ++#define BIT7 0x00000080 ++#define BIT8 0x00000100 ++#define BIT9 0x00000200 ++#define BIT10 0x00000400 ++#define BIT11 0x00000800 ++#define BIT12 0x00001000 ++#define BIT13 0x00002000 ++#define BIT14 0x00004000 ++#define BIT15 0x00008000 ++#define BIT16 0x00010000 ++#define BIT17 0x00020000 ++#define BIT18 0x00040000 ++#define BIT19 0x00080000 ++#define BIT20 0x00100000 ++#define BIT21 0x00200000 ++#define BIT22 0x00400000 ++#define BIT23 0x00800000 ++#define BIT24 0x01000000 ++#define BIT25 0x02000000 ++#define BIT26 0x04000000 ++#define BIT27 0x08000000 ++#define BIT28 0x10000000 ++#define BIT29 0x20000000 ++#define BIT30 0x40000000 ++#define BIT31 0x80000000 ++ ++#endif +Index: linux-2.6.28/arch/arm/mach-s3c2440/camera/camif.c +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-2.6.28/arch/arm/mach-s3c2440/camera/camif.c 2009-01-02 00:01:56.000000000 +0100 +@@ -0,0 +1,1047 @@ ++/* ++ * Copyright (C) 2004 Samsung Electronics ++ * SW.LEE ++ * ++ * This file is subject to the terms and conditions of the GNU General Public ++ * License 2. See the file COPYING in the main directory of this archive ++ * for more details. ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#ifdef CONFIG_ARCH_S3C24A0A ++#include ++#include ++#else ++#include ++#include ++#include ++#endif ++ ++#include "cam_reg.h" ++//#define SW_DEBUG ++#define CONFIG_VIDEO_V4L1_COMPAT ++#include ++#include "camif.h" ++#include "miscdevice.h" ++ ++static int camif_dma_burst(camif_cfg_t *); ++static int camif_scaler(camif_cfg_t *); ++ ++/* For SXGA Image */ ++#define RESERVE_MEM 15*1024*1024 ++#define YUV_MEM 10*1024*1024 ++#define RGB_MEM (RESERVE_MEM - YUV_MEM) ++ ++static int camif_malloc(camif_cfg_t *cfg) ++{ ++ unsigned int t_size; ++ unsigned int daon = cfg->target_x *cfg->target_y; ++ ++ if(cfg->dma_type & CAMIF_CODEC) { ++ if (cfg->fmt & CAMIF_OUT_YCBCR420) { ++ t_size = daon * 3 / 2 ; ++ } ++ else { t_size = daon * 2; /* CAMIF_OUT_YCBCR422 */ } ++ t_size = t_size *cfg->pp_num; ++ ++#ifndef SAMSUNG_SXGA_CAM ++ cfg->pp_virt_buf = dma_alloc_coherent(cfg->v->dev, ++ t_size, &cfg->pp_phys_buf, ++ GFP_KERNEL); ++#else ++ printk(KERN_INFO "Reserving High RAM Addresses \n"); ++ cfg->pp_phys_buf = PHYS_OFFSET + (MEM_SIZE - RESERVE_MEM); ++ cfg->pp_virt_buf = ioremap_nocache(cfg->pp_phys_buf, YUV_MEM); ++#endif ++ ++ if ( !cfg->pp_virt_buf ) { ++ printk(KERN_ERR"CAMERA:Failed to request YCBCR MEM\n"); ++ return -ENOMEM; ++ } ++ memset(cfg->pp_virt_buf, 0, t_size); ++ cfg->pp_totalsize = t_size; ++ return 0; ++ } ++ if ( cfg->dma_type & CAMIF_PREVIEW ) { ++ if (cfg->fmt & CAMIF_RGB16) ++ t_size = daon * 2; /* 4byte per two pixel*/ ++ else { ++ assert(cfg->fmt & CAMIF_RGB24); ++ t_size = daon * 4; /* 4byte per one pixel */ ++ } ++ t_size = t_size * cfg->pp_num; ++#ifndef SAMSUNG_SXGA_CAM ++ cfg->pp_virt_buf = dma_alloc_coherent(cfg->v->dev, ++ t_size, &cfg->pp_phys_buf, ++ GFP_KERNEL); ++#else ++ printk(KERN_INFO "Reserving High RAM Addresses \n"); ++ cfg->pp_phys_buf = PHYS_OFFSET + (MEM_SIZE - RESERVE_MEM ) + YUV_MEM; ++ cfg->pp_virt_buf = ioremap_nocache(cfg->pp_phys_buf,RGB_MEM); ++#endif ++ if ( !cfg->pp_virt_buf ) { ++ printk(KERN_ERR"CAMERA:Failed to request RGB MEM\n"); ++ return -ENOMEM; ++ } ++ memset(cfg->pp_virt_buf, 0, t_size); ++ cfg->pp_totalsize = t_size; ++ return 0; ++ } ++ ++ return 0; /* Never come. */ ++} ++ ++static int camif_demalloc(camif_cfg_t *cfg) ++{ ++#ifndef SAMSUNG_SXGA_CAM ++ if ( cfg->pp_virt_buf ) { ++ dma_free_coherent(cfg->v->dev, cfg->pp_totalsize, ++ cfg->pp_virt_buf, cfg->pp_phys_buf); ++ cfg->pp_virt_buf = 0; ++ } ++#else ++ iounmap(cfg->pp_virt_buf); ++ cfg->pp_virt_buf = 0; ++#endif ++ return 0; ++} ++ ++/* ++ * advise a person to use this func in ISR ++ * index value indicates the next frame count to be used ++ */ ++int camif_g_frame_num(camif_cfg_t *cfg) ++{ ++ int index = 0; ++ ++ if (cfg->dma_type & CAMIF_CODEC ) { ++ index = FRAME_CNT(readl(camregs + S3C2440_CAM_REG_CICOSTATUS)); ++ DPRINTK("CAMIF_CODEC frame %d \n", index); ++ } ++ else { ++ assert(cfg->dma_type & CAMIF_PREVIEW ); ++ index = FRAME_CNT(readl(camregs + S3C2440_CAM_REG_CIPRSTATUS)); ++ DPRINTK("CAMIF_PREVIEW frame %d 0x%08X \n", index, ++ readl(camregs + S3C2440_CAM_REG_CIPRSTATUS)); ++ } ++ cfg->now_frame_num = (index + 2) % 4; /* When 4 PingPong */ ++ return index; /* meaningless */ ++} ++ ++static int camif_pp_codec(camif_cfg_t *cfg) ++{ ++ u32 i, c_size; /* Cb,Cr size */ ++ u32 one_p_size; ++ u32 daon = cfg->target_x * cfg->target_y; ++ if (cfg->fmt & CAMIF_OUT_YCBCR420) ++ c_size = daon / 4; ++ else { ++ assert(cfg->fmt & CAMIF_OUT_YCBCR422); ++ c_size = daon / 2; ++ } ++ switch ( cfg->pp_num ) { ++ case 1 : ++ for (i =0 ; i < 4; i++) { ++ cfg->img_buf[i].virt_y = cfg->pp_virt_buf; ++ cfg->img_buf[i].phys_y = cfg->pp_phys_buf; ++ cfg->img_buf[i].virt_cb = cfg->pp_virt_buf + daon; ++ cfg->img_buf[i].phys_cb = cfg->pp_phys_buf + daon; ++ cfg->img_buf[i].virt_cr = cfg->pp_virt_buf + daon + c_size; ++ cfg->img_buf[i].phys_cr = cfg->pp_phys_buf + daon + c_size; ++ writel(cfg->img_buf[i].phys_y, camregs + S3C2440_CAM_REG_CICOYSA(i)); ++ writel(cfg->img_buf[i].phys_cb, camregs + S3C2440_CAM_REG_CICOCBSA(i)); ++ writel(cfg->img_buf[i].phys_cr, camregs + S3C2440_CAM_REG_CICOCRSA(i)); ++ } ++ break; ++ case 2: ++#define TRY (( i%2 ) ? 1 :0) ++ one_p_size = daon + 2*c_size; ++ for (i = 0; i < 4 ; i++) { ++ cfg->img_buf[i].virt_y = cfg->pp_virt_buf + TRY * one_p_size; ++ cfg->img_buf[i].phys_y = cfg->pp_phys_buf + TRY * one_p_size; ++ cfg->img_buf[i].virt_cb = cfg->pp_virt_buf + daon + TRY * one_p_size; ++ cfg->img_buf[i].phys_cb = cfg->pp_phys_buf + daon + TRY * one_p_size; ++ cfg->img_buf[i].virt_cr = cfg->pp_virt_buf + daon + c_size + TRY * one_p_size; ++ cfg->img_buf[i].phys_cr = cfg->pp_phys_buf + daon + c_size + TRY * one_p_size; ++ writel(cfg->img_buf[i].phys_y, camregs + S3C2440_CAM_REG_CICOYSA(i)); ++ writel(cfg->img_buf[i].phys_cb, camregs + S3C2440_CAM_REG_CICOCBSA(i)); ++ writel(cfg->img_buf[i].phys_cr, camregs + S3C2440_CAM_REG_CICOCRSA(i)); ++ } ++ break; ++ case 4: ++ one_p_size = daon + 2*c_size; ++ for (i = 0; i < 4 ; i++) { ++ cfg->img_buf[i].virt_y = cfg->pp_virt_buf + i * one_p_size; ++ cfg->img_buf[i].phys_y = cfg->pp_phys_buf + i * one_p_size; ++ cfg->img_buf[i].virt_cb = cfg->pp_virt_buf + daon + i * one_p_size; ++ cfg->img_buf[i].phys_cb = cfg->pp_phys_buf + daon + i * one_p_size; ++ cfg->img_buf[i].virt_cr = cfg->pp_virt_buf + daon + c_size + i * one_p_size; ++ cfg->img_buf[i].phys_cr = cfg->pp_phys_buf + daon + c_size + i * one_p_size; ++ writel(cfg->img_buf[i].phys_y, camregs + S3C2440_CAM_REG_CICOYSA(i)); ++ writel(cfg->img_buf[i].phys_cb, camregs + S3C2440_CAM_REG_CICOCBSA(i)); ++ writel(cfg->img_buf[i].phys_cr, camregs + S3C2440_CAM_REG_CICOCRSA(i)); ++ } ++ break; ++ default: ++ printk("Invalid PingPong Number %d \n",cfg->pp_num); ++ panic("halt\n"); ++} ++ return 0; ++} ++ ++/* RGB Buffer Allocation */ ++static int camif_pp_preview(camif_cfg_t *cfg) ++{ ++ int i; ++ u32 daon = cfg->target_x * cfg->target_y; ++ ++ if(cfg->fmt & CAMIF_RGB24) ++ daon = daon * 4 ; ++ else { ++ assert (cfg->fmt & CAMIF_RGB16); ++ daon = daon *2; ++ } ++ switch ( cfg->pp_num ) { ++ case 1: ++ for ( i = 0; i < 4 ; i++ ) { ++ cfg->img_buf[i].virt_rgb = cfg->pp_virt_buf ; ++ cfg->img_buf[i].phys_rgb = cfg->pp_phys_buf ; ++ writel(cfg->img_buf[i].phys_rgb, camregs + S3C2440_CAM_REG_CICOCRSA(i)); ++ } ++ break; ++ case 2: ++ for ( i = 0; i < 4 ; i++) { ++ cfg->img_buf[i].virt_rgb = cfg->pp_virt_buf + TRY * daon; ++ cfg->img_buf[i].phys_rgb = cfg->pp_phys_buf + TRY * daon; ++ writel(cfg->img_buf[i].phys_rgb, camregs + S3C2440_CAM_REG_CICOCRSA(i)); ++ } ++ break; ++ case 4: ++ for ( i = 0; i < 4 ; i++) { ++ cfg->img_buf[i].virt_rgb = cfg->pp_virt_buf + i * daon; ++ cfg->img_buf[i].phys_rgb = cfg->pp_phys_buf + i * daon; ++ writel(cfg->img_buf[i].phys_rgb, camregs + S3C2440_CAM_REG_CICOCRSA(i)); ++ } ++ break; ++ default: ++ printk("Invalid PingPong Number %d \n",cfg->pp_num); ++ panic("halt\n"); ++ } ++ return 0; ++} ++ ++static int camif_pingpong(camif_cfg_t *cfg) ++{ ++ if (cfg->dma_type & CAMIF_CODEC ) { ++ camif_pp_codec(cfg); ++ } ++ ++ if ( cfg->dma_type & CAMIF_PREVIEW) { ++ camif_pp_preview(cfg); ++ } ++ return 0; ++} ++ ++ ++/*********** Image Convert *******************************/ ++/* Return Format ++ * Supported by Hardware ++ * V4L2_PIX_FMT_YUV420, ++ * V4L2_PIX_FMT_YUV422P, ++ * V4L2_PIX_FMT_BGR32 (BGR4) ++ * ----------------------------------- ++ * V4L2_PIX_FMT_RGB565(X) ++ * Currenly 2byte --> BGR656 Format ++ * S3C2440A,S3C24A0 supports vairants with reversed FMT_RGB565 ++ i.e blue toward the least, red towards the most significant bit ++ -- by SW.LEE ++ */ ++ ++ ++/* ++ * After calling camif_g_frame_num, ++ * this func must be called ++ */ ++u8 * camif_g_frame(camif_cfg_t *cfg) ++{ ++ u8 * ret = NULL; ++ int cnt = cfg->now_frame_num; ++ ++ if(cfg->dma_type & CAMIF_PREVIEW) { ++ ret = cfg->img_buf[cnt].virt_rgb; ++ } ++ if (cfg->dma_type & CAMIF_CODEC) { ++ ret = cfg->img_buf[cnt].virt_y; ++ } ++ return ret; ++} ++ ++/* This function must be called in module initial time */ ++static int camif_source_fmt(camif_gc_t *gc) ++{ ++ u32 cmd = 0; ++ ++ /* Configure CISRCFMT --Source Format */ ++ if (gc->itu_fmt & CAMIF_ITU601) { ++ cmd = CAMIF_ITU601; ++ } ++ else { ++ assert ( gc->itu_fmt & CAMIF_ITU656); ++ cmd = CAMIF_ITU656; ++ } ++ cmd |= SOURCE_HSIZE(gc->source_x)| SOURCE_VSIZE(gc->source_y); ++ /* Order422 */ ++ cmd |= gc->order422; ++ writel(cmd, camregs + S3C2440_CAM_REG_CISRCFMT); ++ ++ return 0 ; ++} ++ ++ ++/* ++ * Codec Input YCBCR422 will be Fixed ++ */ ++static int camif_target_fmt(camif_cfg_t *cfg) ++{ ++ u32 cmd = 0; ++ ++ if (cfg->dma_type & CAMIF_CODEC) { ++ /* YCBCR setting */ ++ cmd = TARGET_HSIZE(cfg->target_x)| TARGET_VSIZE(cfg->target_y); ++ if ( cfg->fmt & CAMIF_OUT_YCBCR420 ) { ++ cmd |= OUT_YCBCR420|IN_YCBCR422; ++ } ++ else { ++ assert(cfg->fmt & CAMIF_OUT_YCBCR422); ++ cmd |= OUT_YCBCR422|IN_YCBCR422; ++ } ++ writel(cmd | cfg->flip, camregs + S3C2440_CAM_REG_CICOTRGFMT); ++ ++ } else { ++ assert(cfg->dma_type & CAMIF_PREVIEW); ++ writel(TARGET_HSIZE(cfg->target_x)|TARGET_VSIZE(cfg->target_y)|cfg->flip, ++ camregs + S3C2440_CAM_REG_CIPRTRGFMT); ++ } ++ return 0; ++} ++ ++void camif_change_flip(camif_cfg_t *cfg) ++{ ++ u32 cmd = readl(camregs + S3C2440_CAM_REG_CICOTRGFMT); ++ ++ cmd &= ~(BIT14|BIT15); ++ cmd |= cfg->flip; ++ ++ writel(cmd, camregs + S3C2440_CAM_REG_CICOTRGFMT); ++} ++ ++ ++ ++/* Must: ++ * Before calling this function, ++ * you must use "camif_dynamic_open" ++ * If you want to enable both CODEC and preview ++ * you must do it at the same time. ++ */ ++int camif_capture_start(camif_cfg_t *cfg) ++{ ++ u32 n_cmd = 0; /* Next Command */ ++ ++ switch(cfg->exec) { ++ case CAMIF_BOTH_DMA_ON: ++ camif_reset(CAMIF_RESET, 0); /* Flush Camera Core Buffer */ ++ writel(readl(camregs + S3C2440_CAM_REG_CIPRSCCTRL) | ++ SCALERSTART, camregs + S3C2440_CAM_REG_CIPRSCCTRL); ++ writel(readl(camregs + S3C2440_CAM_REG_CICOSCCTRL) | ++ SCALERSTART, camregs + S3C2440_CAM_REG_CICOSCCTRL); ++ n_cmd = CAMIF_CAP_PREVIEW_ON | CAMIF_CAP_CODEC_ON; ++ break; ++ case CAMIF_DMA_ON: ++ camif_reset(CAMIF_RESET, 0); /* Flush Camera Core Buffer */ ++ if (cfg->dma_type&CAMIF_CODEC) { ++ writel(readl(camregs + S3C2440_CAM_REG_CICOSCCTRL) | ++ SCALERSTART, camregs + S3C2440_CAM_REG_CICOSCCTRL); ++ n_cmd = CAMIF_CAP_CODEC_ON; ++ } else { ++ writel(readl(camregs + S3C2440_CAM_REG_CIPRSCCTRL) | ++ SCALERSTART, camregs + S3C2440_CAM_REG_CIPRSCCTRL); ++ n_cmd = CAMIF_CAP_PREVIEW_ON; ++ } ++ ++ /* wait until Sync Time expires */ ++ /* First settting, to wait VSYNC fall */ ++ /* By VESA spec,in 640x480 @60Hz ++ MAX Delay Time is around 64us which "while" has.*/ ++ while(VSYNC & readl(camregs + S3C2440_CAM_REG_CICOSTATUS)); ++ break; ++ default: ++ break; ++} ++ writel(n_cmd | CAMIF_CAP_ON, camregs + S3C2440_CAM_REG_CIIMGCPT); ++ return 0; ++} ++ ++ ++int camif_capture_stop(camif_cfg_t *cfg) ++{ ++ u32 n_cmd = readl(camregs + S3C2440_CAM_REG_CIIMGCPT); /* Next Command */ ++ ++ switch(cfg->exec) { ++ case CAMIF_BOTH_DMA_OFF: ++ writel(readl(camregs + S3C2440_CAM_REG_CIPRSCCTRL) & ++ ~SCALERSTART, camregs + S3C2440_CAM_REG_CIPRSCCTRL); ++ writel(readl(camregs + S3C2440_CAM_REG_CICOSCCTRL) & ++ ~SCALERSTART, camregs + S3C2440_CAM_REG_CICOSCCTRL); ++ n_cmd = 0; ++ break; ++ case CAMIF_DMA_OFF_L_IRQ: /* fall thru */ ++ case CAMIF_DMA_OFF: ++ if (cfg->dma_type&CAMIF_CODEC) { ++ writel(readl(camregs + S3C2440_CAM_REG_CICOSCCTRL) & ++ ~SCALERSTART, camregs + S3C2440_CAM_REG_CICOSCCTRL); ++ n_cmd &= ~CAMIF_CAP_CODEC_ON; ++ if (!(n_cmd & CAMIF_CAP_PREVIEW_ON)) ++ n_cmd = 0; ++ } else { ++ writel(readl(camregs + S3C2440_CAM_REG_CIPRSCCTRL) & ++ ~SCALERSTART, camregs + S3C2440_CAM_REG_CIPRSCCTRL); ++ n_cmd &= ~CAMIF_CAP_PREVIEW_ON; ++ if (!(n_cmd & CAMIF_CAP_CODEC_ON)) ++ n_cmd = 0; ++ } ++ break; ++ default: ++ panic("Unexpected \n"); ++ } ++ writel(n_cmd, camregs + S3C2440_CAM_REG_CIIMGCPT); ++ ++ if (cfg->exec == CAMIF_DMA_OFF_L_IRQ) { /* Last IRQ */ ++ if (cfg->dma_type & CAMIF_CODEC) ++ writel(readl(camregs + S3C2440_CAM_REG_CICOCTRL) | ++ LAST_IRQ_EN, camregs + S3C2440_CAM_REG_CICOCTRL); ++ else ++ writel(readl(camregs + S3C2440_CAM_REG_CIPRCTRL) | ++ LAST_IRQ_EN, camregs + S3C2440_CAM_REG_CIPRCTRL); ++ } ++#if 0 ++ else { /* to make internal state machine of CAMERA stop */ ++ camif_reset(CAMIF_RESET, 0); ++ } ++#endif ++ return 0; ++} ++ ++ ++/* LastIRQEn is autoclear */ ++void camif_last_irq_en(camif_cfg_t *cfg) ++{ ++ if ((cfg->exec == CAMIF_BOTH_DMA_ON) || (cfg->dma_type & CAMIF_CODEC)) ++ writel(readl(camregs + S3C2440_CAM_REG_CICOCTRL) | ++ LAST_IRQ_EN, camregs + S3C2440_CAM_REG_CICOCTRL); ++ ++ if ((cfg->exec == CAMIF_BOTH_DMA_ON) || !(cfg->dma_type & CAMIF_CODEC)) ++ writel(readl(camregs + S3C2440_CAM_REG_CIPRCTRL) | ++ LAST_IRQ_EN, camregs + S3C2440_CAM_REG_CIPRCTRL); ++} ++ ++static int ++camif_scaler_internal(u32 srcWidth, u32 dstWidth, u32 *ratio, u32 *shift) ++{ ++ if(srcWidth>=64*dstWidth){ ++ printk(KERN_ERR"CAMERA:out of prescaler range: srcWidth /dstWidth = %d(< 64)\n", ++ srcWidth/dstWidth); ++ return 1; ++ } ++ else if(srcWidth>=32*dstWidth){ ++ *ratio=32; ++ *shift=5; ++ } ++ else if(srcWidth>=16*dstWidth){ ++ *ratio=16; ++ *shift=4; ++ } ++ else if(srcWidth>=8*dstWidth){ ++ *ratio=8; ++ *shift=3; ++ } ++ else if(srcWidth>=4*dstWidth){ ++ *ratio=4; ++ *shift=2; ++ } ++ else if(srcWidth>=2*dstWidth){ ++ *ratio=2; ++ *shift=1; ++ } ++ else { ++ *ratio=1; ++ *shift=0; ++ } ++ return 0; ++} ++ ++ ++int camif_g_fifo_status(camif_cfg_t *cfg) ++{ ++ u32 reg; ++ ++ if (cfg->dma_type & CAMIF_CODEC) { ++ u32 flag = CO_OVERFLOW_Y | CO_OVERFLOW_CB | CO_OVERFLOW_CR; ++ reg = readl(camregs + S3C2440_CAM_REG_CICOSTATUS); ++ if (reg & flag) { ++ printk("CODEC: FIFO error(0x%08x) and corrected\n",reg); ++ /* FIFO Error Count ++ */ ++ writel(readl(camregs + S3C2440_CAM_REG_CIWDOFST) | ++ CO_FIFO_Y | CO_FIFO_CB | CO_FIFO_CR, ++ camregs + S3C2440_CAM_REG_CIWDOFST); ++ ++ writel(readl(camregs + S3C2440_CAM_REG_CIWDOFST) & ++ ~(CO_FIFO_Y | CO_FIFO_CB | CO_FIFO_CR), ++ camregs + S3C2440_CAM_REG_CIWDOFST); ++ return 1; /* Error */ ++ } ++ } ++ if (cfg->dma_type & CAMIF_PREVIEW) { ++ u32 flag = PR_OVERFLOW_CB | PR_OVERFLOW_CR; ++ reg = readl(camregs + S3C2440_CAM_REG_CIPRSTATUS); ++ if (reg & flag) { ++ printk("PREVIEW:FIFO error(0x%08x) and corrected\n",reg); ++ writel(readl(camregs + S3C2440_CAM_REG_CIWDOFST) | ++ CO_FIFO_CB | CO_FIFO_CR, ++ camregs + S3C2440_CAM_REG_CIWDOFST); ++ ++ writel(readl(camregs + S3C2440_CAM_REG_CIWDOFST) & ++ ~(CO_FIFO_Y | CO_FIFO_CB | CO_FIFO_CR), ++ camregs + S3C2440_CAM_REG_CIWDOFST); ++ /* FIFO Error Count ++ */ ++ return 1; /* Error */ ++ } ++ } ++ return 0; /* No Error */ ++} ++ ++ ++/* Policy: ++ * if codec or preview define the win offset, ++ * other must follow that value. ++ */ ++int camif_win_offset(camif_gc_t *gc ) ++{ ++ u32 h = gc->win_hor_ofst; ++ u32 v = gc->win_ver_ofst; ++ ++ /*Clear Overflow */ ++ writel(CO_FIFO_Y | CO_FIFO_CB | CO_FIFO_CR | PR_FIFO_CB | PR_FIFO_CB, ++ camregs + S3C2440_CAM_REG_CIWDOFST); ++ writel(0, camregs + S3C2440_CAM_REG_CIWDOFST); ++ ++ if (!h && !v) { ++ writel(0, camregs + S3C2440_CAM_REG_CIWDOFST); ++ return 0; ++ } ++ ++ writel(WINOFEN | WINHOROFST(h) | WINVEROFST(v), camregs + S3C2440_CAM_REG_CIWDOFST); ++ return 0; ++} ++ ++/* ++ * when you change the resolution in a specific camera, ++ * sometimes, it is necessary to change the polarity ++ * -- SW.LEE ++ */ ++static void camif_polarity(camif_gc_t *gc) ++{ ++ u32 cmd = readl(camregs + S3C2440_CAM_REG_CIGCTRL);; ++ ++ cmd = cmd & ~(BIT26|BIT25|BIT24); /* clear polarity */ ++ if (gc->polarity_pclk) ++ cmd |= GC_INVPOLPCLK; ++ if (gc->polarity_vsync) ++ cmd |= GC_INVPOLVSYNC; ++ if (gc->polarity_href) ++ cmd |= GC_INVPOLHREF; ++ writel(readl(camregs + S3C2440_CAM_REG_CIGCTRL) | ++ cmd, camregs + S3C2440_CAM_REG_CIGCTRL); ++} ++ ++ ++int camif_dynamic_open(camif_cfg_t *cfg) ++{ ++ camif_win_offset(cfg->gc); ++ camif_polarity(cfg->gc); ++ ++ if(camif_scaler(cfg)) { ++ printk(KERN_ERR "CAMERA:Preview Scaler, Change WinHorOfset or Target Size\n"); ++ return 1; ++ } ++ camif_target_fmt(cfg); ++ if (camif_dma_burst(cfg)) { ++ printk(KERN_ERR "CAMERA:DMA Busrt Length Error \n"); ++ return 1; ++ } ++ if(camif_malloc(cfg) ) { ++ printk(KERN_ERR " Instead of using consistent_alloc()\n" ++ " lease use dedicated memory allocation for DMA memory\n"); ++ return -1; ++ } ++ camif_pingpong(cfg); ++ return 0; ++} ++ ++int camif_dynamic_close(camif_cfg_t *cfg) ++{ ++ camif_demalloc(cfg); ++ return 0; ++} ++ ++static int camif_target_area(camif_cfg_t *cfg) ++{ ++ u32 rect = cfg->target_x * cfg->target_y; ++ ++ if (cfg->dma_type & CAMIF_CODEC) ++ writel(rect, camregs + S3C2440_CAM_REG_CICOTAREA); ++ ++ if (cfg->dma_type & CAMIF_PREVIEW) ++ writel(rect, camregs + S3C2440_CAM_REG_CIPRTAREA); ++ ++ return 0; ++} ++ ++static int inline camif_hw_reg(camif_cfg_t *cfg) ++{ ++ u32 cmd = 0; ++ ++ if (cfg->dma_type & CAMIF_CODEC) { ++ writel(PRE_SHIFT(cfg->sc.shfactor) | ++ PRE_HRATIO(cfg->sc.prehratio) | ++ PRE_VRATIO(cfg->sc.prevratio), ++ camregs + S3C2440_CAM_REG_CICOSCPRERATIO); ++ writel(PRE_DST_WIDTH(cfg->sc.predst_x) | ++ PRE_DST_HEIGHT(cfg->sc.predst_y), ++ camregs + S3C2440_CAM_REG_CICOSCPREDST); ++ ++ /* Differ from Preview */ ++ if (cfg->sc.scalerbypass) ++ cmd |= SCALERBYPASS; ++ if (cfg->sc.scaleup_h & cfg->sc.scaleup_v) ++ cmd |= BIT30|BIT29; ++ writel(cmd | MAIN_HRATIO(cfg->sc.mainhratio) | ++ MAIN_VRATIO(cfg->sc.mainvratio), ++ camregs + S3C2440_CAM_REG_CICOSCCTRL); ++ return 0; ++ } ++ if (cfg->dma_type & CAMIF_PREVIEW) { ++ writel(PRE_SHIFT(cfg->sc.shfactor) | ++ PRE_HRATIO(cfg->sc.prehratio) | ++ PRE_VRATIO(cfg->sc.prevratio), ++ camregs + S3C2440_CAM_REG_CIPRSCPRERATIO); ++ writel(PRE_DST_WIDTH(cfg->sc.predst_x) | ++ PRE_DST_HEIGHT(cfg->sc.predst_y), ++ camregs + S3C2440_CAM_REG_CIPRSCPREDST); ++ /* Differ from Codec */ ++ if (cfg->fmt & CAMIF_RGB24) ++ cmd |= RGB_FMT24; ++ if (cfg->sc.scaleup_h & cfg->sc.scaleup_v) ++ cmd |= BIT29 | BIT28; ++ writel(cmd | MAIN_HRATIO(cfg->sc.mainhratio) | S_METHOD | ++ MAIN_VRATIO(cfg->sc.mainvratio), ++ camregs + S3C2440_CAM_REG_CIPRSCCTRL); ++ return 0; ++ } ++ ++ panic("CAMERA:DMA_TYPE Wrong \n"); ++ return 0; ++} ++ ++ ++/* Configure Pre-scaler control & main scaler control register */ ++static int camif_scaler(camif_cfg_t *cfg) ++{ ++ int tx = cfg->target_x, ty = cfg->target_y; ++ int sx, sy; ++ ++ if (tx <= 0 || ty <= 0) ++ panic("CAMERA: Invalid target size \n"); ++ ++ sx = cfg->gc->source_x - 2 * cfg->gc->win_hor_ofst; ++ sy = cfg->gc->source_y - 2 * cfg->gc->win_ver_ofst; ++ if (sx <= 0 || sy <= 0) ++ panic("CAMERA: Invalid source size \n"); ++ ++ cfg->sc.modified_src_x = sx; ++ cfg->sc.modified_src_y = sy; ++ ++ /* Pre-scaler control register 1 */ ++ camif_scaler_internal(sx, tx, &cfg->sc.prehratio, &cfg->sc.hfactor); ++ camif_scaler_internal(sy, ty, &cfg->sc.prevratio, &cfg->sc.vfactor); ++ ++ if (cfg->dma_type & CAMIF_PREVIEW) ++ if ((sx / cfg->sc.prehratio) > 640) { ++ printk(KERN_INFO "CAMERA: Internal Preview line " ++ "buffer is 640 pixels\n"); ++ return 1; /* Error */ ++ } ++ ++ cfg->sc.shfactor = 10 - (cfg->sc.hfactor + cfg->sc.vfactor); ++ /* Pre-scaler control register 2 */ ++ cfg->sc.predst_x = sx / cfg->sc.prehratio; ++ cfg->sc.predst_y = sy / cfg->sc.prevratio; ++ ++ /* Main-scaler control register */ ++ cfg->sc.mainhratio = (sx << 8) / (tx << cfg->sc.hfactor); ++ cfg->sc.mainvratio = (sy << 8) / (ty << cfg->sc.vfactor); ++ DPRINTK(" sx %d, sy %d tx %d ty %d \n", sx, sy, tx, ty); ++ DPRINTK(" hfactor %d vfactor %d \n",cfg->sc.hfactor, cfg->sc.vfactor); ++ ++ cfg->sc.scaleup_h = (sx <= tx) ? 1: 0; ++ cfg->sc.scaleup_v = (sy <= ty) ? 1: 0; ++ if (cfg->sc.scaleup_h != cfg->sc.scaleup_v) ++ printk(KERN_ERR "scaleup_h must be same to scaleup_v \n"); ++ ++ camif_hw_reg(cfg); ++ camif_target_area(cfg); ++ ++ return 0; ++} ++ ++/****************************************************** ++ CalculateBurstSize - Calculate the busrt lengths ++ Description: ++ - dstHSize: the number of the byte of H Size. ++********************************************************/ ++static void camif_g_bsize(u32 hsize, u32 *mburst, u32 *rburst) ++{ ++ u32 tmp; ++ ++ tmp = (hsize / 4) % 16; ++ switch(tmp) { ++ case 0: ++ *mburst=16; ++ *rburst=16; ++ break; ++ case 4: ++ *mburst=16; ++ *rburst=4; ++ break; ++ case 8: ++ *mburst=16; ++ *rburst=8; ++ break; ++ default: ++ tmp=(hsize / 4) % 8; ++ switch(tmp) { ++ case 0: ++ *mburst = 8; ++ *rburst = 8; ++ break; ++ case 4: ++ *mburst = 8; ++ *rburst = 4; ++ default: ++ *mburst = 4; ++ tmp = (hsize / 4) % 4; ++ *rburst= (tmp) ? tmp: 4; ++ break; ++ } ++ break; ++ } ++} ++ ++/* SXGA 1028x1024*/ ++/* XGA 1024x768 */ ++/* SVGA 800x600 */ ++/* VGA 640x480 */ ++/* CIF 352x288 */ ++/* QVGA 320x240 */ ++/* QCIF 176x144 */ ++/* ret val ++ 1 : DMA Size Error ++*/ ++#define BURST_ERR 1 ++static int camif_dma_burst(camif_cfg_t *cfg) ++{ ++ int width = cfg->target_x; ++ ++ if (cfg->dma_type & CAMIF_CODEC ) { ++ u32 yburst_m, yburst_r; ++ u32 cburst_m, cburst_r; ++ /* CODEC DMA WIDHT is multiple of 16 */ ++ if (width % 16) ++ return BURST_ERR; /* DMA Burst Length Error */ ++ camif_g_bsize(width, &yburst_m, &yburst_r); ++ camif_g_bsize(width / 2, &cburst_m, &cburst_r); ++ ++ writel(YBURST_M(yburst_m) | CBURST_M(cburst_m) | ++ YBURST_R(yburst_r) | CBURST_R(cburst_r), ++ camregs + S3C2440_CAM_REG_CICOCTRL); ++ } ++ ++ if (cfg->dma_type & CAMIF_PREVIEW) { ++ u32 rgburst_m, rgburst_r; ++ if(cfg->fmt == CAMIF_RGB24) { ++ if (width % 2) ++ return BURST_ERR; /* DMA Burst Length Error */ ++ camif_g_bsize(width*4,&rgburst_m,&rgburst_r); ++ } else { /* CAMIF_RGB16 */ ++ if ((width / 2) %2) ++ return BURST_ERR; /* DMA Burst Length Error */ ++ camif_g_bsize(width*2,&rgburst_m,&rgburst_r); ++ } ++ ++ writel(RGBURST_M(rgburst_m) | RGBURST_R(rgburst_r), ++ camregs + S3C2440_CAM_REG_CIPRCTRL); ++ } ++ return 0; ++} ++ ++static int camif_gpio_init(void) ++{ ++#ifdef CONFIG_ARCH_S3C24A0A ++ /* S3C24A0A has the dedicated signal pins for Camera */ ++#else ++ s3c2410_gpio_cfgpin(S3C2440_GPJ0, S3C2440_GPJ0_CAMDATA0); ++ s3c2410_gpio_cfgpin(S3C2440_GPJ1, S3C2440_GPJ1_CAMDATA1); ++ s3c2410_gpio_cfgpin(S3C2440_GPJ2, S3C2440_GPJ2_CAMDATA2); ++ s3c2410_gpio_cfgpin(S3C2440_GPJ3, S3C2440_GPJ3_CAMDATA3); ++ s3c2410_gpio_cfgpin(S3C2440_GPJ4, S3C2440_GPJ4_CAMDATA4); ++ s3c2410_gpio_cfgpin(S3C2440_GPJ5, S3C2440_GPJ5_CAMDATA5); ++ s3c2410_gpio_cfgpin(S3C2440_GPJ6, S3C2440_GPJ6_CAMDATA6); ++ s3c2410_gpio_cfgpin(S3C2440_GPJ7, S3C2440_GPJ7_CAMDATA7); ++ ++ s3c2410_gpio_cfgpin(S3C2440_GPJ8, S3C2440_GPJ8_CAMPCLK); ++ s3c2410_gpio_cfgpin(S3C2440_GPJ9, S3C2440_GPJ9_CAMVSYNC); ++ s3c2410_gpio_cfgpin(S3C2440_GPJ10, S3C2440_GPJ10_CAMHREF); ++ s3c2410_gpio_cfgpin(S3C2440_GPJ11, S3C2440_GPJ11_CAMCLKOUT); ++ s3c2410_gpio_cfgpin(S3C2440_GPJ12, S3C2440_GPJ12_CAMRESET); ++#endif ++ return 0; ++} ++ ++ ++#define ROUND_ADD 0x100000 ++ ++#ifdef CONFIG_ARCH_S3C24A0A ++int camif_clock_init(camif_gc_t *gc) ++{ ++ unsigned int upll, camclk_div, camclk; ++ ++ if (!gc) camclk = 24000000; ++ else { ++ camclk = gc->camclk; ++ if (camclk > 48000000) ++ printk(KERN_ERR "Wrong Camera Clock\n"); ++ } ++ ++ CLKCON |= CLKCON_CAM_UPLL | CLKCON_CAM_HCLK; ++ upll = get_bus_clk(GET_UPLL); ++ printk(KERN_INFO "CAMERA:Default UPLL %08d and Assing 96Mhz to UPLL\n",upll); ++ UPLLCON = FInsrt(56, fPLL_MDIV) | FInsrt(2, fPLL_PDIV)| FInsrt(1, fPLL_SDIV); ++ upll = get_bus_clk(GET_UPLL); ++ ++ camclk_div = (upll+ROUND_ADD) / camclk - 1; ++ CLKDIVN = (CLKDIVN & 0xFF) | CLKDIVN_CAM(camclk_div); ++ printk(KERN_INFO"CAMERA:upll %d MACRO 0x%08X CLKDIVN 0x%08X \n", ++ upll, CLKDIVN_CAM(camclk_div), CLKDIVN); ++ writel(0, camregs + S3C2440_CAM_REG_CIIMGCPT); /* Dummy ? */ ++ ++ return 0; ++} ++#else ++int camif_clock_init(camif_gc_t *gc) ++{ ++ unsigned int camclk; ++ struct clk *clk_camif = clk_get(NULL, "camif"); ++ struct clk *clk_camif_upll = clk_get(NULL, "camif-upll"); ++ ++ if (!gc) ++ camclk = 24000000; ++ else { ++ camclk = gc->camclk; ++ if (camclk > 48000000) ++ printk(KERN_ERR "Wrong Camera Clock\n"); ++ } ++ ++ clk_set_rate(clk_camif, camclk); ++ ++ clk_enable(clk_camif); ++ clk_enable(clk_camif_upll); ++ ++ ++#if 0 ++ CLKCON |= CLKCON_CAMIF; ++ upll = elfin_get_bus_clk(GET_UPLL); ++ printk(KERN_INFO "CAMERA:Default UPLL %08d and Assing 96Mhz to UPLL\n",upll); ++ { ++ UPLLCON = FInsrt(60, fPLL_MDIV) | FInsrt(4, fPLL_PDIV)| FInsrt(1, fPLL_SDIV); ++ CLKDIVN |= DIVN_UPLL; /* For USB */ ++ upll = elfin_get_bus_clk(GET_UPLL); ++ } ++ ++ camclk_div = (upll+ROUND_ADD) /(camclk * 2) -1; ++ CAMDIVN = CAMCLK_SET_DIV|(camclk_div&0xf); ++ printk(KERN_INFO "CAMERA:upll %08d cam_clk %08d CAMDIVN 0x%08x \n",upll,camclk, CAMDIVN); ++#endif ++ writel(0, camregs + S3C2440_CAM_REG_CIIMGCPT); /* Dummy ? */ ++ ++ return 0; ++} ++#endif ++ ++/* ++ Reset Camera IP in CPU ++ Reset External Sensor ++ */ ++void camif_reset(int is, int delay) ++{ ++ switch (is) { ++ case CAMIF_RESET: ++ writel(readl(camregs + S3C2440_CAM_REG_CIGCTRL) | ++ GC_SWRST, ++ camregs + S3C2440_CAM_REG_CIGCTRL); ++ mdelay(1); ++ writel(readl(camregs + S3C2440_CAM_REG_CIGCTRL) & ++ ~GC_SWRST, ++ camregs + S3C2440_CAM_REG_CIGCTRL); ++ break; ++ case CAMIF_EX_RESET_AH: /*Active High */ ++ writel(readl(camregs + S3C2440_CAM_REG_CIGCTRL) & ++ ~GC_CAMRST, ++ camregs + S3C2440_CAM_REG_CIGCTRL); ++ udelay(200); ++ writel(readl(camregs + S3C2440_CAM_REG_CIGCTRL) | ++ GC_CAMRST, ++ camregs + S3C2440_CAM_REG_CIGCTRL); ++ udelay(delay); ++ writel(readl(camregs + S3C2440_CAM_REG_CIGCTRL) & ++ ~GC_CAMRST, ++ camregs + S3C2440_CAM_REG_CIGCTRL); ++ break; ++ case CAMIF_EX_RESET_AL: /*Active Low */ ++ writel(readl(camregs + S3C2440_CAM_REG_CIGCTRL) | ++ GC_CAMRST, ++ camregs + S3C2440_CAM_REG_CIGCTRL); ++ udelay(200); ++ writel(readl(camregs + S3C2440_CAM_REG_CIGCTRL) & ++ ~GC_CAMRST, ++ camregs + S3C2440_CAM_REG_CIGCTRL); ++ udelay(delay); ++ writel(readl(camregs + S3C2440_CAM_REG_CIGCTRL) | ++ GC_CAMRST, ++ camregs + S3C2440_CAM_REG_CIGCTRL); ++ break; ++ default: ++ break; ++ } ++} ++ ++/* For Camera Operation, ++ * we can give the high priority to REQ2 of ARBITER1 ++ */ ++ ++/* Please move me into proper place ++ * camif_gc_t is not because "rmmod imgsenor" will delete the instance of camif_gc_t ++ */ ++static u32 old_priority; ++ ++static void camif_bus_priority(int flag) ++{ ++ if (flag) { ++#ifdef CONFIG_ARCH_S3C24A0A ++ old_priority = PRIORITY0; ++ PRIORITY0 = PRIORITY_I_FIX; ++ PRIORITY1 = PRIORITY_I_FIX; ++ ++#else ++ old_priority = readl(S3C2410_PRIORITY); ++ writel(readl(S3C2410_PRIORITY) & ~(3<<7), S3C2410_PRIORITY); ++ writel(readl(S3C2410_PRIORITY) | (1<<7), S3C2410_PRIORITY); /* Arbiter 1, REQ2 first */ ++ writel(readl(S3C2410_PRIORITY) & ~(1<<1), S3C2410_PRIORITY); /* Disable Priority Rotate */ ++#endif ++ } ++ else { ++#ifdef CONFIG_ARCH_S3C24A0A ++ PRIORITY0 = old_priority; ++ PRIORITY1 = old_priority; ++#else ++ writel(old_priority, S3C2410_PRIORITY); ++#endif ++ } ++} ++ ++static void inline camif_clock_off(void) ++{ ++#if defined (CONFIG_ARCH_S3C24A0A) ++ writel(0, camregs + S3C2440_CAM_REG_CIIMGCPT); ++ ++ CLKCON &= ~CLKCON_CAM_UPLL; ++ CLKCON &= ~CLKCON_CAM_HCLK; ++#else ++ struct clk *clk_camif = clk_get(NULL, "camif"); ++ struct clk *clk_camif_upll = clk_get(NULL, "camif-upll"); ++ ++ writel(0, camregs + S3C2440_CAM_REG_CIIMGCPT); ++ ++ clk_disable(clk_camif); ++ clk_disable(clk_camif_upll); ++#endif ++} ++ ++ ++/* Init external image sensor ++ * Before make some value into image senor, ++ * you must set up the pixel clock. ++ */ ++void camif_setup_sensor(void) ++{ ++ camif_reset(CAMIF_RESET, 0); ++ camif_gpio_init(); ++ camif_clock_init(NULL); ++/* Sometimes ,Before loading I2C module, we need the reset signal */ ++#ifdef CONFIG_ARCH_S3C24A0A ++ camif_reset(CAMIF_EX_RESET_AL,1000); ++#else ++ camif_reset(CAMIF_EX_RESET_AH,1000); ++#endif ++} ++ ++void camif_hw_close(camif_cfg_t *cfg) ++{ ++ camif_bus_priority(0); ++ camif_clock_off(); ++} ++ ++void camif_hw_open(camif_gc_t *gc) ++{ ++ camif_source_fmt(gc); ++ camif_win_offset(gc); ++ camif_bus_priority(1); ++} ++ ++ ++ ++/* ++ * Local variables: ++ * tab-width: 8 ++ * c-indent-level: 8 ++ * c-basic-offset: 8 ++ * c-set-style: "K&R" ++ * End: ++ */ +Index: linux-2.6.28/arch/arm/mach-s3c2440/camera/camif_fsm.c +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-2.6.28/arch/arm/mach-s3c2440/camera/camif_fsm.c 2009-01-02 00:01:56.000000000 +0100 +@@ -0,0 +1,432 @@ ++/* ++ Copyright (C) 2004 Samsung Electronics ++ SW.LEE ++ ++ This program is free software; you can redistribute it and/or modify ++ it under the terms of the GNU General Public License as published by ++ the Free Software Foundation; either version 2 of the License, or ++ (at your option) any later version. ++*/ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#define CONFIG_VIDEO_V4L1_COMPAT ++#include ++#include "camif.h" ++ ++//#define SW_DEBUG ++static void camif_start_p_with_c(camif_cfg_t *cfg); ++ ++#include "camif.h" ++const char *fsm_version = ++ "$Id: camif_fsm.c,v 1.3 2004/04/27 10:26:28 swlee Exp $"; ++ ++ ++/* ++ * FSM function is the place where Synchronization in not necessary ++ * because IRS calls this functions. ++ */ ++ ++ssize_t camif_p_1fsm_start(camif_cfg_t *cfg) ++{ ++ //camif_reset(CAMIF_RESET,0); ++ cfg->exec = CAMIF_DMA_ON; ++ camif_capture_start(cfg); ++ camif_last_irq_en(cfg); ++ cfg->status = CAMIF_STARTED; ++ cfg->fsm = CAMIF_1nd_INT; ++ return 0; ++} ++ ++ ++ssize_t camif_p_2fsm_start(camif_cfg_t *cfg) ++{ ++ camif_reset(CAMIF_RESET,0);/* FIFO Count goes to zero */ ++ cfg->exec = CAMIF_DMA_ON; ++ camif_capture_start(cfg); ++ cfg->status = CAMIF_STARTED; ++ cfg->fsm = CAMIF_1nd_INT; ++ return 0; ++} ++ ++ ++ssize_t camif_4fsm_start(camif_cfg_t *cfg) ++{ ++ camif_reset(CAMIF_RESET,0); /* FIFO Count goes to zero */ ++ cfg->exec = CAMIF_DMA_ON; ++ camif_capture_start(cfg); ++ cfg->status = CAMIF_STARTED; ++ cfg->fsm = CAMIF_1nd_INT; ++ cfg->perf.frames = 0; ++ return 0; ++} ++ ++ ++/* Policy: ++ cfg->perf.frames set in camif_fsm.c ++ cfg->status set in video-driver.c ++ */ ++ ++/* ++ * Don't insert camif_reset(CAM_RESET, 0 ) into this func ++ */ ++ssize_t camif_p_stop(camif_cfg_t *cfg) ++{ ++ cfg->exec = CAMIF_DMA_OFF; ++// cfg->status = CAMIF_STOPPED; ++ camif_capture_stop(cfg); ++ cfg->perf.frames = 0; /* Dupplicated ? */ ++ return 0; ++} ++ ++/* When C working, P asks C to play togehter */ ++/* Only P must call this function */ ++void camif_start_c_with_p (camif_cfg_t *cfg, camif_cfg_t *other) ++{ ++// cfg->gc->other = get_camif(CODEC_MINOR); ++ cfg->gc->other = other; ++ camif_start_p_with_c(cfg); ++} ++ ++static void camif_start_p_with_c(camif_cfg_t *cfg) ++{ ++ camif_cfg_t *other = (camif_cfg_t *)cfg->gc->other; ++ /* Preview Stop */ ++ cfg->exec = CAMIF_DMA_OFF; ++ camif_capture_stop(cfg); ++ /* Start P and C */ ++ camif_reset(CAMIF_RESET, 0); ++ cfg->exec =CAMIF_BOTH_DMA_ON; ++ camif_capture_start(cfg); ++ cfg->fsm = CAMIF_1nd_INT; /* For Preview */ ++ if(!other) panic("Unexpected Error \n"); ++ other->fsm = CAMIF_1nd_INT; /* For Preview */ ++} ++ ++static void camif_auto_restart(camif_cfg_t *cfg) ++{ ++// if (cfg->dma_type & CAMIF_CODEC) return; ++ if (cfg->auto_restart) ++ camif_start_p_with_c(cfg); ++} ++ ++ ++/* Supposed that PREVIEW already running ++ * request PREVIEW to start with Codec ++ */ ++static int camif_check_global(camif_cfg_t *cfg) ++{ ++ int ret = 0; ++ ++ if (down_interruptible(&cfg->gc->lock)) ++ return -ERESTARTSYS; ++ if ( cfg->gc->status & CWANT2START ) { ++ cfg->gc->status &= ~CWANT2START; ++ cfg->auto_restart = 1; ++ ret = 1; ++ } ++ else { ++ ret = 0; /* There is no codec */ ++ cfg->auto_restart = 0; /* Duplicated ..Dummy */ ++ } ++ ++ up(&cfg->gc->lock); ++ ++ return ret; ++} ++ ++/* ++ * 1nd INT : Start Interrupt ++ * Xnd INT : enable Last IRQ : pingpong get the valid data ++ * Ynd INT : Stop Codec or Preview : pingpong get the valid data ++ * Znd INT : Last IRQ : valid data ++ */ ++#define CHECK_FREQ 5 ++int camif_enter_p_4fsm(camif_cfg_t *cfg) ++{ ++ int ret = 0; ++ ++ cfg->perf.frames++; ++ if (cfg->fsm == CAMIF_NORMAL_INT) ++ if (cfg->perf.frames % CHECK_FREQ == 0) ++ ret = camif_check_global(cfg); ++ if (ret > 0) cfg->fsm = CAMIF_Xnd_INT; /* Codec wait for Preview */ ++ ++ switch (cfg->fsm) { ++ case CAMIF_1nd_INT: /* Start IRQ */ ++ cfg->fsm = CAMIF_NORMAL_INT; ++ ret = INSTANT_SKIP; ++ DPRINTK(KERN_INFO "1nd INT \n"); ++ break; ++ case CAMIF_NORMAL_INT: ++ cfg->status = CAMIF_INT_HAPPEN; ++ cfg->fsm = CAMIF_NORMAL_INT; ++ ret = INSTANT_GO; ++ DPRINTK(KERN_INFO "NORMAL INT \n"); ++ break; ++ case CAMIF_Xnd_INT: ++ camif_last_irq_en(cfg);/* IRQ for Enabling LAST IRQ */ ++ cfg->status = CAMIF_INT_HAPPEN; ++ cfg->fsm = CAMIF_Ynd_INT; ++ ret = INSTANT_GO; ++ DPRINTK(KERN_INFO "Xnd INT \n"); ++ break; ++ case CAMIF_Ynd_INT: /* Capture Stop */ ++ cfg->exec = CAMIF_DMA_OFF; ++ cfg->status = CAMIF_INT_HAPPEN; ++ camif_capture_stop(cfg); ++ cfg->fsm = CAMIF_Znd_INT; ++ ret = INSTANT_GO; ++ DPRINTK(KERN_INFO "Ynd INT \n"); ++ break; ++ case CAMIF_Znd_INT: /* LAST IRQ (Dummy IRQ */ ++ cfg->fsm = CAMIF_DUMMY_INT; ++ cfg->status = CAMIF_INT_HAPPEN; ++ ret = INSTANT_GO; ++ camif_auto_restart(cfg); /* Automatically Restart Camera */ ++ DPRINTK(KERN_INFO "Znd INT \n"); ++ break; ++ case CAMIF_DUMMY_INT: ++ cfg->status = CAMIF_STOPPED; /* Dupplicate ? */ ++ ret = INSTANT_SKIP; ++// DPRINTK(KERN_INFO "Dummy INT \n"); ++ break; ++ default: ++ printk(KERN_INFO "Unexpect INT %d \n",cfg->fsm); ++ ret = INSTANT_SKIP; ++ break; ++ } ++ return ret; ++} ++ ++ ++/* ++ * NO autorestart included in this function ++ */ ++int camif_enter_c_4fsm(camif_cfg_t *cfg) ++{ ++ int ret; ++ ++ cfg->perf.frames++; ++#if 0 ++ if ( (cfg->fsm==CAMIF_NORMAL_INT) ++ && (cfg->perf.frames>cfg->restart_limit-1) ++ ) ++ cfg->fsm = CAMIF_Xnd_INT; ++#endif ++ switch (cfg->fsm) { ++ case CAMIF_1nd_INT: /* Start IRQ */ ++ cfg->fsm = CAMIF_NORMAL_INT; ++// cfg->status = CAMIF_STARTED; /* need this to meet auto-restart */ ++ ret = INSTANT_SKIP; ++ DPRINTK(KERN_INFO "1nd INT \n"); ++ break; ++ case CAMIF_NORMAL_INT: ++ cfg->status = CAMIF_INT_HAPPEN; ++ cfg->fsm = CAMIF_NORMAL_INT; ++ ret = INSTANT_GO; ++ DPRINTK(KERN_INFO "NORMALd INT \n"); ++ break; ++ case CAMIF_Xnd_INT: ++ camif_last_irq_en(cfg);/* IRQ for Enabling LAST IRQ */ ++ cfg->status = CAMIF_INT_HAPPEN; ++ cfg->fsm = CAMIF_Ynd_INT; ++ ret = INSTANT_GO; ++ DPRINTK(KERN_INFO "Xnd INT \n"); ++ break; ++ case CAMIF_Ynd_INT: /* Capture Stop */ ++ cfg->exec = CAMIF_DMA_OFF; ++ cfg->status = CAMIF_INT_HAPPEN; ++ camif_capture_stop(cfg); ++ cfg->fsm = CAMIF_Znd_INT; ++ ret = INSTANT_GO; ++ DPRINTK(KERN_INFO "Ynd INT \n"); ++ break; ++ case CAMIF_Znd_INT: /* LAST IRQ (Dummy IRQ */ ++ cfg->fsm = CAMIF_DUMMY_INT; ++ cfg->status = CAMIF_INT_HAPPEN; ++ ret = INSTANT_GO; ++ DPRINTK(KERN_INFO "Znd INT \n"); ++ break; ++ case CAMIF_DUMMY_INT: ++ cfg->status = CAMIF_STOPPED; /* Dupplicate ? */ ++ ret = INSTANT_SKIP; ++ break; ++ default: ++ printk(KERN_INFO "Unexpect INT %d \n",cfg->fsm); ++ ret = INSTANT_SKIP; ++ break; ++ } ++ return ret; ++} ++ ++/* 4 Interrups State Machine is for two pingpong ++ * 1nd INT : Start Interrupt ++ * Xnd INT : enable Last IRQ : pingpong get the valid data ++ * Ynd INT : Stop Codec or Preview : pingpong get the valid data ++ * Znd INT : Last IRQ : valid data ++ * ++ * Note: ++ * Before calling this func, you must call camif_reset ++ */ ++ ++int camif_enter_2fsm(camif_cfg_t *cfg) /* Codec FSM */ ++{ ++ int ret; ++ ++ cfg->perf.frames++; ++ switch (cfg->fsm) { ++ case CAMIF_1nd_INT: /* Start IRQ */ ++ cfg->fsm = CAMIF_Xnd_INT; ++ ret = INSTANT_SKIP; ++// printk(KERN_INFO "1nd INT \n"); ++ break; ++ case CAMIF_Xnd_INT: ++ camif_last_irq_en(cfg);/* IRQ for Enabling LAST IRQ */ ++ cfg->now_frame_num = 0; ++ cfg->status = CAMIF_INT_HAPPEN; ++ cfg->fsm = CAMIF_Ynd_INT; ++ ret = INSTANT_GO; ++// printk(KERN_INFO "2nd INT \n"); ++ break; ++ case CAMIF_Ynd_INT: /* Capture Stop */ ++ cfg->exec = CAMIF_DMA_OFF; ++ cfg->now_frame_num = 1; ++ cfg->status = CAMIF_INT_HAPPEN; ++ camif_capture_stop(cfg); ++ cfg->fsm = CAMIF_Znd_INT; ++ ret = INSTANT_GO; ++// printk(KERN_INFO "Ynd INT \n"); ++ break; ++ case CAMIF_Znd_INT: /* LAST IRQ (Dummy IRQ */ ++ cfg->now_frame_num = 0; ++// cfg->fsm = CAMIF_DUMMY_INT; ++ cfg->status = CAMIF_INT_HAPPEN; ++ ret = INSTANT_GO; ++// printk(KERN_INFO "Znd INT \n"); ++ break; ++ case CAMIF_DUMMY_INT: ++ cfg->status = CAMIF_STOPPED; /* Dupplicate ? */ ++ ret = INSTANT_SKIP; ++ printk(KERN_INFO "Dummy INT \n"); ++ break; ++ default: /* CAMIF_PENDING_INT */ ++ printk(KERN_INFO "Unexpect INT \n"); ++ ret = INSTANT_SKIP; ++ break; ++ } ++ return ret; ++} ++ ++ ++/* 2 Interrups State Machine is for one pingpong ++ * 1nd INT : Stop Codec or Preview : pingpong get the valid data ++ * 2nd INT : Last IRQ : dummy data ++ */ ++int camif_enter_1fsm(camif_cfg_t *cfg) /* Codec FSM */ ++{ ++ int ret; ++ ++ cfg->perf.frames++; ++ switch (cfg->fsm) { ++ case CAMIF_Ynd_INT: /* IRQ for Enabling LAST IRQ */ ++ cfg->exec = CAMIF_DMA_OFF; ++ camif_capture_stop(cfg); ++ cfg->fsm = CAMIF_Znd_INT; ++ ret = INSTANT_SKIP; ++ // printk(KERN_INFO "Ynd INT \n"); ++ break; ++ case CAMIF_Znd_INT: /* LAST IRQ (Dummy IRQ */ ++ cfg->fsm = CAMIF_DUMMY_INT; ++ cfg->status = CAMIF_INT_HAPPEN; ++ ret = INSTANT_GO; ++ // printk(KERN_INFO "Znd INT \n"); ++ break; ++ case CAMIF_DUMMY_INT: ++ cfg->status = CAMIF_STOPPED; /* Dupplicate ? */ ++ ret = INSTANT_SKIP; ++ printk(KERN_INFO "Dummy INT \n"); ++ break; ++ default: ++ printk(KERN_INFO "Unexpect INT \n"); ++ ret = INSTANT_SKIP; ++ break; ++ } ++ return ret; ++} ++ ++ ++/* ++ * GLOBAL STATUS CONTROL FUNCTION ++ * ++ */ ++ ++ ++/* Supposed that PREVIEW already running ++ * request PREVIEW to start with Codec ++ */ ++int camif_callback_start(camif_cfg_t *cfg) ++{ ++ int doit = 1; ++ while (doit) { ++ if (down_interruptible(&cfg->gc->lock)) { ++ return -ERESTARTSYS; ++ } ++ cfg->gc->status = CWANT2START; ++ cfg->gc->other = cfg; ++ up(&cfg->gc->lock); ++ doit = 0; ++ } ++ return 0; ++} ++ ++/* ++ * Return status of Preview Machine ++ ret value : ++ 0: Preview is not working ++ X: Codec must follow PREVIEW start ++*/ ++int camif_check_preview(camif_cfg_t *cfg) ++{ ++ int ret = 0; ++ ++ if (down_interruptible(&cfg->gc->lock)) { ++ ret = -ERESTARTSYS; ++ return ret; ++ } ++ if (cfg->gc->user == 1) ret = 0; ++ // else if (cfg->gc->status & PNOTWORKING) ret = 0; ++ else ret = 1; ++ up(&cfg->gc->lock); ++ return ret; ++} ++ ++ ++ ++ ++/* ++ * Local variables: ++ * c-basic-offset: 8 ++ * End: ++ */ +Index: linux-2.6.28/arch/arm/mach-s3c2440/camera/camif.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-2.6.28/arch/arm/mach-s3c2440/camera/camif.h 2009-01-02 00:01:56.000000000 +0100 +@@ -0,0 +1,304 @@ ++/* ++ FIMC2.0 Camera Header File ++ ++ Copyright (C) 2003 Samsung Electronics (SW.LEE: hitchcar@samsung.com) ++ ++ Author : SW.LEE ++ ++ This program is free software; you can redistribute it and/or modify ++ it under the terms of the GNU General Public License as published by ++ the Free Software Foundation; either version 2 of the License, or ++ (at your option) any later version. ++* ++*/ ++ ++ ++#ifndef __FIMC20_CAMIF_H_ ++#define __FIMC20_CAMIF_H_ ++ ++#ifdef __KERNEL__ ++ ++#include "bits.h" ++#include "videodev.h" ++#include ++#include ++ ++#endif /* __KERNEL__ */ ++ ++#ifndef O_NONCAP ++#define O_NONCAP O_TRUNC ++#endif ++ ++/* Codec or Preview Status */ ++#define CAMIF_STARTED BIT1 ++#define CAMIF_STOPPED BIT2 ++#define CAMIF_INT_HAPPEN BIT3 ++ ++/* Codec or Preview : Interrupt FSM */ ++#define CAMIF_1nd_INT BIT7 ++#define CAMIF_Xnd_INT BIT8 ++#define CAMIF_Ynd_INT BIT9 ++#define CAMIF_Znd_INT BIT10 ++#define CAMIF_NORMAL_INT BIT11 ++#define CAMIF_DUMMY_INT BIT12 ++#define CAMIF_PENDING_INT 0 ++ ++ ++/* CAMIF RESET Definition */ ++#define CAMIF_RESET BIT0 ++#define CAMIF_EX_RESET_AL BIT1 /* Active Low */ ++#define CAMIF_EX_RESET_AH BIT2 /* Active High */ ++ ++ ++enum camif_itu_fmt { ++ CAMIF_ITU601 = BIT31, ++ CAMIF_ITU656 = 0 ++}; ++ ++/* It is possbie to use two device simultaneously */ ++enum camif_dma_type { ++ CAMIF_PREVIEW = BIT0, ++ CAMIF_CODEC = BIT1, ++}; ++ ++enum camif_order422 { ++ CAMIF_YCBYCR = 0, ++ CAMIF_YCRYCB = BIT14, ++ CAMIF_CBYCRY = BIT15, ++ CAMIF_CRYCBY = BIT14 | BIT15 ++}; ++ ++enum flip_mode { ++ CAMIF_FLIP = 0, ++ CAMIF_FLIP_X = BIT14, ++ CAMIF_FLIP_Y = BIT15, ++ CAMIF_FLIP_MIRROR = BIT14 |BIT15, ++}; ++ ++enum camif_codec_fmt { ++ /* Codec part */ ++ CAMIF_IN_YCBCR420 = BIT0, /* Currently IN_YCBCR format fixed */ ++ CAMIF_IN_YCBCR422 = BIT1, ++ CAMIF_OUT_YCBCR420 = BIT4, ++ CAMIF_OUT_YCBCR422 = BIT5, ++ /* Preview Part */ ++ CAMIF_RGB16 = BIT2, ++ CAMIF_RGB24 = BIT3, ++}; ++ ++enum camif_capturing { ++ CAMIF_BOTH_DMA_ON = BIT4, ++ CAMIF_DMA_ON = BIT3, ++ CAMIF_BOTH_DMA_OFF = BIT1, ++ CAMIF_DMA_OFF = BIT0, ++ /*------------------------*/ ++ CAMIF_DMA_OFF_L_IRQ= BIT5, ++}; ++ ++typedef struct camif_performance ++{ ++ int frames; ++ int framesdropped; ++ __u64 bytesin; ++ __u64 bytesout; ++ __u32 reserved[4]; ++} camif_perf_t; ++ ++ ++typedef struct { ++ dma_addr_t phys_y; ++ dma_addr_t phys_cb; ++ dma_addr_t phys_cr; ++ u8 *virt_y; ++ u8 *virt_cb; ++ u8 *virt_cr; ++ dma_addr_t phys_rgb; ++ u8 *virt_rgb; ++}img_buf_t; ++ ++ ++/* this structure convers the CIWDOFFST, prescaler, mainscaler */ ++typedef struct { ++ u32 modified_src_x; /* After windows applyed to source_x */ ++ u32 modified_src_y; ++ u32 hfactor; ++ u32 vfactor; ++ u32 shfactor; /* SHfactor = 10 - ( hfactor + vfactor ) */ ++ u32 prehratio; ++ u32 prevratio; ++ u32 predst_x; ++ u32 predst_y; ++ u32 scaleup_h; ++ u32 scaleup_v; ++ u32 mainhratio; ++ u32 mainvratio; ++ u32 scalerbypass; /* only codec */ ++} scaler_t; ++ ++ ++enum v4l2_status { ++ CAMIF_V4L2_INIT = BIT0, ++ CAMIF_v4L2_DIRTY = BIT1, ++}; ++ ++ ++/* Global Status Definition */ ++#define PWANT2START BIT0 ++#define CWANT2START BIT1 ++#define BOTH_STARTED (PWANT2START|CWANT2START) ++#define PNOTWORKING BIT4 ++#define C_WORKING BIT5 ++ ++typedef struct { ++ struct semaphore lock; ++ enum camif_itu_fmt itu_fmt; ++ enum camif_order422 order422; ++ u32 win_hor_ofst; ++ u32 win_ver_ofst; ++ u32 camclk; /* External Image Sensor Camera Clock */ ++ u32 source_x; ++ u32 source_y; ++ u32 polarity_pclk; ++ u32 polarity_vsync; ++ u32 polarity_href; ++ struct i2c_client *sensor; ++ u32 user; /* MAX 2 (codec, preview) */ ++ u32 old_priority; /* BUS PRIORITY register */ ++ u32 status; ++ u32 init_sensor;/* initializing sensor */ ++ void *other; /* Codec camif_cfg_t */ ++ u32 reset_type; /* External Sensor Reset Type */ ++ u32 reset_udelay; ++} camif_gc_t; /* gobal control register */ ++ ++ ++/* when App want to change v4l2 parameter, ++ * we instantly store it into v4l2_t v2 ++ * and then reflect it to hardware ++ */ ++typedef struct v4l2 { ++ struct v4l2_fmtdesc *fmtdesc; ++ struct v4l2_pix_format fmt; /* current pixel format */ ++ struct v4l2_input input; ++ struct video_picture picture; ++ enum v4l2_status status; ++ int used_fmt ; /* used format index */ ++} v4l2_t; ++ ++ ++typedef struct camif_c_t { ++ struct video_device *v; ++ /* V4L2 param only for v4l2 driver */ ++ v4l2_t v2; ++ camif_gc_t *gc; /* Common between Codec and Preview */ ++ /* logical parameter */ ++ wait_queue_head_t waitq; ++ u32 status; /* Start/Stop */ ++ u32 fsm; /* Start/Stop */ ++ u32 open_count; /* duplicated */ ++ int irq; ++ char shortname[16]; ++ u32 target_x; ++ u32 target_y; ++ scaler_t sc; ++ enum flip_mode flip; ++ enum camif_dma_type dma_type; ++ /* 4 pingpong Frame memory */ ++ u8 *pp_virt_buf; ++ dma_addr_t pp_phys_buf; ++ u32 pp_totalsize; ++ u32 pp_num; /* used pingpong memory number */ ++ img_buf_t img_buf[4]; ++ enum camif_codec_fmt fmt; ++ enum camif_capturing exec; ++ camif_perf_t perf; ++ u32 now_frame_num; ++ u32 auto_restart; /* Only For Preview */ ++} camif_cfg_t; ++ ++#ifdef SW_DEBUG ++#define DPRINTK(fmt, args...) printk(KERN_DEBUG "%s: " fmt, __FUNCTION__ , ## args) ++#else ++#define DPRINTK(fmt, args...) ++#endif ++ ++ ++#ifdef SW_DEBUG ++#define assert(expr) \ ++ if(!(expr)) { \ ++ printk( "Assertion failed! %s,%s,%s,line=%d\n", \ ++ #expr,__FILE__,__FUNCTION__,__LINE__); \ ++ } ++#else ++#define assert(expr) ++#endif ++ ++ ++ ++extern int camif_capture_start(camif_cfg_t *); ++extern int camif_capture_stop(camif_cfg_t *); ++extern int camif_g_frame_num(camif_cfg_t *); ++extern u8 * camif_g_frame(camif_cfg_t *); ++extern int camif_win_offset(camif_gc_t *); ++extern void camif_hw_open(camif_gc_t *); ++extern void camif_hw_close(camif_cfg_t *); ++extern int camif_dynamic_open(camif_cfg_t *); ++extern int camif_dynamic_close(camif_cfg_t *); ++extern void camif_reset(int,int); ++extern void camif_setup_sensor(void); ++extern int camif_g_fifo_status(camif_cfg_t *); ++extern void camif_last_irq_en(camif_cfg_t *); ++extern void camif_change_flip(camif_cfg_t *); ++ ++ ++/* Todo ++ * API Interface function to both Character and V4L2 Drivers ++ */ ++extern int camif_do_write(struct file *,const char *, size_t, loff_t *); ++extern int camif_do_ioctl(struct inode *, struct file *,unsigned int, void *); ++ ++ ++/* ++ * API for Decoder (S5x532, OV7620..) ++ */ ++void camif_register_decoder(struct i2c_client *); ++void camif_unregister_decoder(struct i2c_client*); ++ ++ ++ ++/* API for FSM */ ++#define INSTANT_SKIP 0 ++#define INSTANT_GO 1 ++ ++extern ssize_t camif_p_1fsm_start(camif_cfg_t *); ++extern ssize_t camif_p_2fsm_start(camif_cfg_t *); ++extern ssize_t camif_4fsm_start(camif_cfg_t *); ++extern ssize_t camif_p_stop(camif_cfg_t *); ++extern int camif_enter_p_4fsm(camif_cfg_t *); ++extern int camif_enter_c_4fsm(camif_cfg_t *); ++extern int camif_enter_2fsm(camif_cfg_t *); ++extern int camif_enter_1fsm(camif_cfg_t *); ++extern int camif_check_preview(camif_cfg_t *); ++extern int camif_callback_start(camif_cfg_t *); ++extern int camif_clock_init(camif_gc_t *); ++ ++/* ++ * V4L2 Part ++ */ ++#define VID_HARDWARE_SAMSUNG_FIMC20 236 ++ ++ ++ ++ ++ ++#endif ++ ++ ++/* ++ * Local variables: ++ * tab-width: 8 ++ * c-indent-level: 8 ++ * c-basic-offset: 8 ++ * c-set-style: "K&R" ++ * End: ++ */ +Index: linux-2.6.28/arch/arm/mach-s3c2440/camera/cam_reg.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-2.6.28/arch/arm/mach-s3c2440/camera/cam_reg.h 2009-01-02 00:01:56.000000000 +0100 +@@ -0,0 +1,234 @@ ++ /*---------------------------------------------------------- ++ * (C) 2004 Samsung Electronics ++ * SW.LEE < hitchcar@samsung.com> ++ * ++ ----------------------------------------------------------- */ ++ ++#ifndef __FIMC20_CAMERA_H__ ++#define __FIMC20_CAMERA_H__ ++ ++extern u32 * camregs; ++ ++#ifdef CONFIG_ARCH_S3C24A0 ++#define CAM_BASE_ADD 0x48000000 ++#else /* S3C2440A */ ++#define CAM_BASE_ADD 0x4F000000 ++#endif ++ ++#if ! defined(FExtr) ++#define UData(Data) ((unsigned long) (Data)) ++#define FExtr(Data, Field) \ ++ ((UData (Data) >> FShft (Field)) & FAlnMsk (Field)) ++#define FInsrt(Value, Field) \ ++ (UData (Value) << FShft (Field)) ++#define FSize(Field) ((Field) >> 16) ++#define FShft(Field) ((Field) & 0x0000FFFF) ++#define FMsk(Field) (((UData (1) << FSize (Field)) - 1) << FShft (Field)) ++#define FAlnMsk(Field) ((UData (1) << FSize (Field)) - 1) ++#define F1stBit(Field) (UData (1) << FShft (Field)) ++#define Fld(Size, Shft) (((Size) << 16) + (Shft)) ++#endif ++ ++/* ++ * CAMERA IP ++ * P-port is used as RGB Capturing device which including scale and crop ++ * those who want to see(preview ) the image on display needs RGB image. ++ * ++ * C-port is used as YCbCr(4:2:0, 4:2:2) Capturing device which including the scale and crop ++ * the prefix of C-port have the meaning of "Codec" ex. mpeg4, h263.. which requries the ++ YCBCB format not RGB ++ */ ++ ++#define S3C2440_CAM_REG_CISRCFMT (0x00) // RW Input Source Format ++#define S3C2440_CAM_REG_CIWDOFST (0x04) // Window offset register ++#define S3C2440_CAM_REG_CIGCTRL (0x08) // Global control register ++#define S3C2440_CAM_REG_CICOYSA0 (0x18) // Y 1 st frame start ads ++#define S3C2440_CAM_REG_CICOYSA1 (0x1C) // Y 2 nd frame start ads ++#define S3C2440_CAM_REG_CICOYSA2 (0x20) // Y 3 rd frame start ads ++#define S3C2440_CAM_REG_CICOYSA3 (0x24) // Y 4 th frame start ads ++#define S3C2440_CAM_REG_CICOCBSA0 (0x28) // Cb 1 st frame start ads ++#define S3C2440_CAM_REG_CICOCBSA1 (0x2C) // Cb 2 nd frame start ads ++#define S3C2440_CAM_REG_CICOCBSA2 (0x30) // Cb 3 rd frame start ads ++#define S3C2440_CAM_REG_CICOCBSA3 (0x34) // Cb 4 th frame start ads ++#define S3C2440_CAM_REG_CICOCRSA0 (0x38) // Cr 1 st frame start ads ++#define S3C2440_CAM_REG_CICOCRSA1 (0x3C) // Cr 2 nd frame start ads ++#define S3C2440_CAM_REG_CICOCRSA2 (0x40) // Cr 3 rd frame start ads ++#define S3C2440_CAM_REG_CICOCRSA3 (0x44) // Cr 4 th frame start ads ++#define S3C2440_CAM_REG_CICOTRGFMT (0x48) // Target img format of codec ++#define S3C2440_CAM_REG_CICOCTRL (0x4C) // Codec DMA control related ++#define S3C2440_CAM_REG_CICOSCPRERATIO (0x50) // Codec pre-scaler ratio ++#define S3C2440_CAM_REG_CICOSCPREDST (0x54) // Codec pre-scaler dest ++#define S3C2440_CAM_REG_CICOSCCTRL (0x58) // Codec main-scaler control ++#define S3C2440_CAM_REG_CICOTAREA (0x5C) // Codec pre-scaler dest ++#define S3C2440_CAM_REG_CICOSTATUS (0x64) // Codec path status ++#define S3C2440_CAM_REG_CIPRCLRSA0 (0x6C) // RGB 1 st frame start ads ++#define S3C2440_CAM_REG_CIPRCLRSA1 (0x70) // RGB 2 nd frame start ads ++#define S3C2440_CAM_REG_CIPRCLRSA2 (0x74) // RGB 3 rd frame start ads ++#define S3C2440_CAM_REG_CIPRCLRSA3 (0x78) // RGB 4 th frame start ads ++#define S3C2440_CAM_REG_CIPRTRGFMT (0x7C) // Target img fmt of preview ++#define S3C2440_CAM_REG_CIPRCTRL (0x80) // Preview DMA ctl related ++#define S3C2440_CAM_REG_CIPRSCPRERATIO (0x84) // Preview pre-scaler ratio ++#define S3C2440_CAM_REG_CIPRSCPREDST (0x88) // Preview pre-scaler dest ++#define S3C2440_CAM_REG_CIPRSCCTRL (0x8C) // Preview main-scaler ctl ++#define S3C2440_CAM_REG_CIPRTAREA (0x90) // Preview pre-scaler dest ++#define S3C2440_CAM_REG_CIPRSTATUS (0x98) // Preview path status ++#define S3C2440_CAM_REG_CIIMGCPT (0xA0) // Image capture enable cmd ++ ++#define S3C2440_CAM_REG_CICOYSA(__x) (0x18 + (__x)*4 ) ++#define S3C2440_CAM_REG_CICOCBSA(__x) (0x28 + (__x)*4 ) ++#define S3C2440_CAM_REG_CICOCRSA(__x) (0x38 + (__x)*4 ) ++#define S3C2440_CAM_REG_CIPRCLRSA(__x) (0x6C + (__x)*4 ) ++ ++/* CISRCFMT BitField */ ++#define SRCFMT_ITU601 BIT31 ++#define SRCFMT_ITU656 0 ++#define SRCFMT_UVOFFSET_128 BIT30 ++#define fCAM_SIZE_H Fld(13, 16) ++#define fCAM_SIZE_V Fld(13, 0) ++#define SOURCE_HSIZE(x) FInsrt((x), fCAM_SIZE_H) ++#define SOURCE_VSIZE(x) FInsrt((x), fCAM_SIZE_V) ++ ++ ++/* Window Option Register */ ++#define WINOFEN BIT31 ++#define CO_FIFO_Y BIT30 ++#define CO_FIFO_CB BIT15 ++#define CO_FIFO_CR BIT14 ++#define PR_FIFO_CB BIT13 ++#define PR_FIFO_CR BIT12 ++#define fWINHOR Fld(11, 16) ++#define fWINVER Fld(11, 0) ++#define WINHOROFST(x) FInsrt((x), fWINHOR) ++#define WINVEROFST(x) FInsrt((x), fWINVER) ++ ++/* Global Control Register */ ++#define GC_SWRST BIT31 ++#define GC_CAMRST BIT30 ++#define GC_INVPOLPCLK BIT26 ++#define GC_INVPOLVSYNC BIT25 ++#define GC_INVPOLHREF BIT24 ++ ++/*-------------------------------------------------- ++ REGISTER BIT FIELD DEFINITION TO ++ YCBCR and RGB ++----------------------------------------------------*/ ++/* Codec Target Format Register */ ++#define IN_YCBCR420 0 ++#define IN_YCBCR422 BIT31 ++#define OUT_YCBCR420 0 ++#define OUT_YCBCR422 BIT30 ++ ++#if 0 ++#define FLIP_NORMAL 0 ++#define FLIP_X (BIT14) ++#define FLIP_Y (BIT15) ++#define FLIP_MIRROR (BIT14|BIT15) ++#endif ++ ++/** BEGIN ************************************/ ++/* Cotents: Common in both P and C port */ ++#define fTARGET_HSIZE Fld(13,16) ++#define TARGET_HSIZE(x) FInsrt((x), fTARGET_HSIZE) ++#define fTARGET_VSIZE Fld(13,0) ++#define TARGET_VSIZE(x) FInsrt((x), fTARGET_VSIZE) ++#define FLIP_X_MIRROR BIT14 ++#define FLIP_Y_MIRROR BIT15 ++#define FLIP_180_MIRROR (BIT14 | BIT15) ++/** END *************************************/ ++ ++/* Codec DMA Control Register */ ++#define fYBURST_M Fld(5,19) ++#define fYBURST_R Fld(5,14) ++#define fCBURST_M Fld(5,9) ++#define fCBURST_R Fld(5,4) ++#define YBURST_M(x) FInsrt((x), fYBURST_M) ++#define CBURST_M(x) FInsrt((x), fCBURST_M) ++#define YBURST_R(x) FInsrt((x), fYBURST_R) ++#define CBURST_R(x) FInsrt((x), fCBURST_R) ++#define LAST_IRQ_EN BIT2 /* Common in both P and C port */ ++/* ++ * Check the done signal of capturing image for JPEG ++ * !!! AutoClear Bit ++ */ ++ ++ ++/* (Codec, Preview ) Pre-Scaler Control Register 1 */ ++#define fSHIFT Fld(4,28) ++#define PRE_SHIFT(x) FInsrt((x), fSHIFT) ++#define fRATIO_H Fld(7,16) ++#define PRE_HRATIO(x) FInsrt((x), fRATIO_H) ++#define fRATIO_V Fld(7,0) ++#define PRE_VRATIO(x) FInsrt((x), fRATIO_V) ++ ++/* (Codec, Preview ) Pre-Scaler Control Register 2*/ ++#define fDST_WIDTH Fld(12,16) ++#define fDST_HEIGHT Fld(12,0) ++#define PRE_DST_WIDTH(x) FInsrt((x), fDST_WIDTH) ++#define PRE_DST_HEIGHT(x) FInsrt((x), fDST_HEIGHT) ++ ++ ++/* (Codec, Preview) Main-scaler control Register */ ++#define S_METHOD BIT31 /* Sampling method only for P-port */ ++#define SCALERSTART BIT15 ++/* Codec scaler bypass for upper 2048x2048 ++ where ImgCptEn_CoSC and ImgCptEn_PrSC should be 0 ++*/ ++ ++#define SCALERBYPASS BIT31 ++#define RGB_FMT24 BIT30 ++#define RGB_FMT16 0 ++ ++/* ++#define SCALE_UP_H BIT29 ++#define SCALE_UP_V BIT28 ++*/ ++ ++#define fMAIN_HRATIO Fld(9, 16) ++#define MAIN_HRATIO(x) FInsrt((x), fMAIN_HRATIO) ++ ++#define SCALER_START BIT15 ++ ++#define fMAIN_VRATIO Fld(9, 0) ++#define MAIN_VRATIO(x) FInsrt((x), fMAIN_VRATIO) ++ ++/* (Codec, Preview ) DMA Target AREA Register */ ++#define fCICOTAREA Fld(26,0) ++#define TARGET_DMA_AREA(x) FInsrt((x), fCICOTAREA) ++ ++/* Preview DMA Control Register */ ++#define fRGBURST_M Fld(5,19) ++#define fRGBURST_R Fld(5,14) ++#define RGBURST_M(x) FInsrt((x), fRGBURST_M) ++#define RGBURST_R(x) FInsrt((x), fRGBURST_R) ++ ++ ++/* (Codec, Preview) Status Register */ ++#define CO_OVERFLOW_Y BIT31 ++#define CO_OVERFLOW_CB BIT30 ++#define CO_OVERFLOW_CR BIT29 ++#define PR_OVERFLOW_CB BIT31 ++#define PR_OVERFLOW_CR BIT30 ++ ++#define VSYNC BIT28 ++ ++#define fFRAME_CNT Fld(2,26) ++#define FRAME_CNT(x) FExtr((x),fFRAME_CNT) ++ ++#define WIN_OFF_EN BIT25 ++#define fFLIP_MODE Fld(2,23) ++#define FLIP_MODE(x) EExtr((x), fFLIP_MODE) ++#define CAP_STATUS_CAMIF BIT22 ++#define CAP_STATUS_CODEC BIT21 ++#define CAP_STATUS_PREVIEW BIT21 ++#define VSYNC_A BIT20 ++#define VSYNC_B BIT19 ++ ++/* Image Capture Enable Regiser */ ++#define CAMIF_CAP_ON BIT31 ++#define CAMIF_CAP_CODEC_ON BIT30 ++#define CAMIF_CAP_PREVIEW_ON BIT29 ++ ++ ++ ++ ++#endif /* S3C2440_CAMER_H */ +Index: linux-2.6.28/arch/arm/mach-s3c2440/camera/imgsensor.c +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-2.6.28/arch/arm/mach-s3c2440/camera/imgsensor.c 2009-01-02 00:01:56.000000000 +0100 +@@ -0,0 +1,250 @@ ++/* ++ * Copyright (C) 2004 Samsung Electronics ++ * SW.LEE ++ * ++ * Copyright (C) 2000 Russell King : pcf8583.c ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation. ++ * ++ * Driver for FIMC20 Camera Decoder ++ */ ++ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++ ++#ifdef CONFIG_ARCH_S3C24A0A ++#else ++//#include ++#endif ++ ++#define SW_DEBUG ++#define CONFIG_VIDEO_V4L1_COMPAT ++#include ++#include "camif.h" ++#include "sensor.h" ++ ++#ifndef SAMSUNG_SXGA_CAM ++#include "s5x532_rev36.h" ++#else ++#include "sxga.h" ++#endif ++ ++static struct i2c_driver s5x532_driver; ++static camif_gc_t data = { ++ itu_fmt: CAMIF_ITU601, ++ order422: CAMIF_YCBYCR, ++ camclk: 24000000, ++#ifndef SAMSUNG_SXGA_CAM ++ source_x: 640, ++ source_y: 480, ++ win_hor_ofst: 112, ++ win_ver_ofst: 20, ++#else ++ source_x: 1280, ++ source_y: 1024, ++ win_hor_ofst: 0, ++ win_ver_ofst: 0, ++#endif ++ polarity_pclk:1, ++ polarity_href:0, ++#ifdef CONFIG_ARCH_S3C24A0A ++ reset_type:CAMIF_EX_RESET_AL, /* Active Low */ ++#else ++ reset_type:CAMIF_EX_RESET_AH, /* Ref board has inverted signal */ ++#endif ++ reset_udelay:2000, ++}; ++ ++#define CAM_ID 0x5a ++ ++static unsigned short ignore = I2C_CLIENT_END; ++static unsigned short normal_addr[] = { (CAM_ID>>1), I2C_CLIENT_END }; ++static struct i2c_client_address_data addr_data = { ++ normal_i2c: normal_addr, ++ probe: &ignore, ++ ignore: &ignore, ++}; ++ ++s5x532_t s5x532_regs_mirror[S5X532_REGS]; ++ ++unsigned char ++s5x532_read(struct i2c_client *client, unsigned char subaddr) ++{ ++ int ret; ++ unsigned char buf[1]; ++ struct i2c_msg msg ={ client->addr, 0, 1, buf}; ++ buf[0] = subaddr; ++ ++ ret = i2c_transfer(client->adapter,&msg, 1) == 1 ? 0 : -EIO; ++ if (ret == -EIO) { ++ printk(" I2C write Error \n"); ++ return -EIO; ++ } ++ ++ msg.flags = I2C_M_RD; ++ ret = i2c_transfer(client->adapter, &msg, 1) == 1 ? 0 : -EIO; ++ ++ return buf[0]; ++} ++ ++ ++static int ++s5x532_write(struct i2c_client *client, ++ unsigned char subaddr, unsigned char val) ++{ ++ unsigned char buf[2]; ++ struct i2c_msg msg = { client->addr, 0, 2, buf}; ++ ++ buf[0]= subaddr; ++ buf[1]= val; ++ ++ return i2c_transfer(client->adapter, &msg, 1) == 1 ? 0 : -EIO; ++} ++ ++void inline s5x532_init(struct i2c_client *sam_client) ++{ ++ int i; ++ ++ printk(KERN_ERR "s5x532_init \n"); ++ for (i = 0; i < S5X532_INIT_REGS; i++) { ++ s5x532_write(sam_client, ++ s5x532_reg[i].subaddr, s5x532_reg[i].value ); ++ } ++ ++#ifdef YOU_WANT_TO_CHECK_IMG_SENSOR ++ for (i = 0; i < S5X532_INIT_REGS;i++) { ++ if ( s5x532_reg[i].subaddr == PAGE_ADDRESS ) { ++ s5x532_write(sam_client, ++ s5x532_reg[i].subaddr, s5x532_reg[i].value); ++ ++ printk(KERN_ERR "Page: Subaddr %02x = 0x%02x\n", ++ s5x532_reg[i].subaddr, s5x532_regs_mirror[i].value); ++ ++ ++ } else ++ { ++ s5x532_regs_mirror[i].subaddr = s5x532_reg[i].subaddr; ++ s5x532_regs_mirror[i].value = ++ s5x532_read(sam_client,s5x532_reg[i].subaddr); ++ printk(KERN_ERR "Subaddr %02x = 0x%02x\n", ++ s5x532_reg[i].subaddr, s5x532_regs_mirror[i].value); ++ } ++ } ++#endif ++ ++} ++ ++static int ++s5x532_attach(struct i2c_adapter *adap, int addr, int kind) ++{ ++ struct i2c_client *c; ++ ++ c = kmalloc(sizeof(*c), GFP_KERNEL); ++ if (!c) return -ENOMEM; ++ ++ strcpy(c->name, "S5X532"); ++// c->id = s5x532_driver.id; ++ c->flags = 0 /* I2C_CLIENT_ALLOW_USE */; ++ c->addr = addr; ++ c->adapter = adap; ++ c->driver = &s5x532_driver; ++ data.sensor = c; ++ i2c_set_clientdata(c, &data); ++ ++ camif_register_decoder(c); ++ return i2c_attach_client(c); ++} ++ ++static int s5x532_probe(struct i2c_adapter *adap) ++{ ++ return i2c_probe(adap, &addr_data, s5x532_attach); ++} ++ ++static int s5x532_detach(struct i2c_client *client) ++{ ++ i2c_detach_client(client); ++ camif_unregister_decoder(client); ++ return 0; ++} ++ ++static int ++s5x532_command(struct i2c_client *client, unsigned int cmd, void *arg) ++{ ++ switch (cmd) { ++ case SENSOR_INIT: ++ s5x532_init(client); ++ printk(KERN_INFO "CAMERA: S5X532 Sensor initialized\n"); ++ break; ++ case USER_ADD: ++ /* MOD_INC_USE_COUNT; uh.. 2.6 deals with this, old-timer */ ++ break; ++ case USER_EXIT: ++ /* MOD_DEC_USE_COUNT; */ ++ break; ++/* Todo ++ case SENSOR_BRIGHTNESS: ++ change_sensor(); ++ break; ++*/ ++ default: ++ panic("Unexpect Sensor Command \n"); ++ break; ++ } ++ return 0; ++} ++ ++static struct i2c_driver s5x532_driver = { ++ driver: { name: "S5X532" }, ++ id: 0, /* optional in i2c-id.h I2C_ALGO_S3C, */ ++ attach_adapter: s5x532_probe, ++ detach_client: s5x532_detach, ++ command: s5x532_command ++}; ++ ++static void iic_gpio_port(void) ++{ ++/* FIXME: no gpio config for i2c !!! ++#ifdef CONFIG_ARCH_S3C24A0A ++#else ++ GPECON &= ~(0xf <<28); ++ GPECON |= 0xa <<28; ++#endif ++*/ ++} ++ ++static __init int camif_sensor_init(void) ++{ ++ iic_gpio_port(); ++ return i2c_add_driver(&s5x532_driver); ++} ++ ++ ++static __init void camif_sensor_exit(void) ++{ ++ i2c_del_driver(&s5x532_driver); ++} ++ ++module_init(camif_sensor_init) ++module_exit(camif_sensor_exit) ++ ++MODULE_AUTHOR("SW.LEE "); ++MODULE_DESCRIPTION("I2C Client Driver For Fimc2.0 MISC Driver"); ++MODULE_LICENSE("GPL"); ++ ++ ++ ++/* ++ * Local variables: ++ * c-basic-offset: 8 ++ * End: ++ */ +Index: linux-2.6.28/arch/arm/mach-s3c2440/camera/Kconfig +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-2.6.28/arch/arm/mach-s3c2440/camera/Kconfig 2009-01-02 00:01:56.000000000 +0100 +@@ -0,0 +1,7 @@ ++ ++config S3C2440_CAMERA ++ bool "S3C24xx Camera interface" ++ depends on ARCH_S3C2410 ++ help ++ Camera driver for S3C2440 camera unit ++ +Index: linux-2.6.28/arch/arm/mach-s3c2440/camera/Makefile +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-2.6.28/arch/arm/mach-s3c2440/camera/Makefile 2009-01-02 00:01:56.000000000 +0100 +@@ -0,0 +1,8 @@ ++obj-$(CONFIG_S3C2440_CAMERA) += \ ++ videodev.o \ ++ imgsensor.o \ ++ video-driver.o \ ++ camif.o \ ++ camif_fsm.o \ ++ qt-driver.o ++ +Index: linux-2.6.28/arch/arm/mach-s3c2440/camera/miscdevice.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-2.6.28/arch/arm/mach-s3c2440/camera/miscdevice.h 2009-01-02 00:01:56.000000000 +0100 +@@ -0,0 +1,18 @@ ++ ++ /*---------------------------------------------------------- ++ * (C) 2004 Samsung Electronics ++ * SW.LEE < hitchcar@samsung.com> ++ * ++ ----------------------------------------------------------- */ ++ ++#ifndef _LINUX_S3C_MISCDEVICE_H ++#define _LINUX_S3C_MISCDEVICE_H ++ ++#define CODEC_MINOR 212 ++#define PREVIEW_MINOR 213 ++ ++ ++ ++ ++ ++#endif +Index: linux-2.6.28/arch/arm/mach-s3c2440/camera/qt-driver.c +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-2.6.28/arch/arm/mach-s3c2440/camera/qt-driver.c 2009-01-02 00:01:56.000000000 +0100 +@@ -0,0 +1,172 @@ ++/* ++ * SW.LEE ++ * ++ * This file is subject to the terms and conditions of the GNU General Public ++ * License 2. See the file COPYING in the main directory of this archive ++ * for more details. ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++//#define SW_DEBUG ++ ++#define CONFIG_VIDEO_V4L1_COMPAT ++#include ++#include "camif.h" ++#include "miscdevice.h" ++#include "cam_reg.h" ++#include "sensor.h" ++#include "userapp.h" ++ ++extern camif_cfg_t * get_camif(int nr); ++ ++ ++/************************* Sharp Zarus API ************************** ++* refering to Camera Driver API for SL-5000D/SL-5600 revision 1.00 ++* April 11, 2002. ++ SW.LEE ++ I want to use Sharp Camera Application. ++* ++*/ ++ ++#define READ_MODE_STATUS 0x1 ++#define READ_MODE_IMAGE 0x0 ++#define CAPTURE_SPEED ++#define H_FLIP ++#define V_FLIP ++typedef enum sharp_readmode ++{ ++ IMAGE = 0, STATUS = 1, ++ FASTER = 0, BETTER = 2, ++ XNOFLIP = 0, XFLIP = 4, ++ YNOFLIP = 0, YFLIP = 8, ++ AUTOMATICFLIP = -1 ++} ReadMode_t; ++ ++ ++static struct sharp_param_t { ++ ReadMode_t readMode; ++ char CameraStatus[4]; ++} sharp_param = { STATUS, {'s','m','c','A'}}; ++ ++ ++camif_param_t qt_parm = { 640,480,240,320,16,0}; ++ ++static void setReadMode(const char *b,size_t count) ++{ ++ int i = *(b+2) - 48 ; ++ if ( 4 == count ) { ++ i = (*(b+3) - 48) + i * 10; ++ } ++ ++ // DPRINTK(" setReadMode %s conversion value %d \n",b , i); ++ if ( i & STATUS ) { ++ // DPRINTK(" STATUS MODE \n"); ++ sharp_param.readMode = i; ++ } ++ else { ++ // DPRINTK(" IMAGE MODE \n"); ++ sharp_param.readMode = i; ++ } ++} ++ ++ ++ ++ ++extern ssize_t camif_p_read(struct file *, char *, size_t , loff_t *); ++ ++ssize_t z_read(struct file *f, char *buf, size_t count, loff_t *pos) ++{ ++ size_t end; ++ ++ if (sharp_param.readMode & STATUS ) { ++ buf[0] = sharp_param.CameraStatus[0]; ++ buf[1] = sharp_param.CameraStatus[1]; ++ buf[2] = sharp_param.CameraStatus[2]; ++ buf[3] = sharp_param.CameraStatus[3]; ++ end = 4; ++ return end; ++ } ++ else { /* Image ReadMode */ ++ /* ++ if (( sharp_param.readMode & (BETTER|X FLIP|YFLIP))) ++ DPRINTK(" Not Supporting BETTER|XFLIP|YFLIP\n"); ++ */ ++ return camif_p_read(f,buf,count,pos); ++ } ++} ++ ++static void z_config(camif_cfg_t *cfg,int x, int y) ++{ ++ cfg->target_x = x; ++ cfg->target_y = y; ++ cfg->fmt = CAMIF_RGB16; ++ if (camif_dynamic_open(cfg)) { ++ panic(" Eror Happens \n"); ++ } ++} ++ ++ ++ssize_t z_write(struct file *f, const char *b, size_t c, loff_t *pos) ++{ ++ int array[5]; ++ int zoom = 1; ++ camif_cfg_t *cfg; ++ ++ cfg = get_camif(MINOR(f->f_dentry->d_inode->i_rdev)); ++// DPRINTK(" param %s count %d \n",b, c ); ++ ++ switch(*b) { ++ case 'M': ++ setReadMode(b, c); ++ break; ++ case 'B': /* Clear the latch flag of shutter button */ ++ DPRINTK(" clear latch flag of camera's shutter button\n"); ++ sharp_param.CameraStatus[0]='s'; ++ break; ++ case 'Y': /* I don't know how to set Shutter pressed */ ++ DPRINTK(" set latch flag n"); ++ sharp_param.CameraStatus[0]='S'; ++ break; ++ case 'S': /* Camera Image Resolution */ ++ case 'R': /* Donot support Rotation */ ++ DPRINTK(" param %s count %d \n",b, c ); ++ get_options((char *)(b+2), 5, array); ++ if ( array[3] == 512 ) zoom = 2; ++ z_config(cfg, array[1] * zoom , array[2] * zoom ); ++ camif_4fsm_start(cfg); ++ break; ++ case 'C': ++ DPRINTK(" param %s count %d \n",b, c ); ++ DPRINTK(" Start the camera to capture \n"); ++ sharp_param.CameraStatus[2]='C'; ++ camif_4fsm_start(cfg); ++ break; ++ default: ++ printk("Unexpected param %s count %d \n",b, c ); ++ } ++ ++ return c; ++} ++ +Index: linux-2.6.28/arch/arm/mach-s3c2440/camera/qt.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-2.6.28/arch/arm/mach-s3c2440/camera/qt.h 2009-01-02 00:01:56.000000000 +0100 +@@ -0,0 +1,18 @@ ++/* ++ * SW.LEE ++ * ++ * This file is subject to the terms and conditions of the GNU General Public ++ * License 2. See the file COPYING in the main directory of this archive ++ * for more details. ++ */ ++ ++#ifndef __Z_API_H_ ++#define __Z_API_H_ ++ ++extern ssize_t z_read(struct file *f, char *buf, size_t count, loff_t *pos); ++extern ssize_t z_write(struct file *f, const char *b, size_t c, loff_t *pos); ++ ++ ++ ++#endif ++ +Index: linux-2.6.28/arch/arm/mach-s3c2440/camera/s5x532.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-2.6.28/arch/arm/mach-s3c2440/camera/s5x532.h 2009-01-02 00:01:56.000000000 +0100 +@@ -0,0 +1,143 @@ ++/* ++ * 2004 (C) Samsung Electronics ++ * SW.LEE ++ * This file is subject to the terms and conditions of the GNU General Public ++ * License 2. See the file COPYING in the main directory of this archive ++ * for more details. ++ */ ++ ++ ++#ifndef _SMDK2440_S5X532_H_ ++#define _SMDK2440_S5X532_H_ ++ ++ ++#define CHIP_DELAY 0xFF ++ ++typedef struct samsung_t{ ++ unsigned char subaddr; ++ unsigned char value; ++ unsigned char page; ++} s5x532_t; ++ ++s5x532_t s5x532_reg[] = { ++ // page 5 ++ {0xec,0x05}, ++ {0x08,0x55,0x5}, ++ {0x0a,0x75,0x5}, ++ {0x0c,0x90,0x5}, ++ {0x0e,0x18,0x5}, ++ {0x12,0x09,0x5}, ++ {0x14,0x9d,0x5}, ++ {0x16,0x90,0x5}, ++ {0x1a,0x18,0x5}, ++ {0x1c,0x0c,0x5}, ++ {0x1e,0x09,0x5}, ++ {0x20,0x06,0x5}, ++ {0x22,0x20,0x5}, ++ {0x2a,0x00,0x5}, ++ {0x2d,0x04,0x5}, ++ {0x12,0x24,0x5}, ++ // page 3 ++ {0xec,0x03,0x3}, ++ {0x0c,0x09,0x3}, ++ {0x6c,0x09,0x3}, ++ {0x2b,0x10,0x3}, // momo clock inversion ++ // page 2 ++ {0xec,0x02,0x2}, ++ {0x03,0x09,0x2}, ++ {0x05,0x08,0x2}, ++ {0x06,0x01,0x2}, ++ {0x07,0xf8,0x2}, ++ {0x15,0x25,0x2}, ++ {0x30,0x29,0x2}, ++ {0x36,0x12,0x2}, ++ {0x38,0x04,0x2}, ++ {0x1b,0x77,0x2}, // 24MHz : 0x77, 12MHz : 0x22 ++ {0x1c,0x77,0x2}, // 24MHz : 0x77, 12MHz : 0x22 ++ // page 1 ++ {0xec,0x01,0x1}, ++ {0x00,0x03,0x1}, // ++ {0x0a,0x08,0x1}, // 0x0-QQVGA, 0x06-CIF, 0x02-QCIF, 0x08-VGA, 0x04-QVGA, 0x0a-SXGA ++ {0x0c,0x00,0x1}, // Pattern selectio. 0-CIS, 1-Color bar, 2-Ramp, 3-Blue screen ++ {0x10,0x27,0x1}, ++ // 0x21-ITU-R656(CrYCbY), 0x25-ITU-R601(CrYCbY), 0x26-ITU-R601(YCbYCr) ++ {0x50,0x21,0x1}, // Hblank ++ {0x51,0x00,0x1}, // Hblank ++ {0x52,0xA1,0x1}, // Hblank ++ {0x53,0x02,0x1}, // Hblank ++ {0x54,0x01,0x1}, // Vblank ++ {0x55,0x00,0x1}, // Vblank ++ {0x56,0xE1,0x1}, // Vblank ++ {0x57,0x01,0x1}, // Vblank ++ {0x58,0x21,0x1}, // Hsync ++ {0x59,0x00,0x1}, // Hsync ++ {0x5a,0xA1,0x1}, // Hsync ++ {0x5b,0x02,0x1}, // Hsync ++ {0x5c,0x03,0x1}, // Vref ++ {0x5d,0x00,0x1}, // Vref ++ {0x5e,0x05,0x1}, // Vref ++ {0x5f,0x00,0x1}, // Vref ++ {0x70,0x0E,0x1}, ++ {0x71,0xD6,0x1}, ++ {0x72,0x30,0x1}, ++ {0x73,0xDB,0x1}, ++ {0x74,0x0E,0x1}, ++ {0x75,0xD6,0x1}, ++ {0x76,0x18,0x1}, ++ {0x77,0xF5,0x1}, ++ {0x78,0x0E,0x1}, ++ {0x79,0xD6,0x1}, ++ {0x7a,0x28,0x1}, ++ {0x7b,0xE6,0x1}, ++ {0x50,0x00,0x1}, ++ {0x5c,0x00,0x1}, ++ ++ // page 0 ++ {0xec,0x00,0x0}, ++ {0x79,0x01,0x0}, ++ {0x58,0x90,0x0}, ++ {0x59,0xA0,0x0}, ++ {0x5a,0x50,0x0}, ++ {0x5b,0x70,0x0}, ++ {0x5c,0xD0,0x0}, ++ {0x5d,0xC0,0x0}, ++ {0x5e,0x28,0x0}, ++ {0x5f,0x08,0x0}, ++ {0x50,0x90,0x0}, ++ {0x51,0xA0,0x0}, ++ {0x52,0x50,0x0}, ++ {0x53,0x70,0x0}, ++ {0x54,0xD0,0x0}, ++ {0x55,0xC0,0x0}, ++ {0x56,0x28,0x0}, ++ {0x57,0x00,0x0}, ++ {0x48,0x90,0x0}, ++ {0x49,0xA0,0x0}, ++ {0x4a,0x50,0x0}, ++ {0x4b,0x70,0x0}, ++ {0x4c,0xD0,0x0}, ++ {0x4d,0xC0,0x0}, ++ {0x4e,0x28,0x0}, ++ {0x4f,0x08,0x0}, ++ {0x72,0x82,0x0}, // main clock = 24MHz:0xd2, 16M:0x82, 12M:0x54 ++ {0x75,0x05,0x0} // absolute vertical mirror. junon ++ ++}; ++ ++ ++#define S5X532_INIT_REGS (sizeof(s5x532_reg)/sizeof(s5x532_reg[0])) ++#define S5X532_RISC_REGS 0xEB ++#define S5X532_ISP_REGS 0xFB /* S5C7323X */ ++#define S5X532_CIS_REGS 0x2F /* S5K437LA03 */ ++ ++ ++#define PAGE_ADDRESS 0xEC ++ ++//#define S5X532_REGS (S5X532_RISC_REGS+S5X532_ISP_REGS+S5X532_CIS_REGS) ++#define S5X532_REGS (0x1000) ++ ++ ++ ++#endif ++ ++ +Index: linux-2.6.28/arch/arm/mach-s3c2440/camera/s5x532_rev36.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-2.6.28/arch/arm/mach-s3c2440/camera/s5x532_rev36.h 2009-01-02 00:01:56.000000000 +0100 +@@ -0,0 +1,208 @@ ++/* ++ * 2004 (C) Samsung Electronics ++ * SW.LEE ++ * This file is subject to the terms and conditions of the GNU General Public ++ * License 2. See the file COPYING in the main directory of this archive ++ * for more details. ++ */ ++ ++ ++#ifndef _SMDK2440_S5X532_H_ ++#define _SMDK2440_S5X532_H_ ++ ++ ++#define CHIP_DELAY 0xFF ++ ++typedef struct samsung_t{ ++ unsigned char subaddr; ++ unsigned char value; ++ unsigned char page; ++} s5x532_t; ++ ++s5x532_t s5x532_reg[] = { ++ ++ //=============== page0 ===============// ++ {0xec,0x00,0x00}, ++ {0x02,0x00,0x00}, ++ {0x14,0x60,0x00}, ++ {0x15,0x60,0x00}, ++ {0x16,0x60,0x00}, ++ {0x1b,0x20,0x00}, ++ {0x1c,0x20,0x00}, ++ {0x1d,0x20,0x00}, ++ {0x1e,0x20,0x00}, ++ {0x72,0xdc,0x00}, ++ {0x73,0x11,0x00}, ++ {0x76,0x82,0x00}, ++ {0x77,0x90,0x00}, ++ {0x78,0x6c,0x00}, ++ {0x0a,0x02,0x00}, ++ {0x34,0x0d,0x00}, ++ {0x35,0x0a,0x00}, ++ {0x36,0x05,0x00}, ++ {0x37,0x05,0x00}, ++ {0x38,0x06,0x00}, ++ {0x39,0x08,0x00}, ++ {0x3A,0x0d,0x00}, ++ {0x3B,0x0d,0x00}, ++ {0x3C,0x18,0x00}, ++ {0x3D,0xE0,0x00}, ++ {0x3E,0x20,0x00}, ++ {0x66,0x02,0x00}, ++ {0x6c,0x40,0x00}, ++ {0x7c,0x01,0x00}, ++ {0x0D,0x24,0x00}, ++ {0x40,0x1B,0x00}, ++ {0x41,0x4F,0x00}, ++ {0x42,0x24,0x00}, ++ {0x43,0x3E,0x00}, ++ {0x44,0x32,0x00}, ++ {0x45,0x30,0x00}, ++ {0x48,0xa0,0x00}, ++ {0x49,0xd0,0x00}, ++ {0x4A,0x28,0x00}, ++ {0x4B,0x7d,0x00}, ++ {0x4C,0xd0,0x00}, ++ {0x4D,0xe0,0x00}, ++ {0x4E,0x1a,0x00}, ++ {0x4F,0xa0,0x00}, ++ {0x50,0xc0,0x00}, ++ {0x51,0xc0,0x00}, ++ {0x52,0x42,0x00}, ++ {0x53,0x7e,0x00}, ++ {0x54,0xc0,0x00}, ++ {0x55,0xf0,0x00}, ++ {0x56,0x1e,0x00}, ++ {0x57,0xe0,0x00}, ++ {0x58,0xc0,0x00}, ++ {0x59,0xa0,0x00}, ++ {0x5A,0x4a,0x00}, ++ {0x5B,0x7e,0x00}, ++ {0x5C,0xc0,0x00}, ++ {0x5D,0xf0,0x00}, ++ {0x5E,0x2a,0x00}, ++ {0x5F,0x10,0x00}, ++ {0x79,0x00,0x00}, ++ {0x7a,0x00,0x00}, ++ {0xe0,0x0f,0x00}, ++ {0xe3,0x14,0x00}, ++ {0xe5,0x48,0x00}, ++ {0xe7,0x58,0x00}, ++ ++ //=============== page1 ===============// ++ {0xec,0x01,0x01}, ++ {0x10,0x05,0x01}, ++ {0x20,0xde,0x01}, ++ {0x0b,0x06,0x01}, ++ {0x30,0x00,0x01}, ++ {0x31,0x00,0x01}, ++ {0x32,0x00,0x01}, ++ {0x24,0x28,0x01}, ++ {0x25,0x3F,0x01}, ++ {0x26,0x65,0x01}, ++ {0x27,0xA1,0x01}, ++ {0x28,0xFF,0x01}, ++ {0x29,0x96,0x01}, ++ {0x2A,0x85,0x01}, ++ {0x2B,0xFF,0x01}, ++ {0x2C,0x00,0x01}, ++ {0x2D,0x1B,0x01}, ++ {0xB0,0x28,0x01}, ++ {0xB1,0x3F,0x01}, ++ {0xB2,0x65,0x01}, ++ {0xB3,0xA1,0x01}, ++ {0xB4,0xFF,0x01}, ++ {0xB5,0x96,0x01}, ++ {0xB6,0x85,0x01}, ++ {0xB7,0xFF,0x01}, ++ {0xB8,0x00,0x01}, ++ {0xB9,0x1B,0x01}, ++ {0x15,0x15,0x01}, ++ {0x18,0x85,0x01}, ++ {0x1f,0x05,0x01}, ++ {0x87,0x40,0x01}, ++ {0x37,0x60,0x01}, ++ {0x38,0xd5,0x01}, ++ {0x48,0xa0,0x01}, ++ {0x61,0x54,0x01}, ++ {0x62,0x54,0x01}, ++ {0x63,0x14,0x01}, ++ {0x64,0x14,0x01}, ++ {0x6d,0x12,0x01}, ++ {0x78,0x09,0x01}, ++ {0x79,0xD7,0x01}, ++ {0x7A,0x14,0x01}, ++ {0x7B,0xEE,0x01}, ++ ++ //=============== page2 ===============// ++ {0xec,0x02,0x02}, ++ {0x2c,0x76,0x02}, ++ {0x25,0x25,0x02}, ++ {0x27,0x27,0x02}, ++ {0x30,0x29,0x02}, ++ {0x36,0x08,0x02}, ++ {0x38,0x04,0x02}, ++ ++ //=============== page3 ===============// ++ {0xec,0x03,0x03}, ++ {0x08,0x00,0x03}, ++ {0x09,0x33,0x03}, ++ ++ //=============== page4 ===============// ++ {0xec,0x04,0x04}, ++ {0x00,0x21,0x04}, ++ {0x01,0x00,0x04}, ++ {0x02,0x9d,0x04}, ++ {0x03,0x02,0x04}, ++ {0x04,0x04,0x04}, ++ {0x05,0x00,0x04}, ++ {0x06,0x1f,0x04}, ++ {0x07,0x02,0x04}, ++ {0x08,0x21,0x04}, ++ {0x09,0x00,0x04}, ++ {0x0a,0x9d,0x04}, ++ {0x0b,0x02,0x04}, ++ {0x0c,0x04,0x04}, ++ {0x0d,0x00,0x04}, ++ {0x0e,0x20,0x04}, ++ {0x0f,0x02,0x04}, ++ {0x1b,0x3c,0x04}, ++ {0x1c,0x3c,0x04}, ++ ++ //=============== page5 ===============// ++ {0xec,0x05,0x05}, ++ {0x1f,0x00,0x05}, ++ {0x08,0x59,0x05}, ++ {0x0a,0x71,0x05}, ++ {0x1e,0x23,0x05}, ++ {0x0e,0x3c,0x05}, ++ ++ //=============== page7 ===============// ++ {0xec,0x07,0x07}, ++ {0x11,0xfe,0x07}, ++ ++ // added by junon ++ {0xec,0x01,0x07}, ++ {0x10,0x26,0x07}, ++ // 0x21-ITU-R656(CbYCrY), 0x25-ITU-R601(CbYCrY), 0x26-ITU-R601(YCrYCb) ++ ++ ++}; ++ ++ ++#define S5X532_INIT_REGS (sizeof(s5x532_reg)/sizeof(s5x532_reg[0])) ++#define S5X532_RISC_REGS 0xEB ++#define S5X532_ISP_REGS 0xFB /* S5C7323X */ ++#define S5X532_CIS_REGS 0x2F /* S5K437LA03 */ ++ ++ ++#define PAGE_ADDRESS 0xEC ++ ++//#define S5X532_REGS (S5X532_RISC_REGS+S5X532_ISP_REGS+S5X532_CIS_REGS) ++#define S5X532_REGS (0x1000) ++ ++ ++ ++#endif ++ ++ +Index: linux-2.6.28/arch/arm/mach-s3c2440/camera/sensor.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-2.6.28/arch/arm/mach-s3c2440/camera/sensor.h 2009-01-02 00:01:56.000000000 +0100 +@@ -0,0 +1,20 @@ ++/* ++ * ++ * Copyright (C) 2004 Samsung Electronics ++ * SW.LEE ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation. ++ */ ++ ++#ifndef __SENSOR_CMD_H_ ++#define __SENSOR_CMD_H_ ++ ++#include "bits.h" ++ ++#define SENSOR_INIT BIT0 ++#define USER_ADD BIT1 ++#define USER_EXIT BIT2 ++ ++#endif +Index: linux-2.6.28/arch/arm/mach-s3c2440/camera/sxga.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-2.6.28/arch/arm/mach-s3c2440/camera/sxga.h 2009-01-02 00:01:56.000000000 +0100 +@@ -0,0 +1,504 @@ ++/* ++ * 2004 (C) Samsung Electronics ++ * SW.LEE ++ * This file is subject to the terms and conditions of the GNU General Public ++ * License 2. See the file COPYING in the main directory of this archive ++ * for more details. ++ */ ++ ++ ++#ifndef _SAMSUNG_SXGA_H_ ++#define _SAMSUNG_SXGA_H_ ++ ++ ++#define CHIP_DELAY 0xFF ++ ++typedef struct samsung_t{ ++ unsigned char subaddr; ++ unsigned char value; ++ unsigned char page; ++} s5x532_t; ++ ++s5x532_t s5x532_reg[] = { ++ // page 0 ++ {0xec,0x00,0x0}, ++ {0x0c,0x38,0x0}, ++ {0x0d,0x24,0x0}, ++ {0x13,0x10,0x0}, ++ {0x14,0x10,0x0}, ++ {0x15,0x10,0x0}, ++ {0x16,0x10,0x0}, ++ {0x17,0x20,0x0}, ++ {0x18,0x30,0x0}, ++ {0x19,0x30,0x0}, ++ {0x1a,0x10,0x0}, ++ {0x1b,0x10,0x0}, ++ ++ {0x2d,0x40,0x0}, ++ {0x3e,0x10,0x0}, ++ {0x34,0x0a,0x0}, ++ {0x39,0x04,0x0}, ++ {0x3a,0x02,0x0}, ++ {0x31,0x05,0x0}, ++ ++ {0x40,0x1d,0x0}, ++ {0x41,0x50,0x0}, ++ {0x42,0x24,0x0}, ++ {0x43,0x3f,0x0}, ++ {0x44,0x30,0x0}, ++ {0x45,0x31,0x0}, ++ ++ {0x48,0xa0,0x0}, ++ {0x49,0xc0,0x0}, ++ {0x4a,0x58,0x0}, ++ {0x4b,0x50,0x0}, ++ {0x4c,0xb0,0x0}, ++ {0x4d,0xc0,0x0}, ++ {0x4e,0x30,0x0}, ++ {0x4f,0x20,0x0}, ++ ++ {0x50,0xa0,0x0}, ++ {0x51,0xc0,0x0}, ++ {0x52,0x50,0x0}, ++ {0x53,0x60,0x0}, ++ {0x54,0xb0,0x0}, ++ {0x55,0xc0,0x0}, ++ {0x56,0x20,0x0}, ++ {0x57,0x08,0x0}, ++// {0x72,0x50,0x0}, // Clock 16 ++ {0x72,0x78,0x0}, // Clock 24Mhz ++// {0x72,0xf0,0x0}, // Clock 48Mhz ++ // page 1 ++ {0xec,0x01,0x1}, ++ {0x10,0x17,0x1}, // ITU-R601 ++ /* ++ [3:2] : out_sel ++ 00 : 656 ++ 01 : 601 ++ 10 : RGB ++ 11 : CIS ++ [1] : YC_SEL ++ [0] : CBCR_SEL ++ */ ++ ++ {0x0b,0x06,0x1}, // 6 ++ {0x20,0xa8,0x1}, //b0); // Highlight C Supp 040215 ++ {0x22,0x26,0x1}, //2f); 040225 ++ ++ {0x24,0x08,0x1}, //00); //1F); 040226 ++ {0x25,0x10,0x1}, //10); //34); ++ {0x26,0x40,0x1}, //56); ++ {0x27,0x80,0x1}, //8D); ++ {0x28,0x2c,0x1}, //E7); ++ {0x29,0xd6,0x1}, //7C); ++ {0x2A,0x0c,0x1}, //70); ++ {0x2B,0xFF,0x1}, //FF); ++ {0x2C,0x00,0x1}, //00); ++ {0x2D,0x5f,0x1}, //1B); ++ // ++ {0xB0,0x08,0x1}, //00); //1F); 040226 ++ {0xB1,0x10,0x1}, //10); //34);50 ++ {0xB2,0x40,0x1}, //36); ++ {0xB3,0x80,0x1}, //6D); ++ {0xB4,0x2c,0x1}, //b7); ++ {0xB5,0xd6,0x1}, //7C); ++ {0xB6,0x0c,0x1}, //70); ++ {0xB7,0xFF,0x1}, //FF); ++ {0xB8,0x00,0x1}, //00); ++ {0xB9,0x5f,0x1}, //1B); ++ ++ ++ {0xc2,0x01,0x1}, // shading On ++ {0xc3,0x80,0x1}, ++ {0xc4,0x02,0x1}, ++ {0xc5,0x00,0x1}, ++ {0xc6,0x01,0x1}, ++ {0xc7,0x00,0x1}, ++ {0xc8,0x05,0x1}, ++ {0xc9,0x00,0x1}, ++ {0xca,0x04,0x1}, ++ ++ // shading 5 ++ {0xd0,0xb5,0x1}, ++ {0xd1,0x9c,0x1}, ++ {0xd2,0x8d,0x1}, ++ {0xd3,0x84,0x1}, ++ {0xd4,0x84,0x1}, ++ {0xd5,0x91,0x1}, ++ {0xd6,0xa0,0x1}, ++ {0xd7,0xb5,0x1}, ++ ++ {0xd8,0xc0,0x1}, ++ {0xd9,0xa6,0x1}, ++ {0xda,0x93,0x1}, ++ {0xdb,0x85,0x1}, ++ {0xdc,0x85,0x1}, ++ {0xdd,0x90,0x1}, ++ {0xde,0xa0,0x1}, ++ {0xdf,0xb8,0x1}, ++ ++ // Page 2 ++ {0xec,0x02,0x02}, ++ ++ {0x2d,0x02,0x02}, ++ {0x20,0x13,0x02}, ++ {0x21,0x13,0x2}, ++ {0x22,0x13,0x2}, ++ {0x23,0x13,0x2}, ++ {0x2e,0x85,0x2}, ++ {0x2f,0x34,0x2}, ++ {0x30,0x00,0x2}, ++ {0x28,0x94,0x2}, ++ ++ ++ // page 3 ++ {0xec,0x03,0x03}, ++ {0x10,0x00,0x3}, ++ {0x20,0x00,0x3}, ++ {0x21,0x20,0x3}, ++ {0x22,0x00,0x3}, ++ {0x23,0x00,0x3}, ++ {0x40,0x20,0x3}, ++ {0x41,0x20,0x3}, ++ {0x42,0x20,0x3}, ++ {0x43,0x20,0x3}, ++ {0x60,0x00,0x3}, ++ {0x61,0x00,0x3}, ++ {0x62,0x00,0x3}, ++ {0x63,0x00,0x3}, ++ {0x64,0x04,0x3}, ++ {0x65,0x1C,0x3}, ++ {0x66,0x05,0x3}, ++ {0x67,0x1C,0x3}, ++ {0x68,0x00,0x3}, ++ {0x69,0x2D,0x3}, ++ {0x6a,0x00,0x3}, ++ {0x6b,0x72,0x3}, ++ {0x6c,0x00,0x3}, ++ {0x6d,0x00,0x3}, ++ {0x6e,0x16,0x3}, // 2.38 ++ {0x6f,0x16,0x3}, // 2.38 ++ {0x70,0x00,0x3}, ++ {0x71,0x00,0x3}, ++ {0x72,0x45,0x3}, ++ {0x73,0x00,0x3}, ++ {0x74,0x1C,0x3}, ++ {0x75,0x05,0x3}, ++ ++ {0x80,0x00,0x3}, //for 0.02 _ 44 ++ {0x81,0x00,0x3}, ++ {0x82,0x00,0x3}, ++ {0x83,0x00,0x3}, ++ {0x84,0x04,0x3}, ++ {0x85,0x1c,0x3}, ++ {0x86,0x05,0x3}, ++ {0x87,0x1c,0x3}, ++ {0x88,0x00,0x3}, ++ {0x89,0x2d,0x3}, ++ {0x8a,0x00,0x3}, ++ {0x8b,0xcc,0x3}, ++ {0x8c,0x00,0x3}, ++ {0x8d,0x00,0x3}, ++ {0x8e,0x08,0x3}, ++ {0x8f,0x08,0x3}, ++ {0x90,0x01,0x3}, ++ {0x91,0x00,0x3}, ++ {0x92,0x91,0x3}, ++ {0x93,0x00,0x3}, ++ {0x94,0x88,0x3}, ++ {0x95,0x02,0x3}, ++ ++ ++ ++ // page 4 ++ {0xec,0x04,0x04}, ++ {0x3f,0x09,0x04}, // VGA : old board :0x08 , new board ; 0X09 ++ {0x18,0x00,0x04}, // sxga ++ {0x1c,0x41,0x04}, ++ {0x20,0x41,0x04}, // vga center 040215 ++ {0x22,0xc1,0x04},// a1); ++ {0x23,0x02,0x04}, ++ {0x28,0x41,0x04}, ++ {0x2a,0xc1,0x04},// a1); ++ {0x2b,0x02,0x04}, ++ ++ {0x3c,0x0b,0x04}, //f); // vga ++ {0x58,0x11,0x04}, ++ {0x5c,0x14,0x04}, ++ {0x60,0x21,0x04}, ++ {0x61,0x00,0x04}, ++ {0x62,0xB1,0x04}, ++ {0x63,0x02,0x04}, ++ {0x64,0x01,0x04}, ++ {0x65,0x00,0x04}, ++ {0x66,0x01,0x04}, ++ {0x67,0x02,0x04}, ++ {0x68,0x21,0x04}, ++ {0x69,0x00,0x04}, ++ {0x6a,0xB1,0x04}, ++ {0x6b,0x02,0x04}, ++ {0x6c,0x01,0x04}, ++ {0x6d,0x00,0x04}, ++ {0x6e,0x01,0x04}, ++ {0x6f,0x02,0x04}, ++ {0x70,0x2D,0x04}, ++ {0x71,0x00,0x04}, ++ {0x72,0xd3,0x04}, // 14 ++ {0x73,0x05,0x04}, // 15 ++ {0x74,0x1C,0x04}, ++ {0x75,0x05,0x04}, ++ {0x76,0x1b,0x04}, // HendL ++ {0x77,0x0b,0x04}, // HendH ++ {0x78,0x01,0x04}, // 5.00 ++ {0x79,0x80,0x04}, // 5.2a ++ {0x7a,0x33,0x04}, ++ {0x7b,0x00,0x04}, ++ {0x7c,0x38,0x04}, // 5.0e ++ {0x7d,0x03,0x04}, ++ {0x7e,0x00,0x04}, ++ {0x7f,0x0A,0x04}, ++ ++ {0x80,0x2e,0x04}, ++ {0x81,0x00,0x04}, ++ {0x82,0xae,0x04}, ++ {0x83,0x02,0x04}, ++ {0x84,0x00,0x04}, ++ {0x85,0x00,0x04}, ++ {0x86,0x01,0x04}, ++ {0x87,0x02,0x04}, ++ {0x88,0x2e,0x04}, ++ {0x89,0x00,0x04}, ++ {0x8a,0xae,0x04}, ++ {0x8b,0x02,0x04}, ++ {0x8c,0x1c,0x04}, ++ {0x8d,0x00,0x04}, ++ {0x8e,0x04,0x04}, ++ {0x8f,0x02,0x04}, ++ {0x90,0x2d,0x04}, ++ {0x91,0x00,0x04}, ++ {0x92,0xa5,0x04}, ++ {0x93,0x00,0x04}, ++ {0x94,0x88,0x04}, ++ {0x95,0x02,0x04}, ++ {0x96,0xb3,0x04}, ++ {0x97,0x06,0x04}, ++ {0x98,0x01,0x04}, ++ {0x99,0x00,0x04}, ++ {0x9a,0x33,0x04}, ++ {0x9b,0x30,0x04}, ++ {0x9c,0x50,0x04}, ++ {0x9d,0x30,0x04}, ++ {0x9e,0x01,0x04}, ++ {0x9f,0x08,0x04}, ++ ++ // page 5 ++ {0xec,0x05,0x05}, ++ {0x5a,0x22,0x05}, ++ ++ // page 6 ++ {0xec,0x06,0x06}, ++ {0x14,0x1e,0x06}, ++ {0x15,0xb4,0x04}, ++ {0x16,0x25,0x04}, ++ {0x17,0x74,0x04}, ++ ++ {0x10,0x48,0x04}, ++ {0x11,0xa0,0x04}, ++ {0x12,0x40,0x04}, // 040216 AE1 window ÁÙÀÓ ++ {0x13,0x70,0x04}, ++ ++ {0x1a,0x29,0x04}, // 040217 AWB window ÁÙÀÓ ++ {0x30,0x40,0x04}, ++ {0x31,0xa2,0x04}, ++ {0x32,0x50,0x04}, ++ {0x33,0xbc,0x04}, ++ {0x34,0x10,0x04}, ++ {0x35,0xd2,0x04}, ++ {0x36,0x18,0x04}, ++ {0x37,0xf5,0x04}, ++ {0x38,0x10,0x04}, ++ {0x39,0xd3,0x04}, ++ {0x3a,0x1a,0x04}, ++ {0x3b,0xf0,0x04}, ++ ++ // page 7 ++ {0xec,0x07,0x07}, ++ {0x08,0xff,0x7}, ++ {0x38,0x01,0x7}, //07); 040315 ++ {0x39,0x01,0x7}, //02); //4); 040223 040315 ++ {0x11,0xfe,0x7}, //fe); // green -2 040303 ++ {0x2a,0x20,0x7}, ++ {0x2b,0x20,0x7}, ++ {0x2c,0x10,0x7}, ++ {0x2d,0x00,0x7}, ++ {0x2e,0xf0,0x7}, ++ {0x2f,0xd0,0x7}, ++ {0x3a,0xf0,0x7}, ++ {0x23,0x07,0x7}, // for ESD ++ ++ // page 0 ++ {0xec,0x00,0x00}, ++ {0x8a,0x04,0x00}, ++ ++ // page 1 ++ {0xec,0x01,0x01}, ++ {0xe5,0xb0,0x01}, ++ {0xe5,0xb0,0x01}, ++ {0xc2,0x01,0x01}, ++ ++ {0x61,0x7b,0x01}, ++ {0x62,0x7b,0x01}, ++ {0x63,0x1b,0x01}, ++ {0x64,0x1b,0x01}, ++ ++ // page 0 ++ {0xec,0x00,0x00}, ++ {0x7e,0x04,0x00}, ++ ++ // page 4 ++ {0xec,0x04,0x04}, ++ {0x04,0x02,0x04}, ++ {0x06,0x02,0x04}, ++ ++ // page 1 ++ {0xec,0x01,0x01}, ++ {0x10,0x05,0x01}, ++ {0x54,0x02,0x01}, ++ {0x56,0x02,0x01}, ++ ++ // page 3 ++ {0xec,0x03,0x03}, ++ {0x0e,0x08,0x03}, ++ {0x0f,0x08,0x03}, ++ ++ // page 4 ++ {0xec,0x04,0x04}, ++ {0x00,0x30,0x04}, ++ {0x0a,0x30,0x04}, ++ ++ // page 5 ++ {0xec,0x05,0x05}, ++ {0x08,0x33,0x05}, ++ ++ // page 0 ++ {0xec,0x00,0x00}, ++ {0x02,0x00,0x00}, ++ ++ // page 4 ++//scale out ++ {0xec,0x04,0x04}, ++ {0x02,0x20,0x04}, ++ {0x1c,0x4f,0x04}, ++ ++ // page 1 ++ {0xec,0x01,0x01}, ++ {0x52,0x20,0x01}, ++ ++ // page 5 ++ {0xec,0x05,0x05}, ++ {0x0e,0x4f,0x05}, ++ ++//ae speed ++ // page 0 ++ {0xec,0x00,0x00}, ++ {0x92,0x80,0x00}, ++ {0x93,0x02,0x00}, ++ {0x94,0x04,0x00}, ++ {0x95,0x04,0x00}, ++ {0x96,0x04,0x00}, ++ {0x97,0x04,0x00}, ++ {0x9b,0x47,0x00}, ++ ++ {0xec,0x00,0x00}, ++ {0x40,0x17,0x00}, ++ {0x41,0x4c,0x00}, ++ {0x42,0x1d,0x00}, ++ {0x43,0x3e,0x00}, ++ {0x44,0x2a,0x00}, ++ {0x45,0x2d,0x00}, ++ ++ {0xec,0x01,0x01}, ++ {0x20,0xd0,0x01}, //high light color reference ++ ++ {0xec,0x00,0x00}, ++ {0x7e,0x00,0x00}, ++ {0x73,0x11,0x00}, // 41 ++ {0x78,0x78,0x00}, ++ ++ {0xec,0x07,0x07}, ++ {0x1b,0x3e,0x07}, ++ ++ {0xec,0x00,0x00}, ++ {0x48,0xA0,0x00}, //s48C0 ++ {0x49,0xB0,0x00}, //s49B0 ++ {0x4a,0x30,0x00}, //s4a20 ++ {0x4b,0x70,0x00}, //s4b70 ++ {0x4c,0xD0,0x00}, //s4cA0 ++ {0x4d,0xB0,0x00}, //s4dB0 ++ {0x4e,0x30,0x00}, //s4e30 ++ {0x4f,0xF0,0x00}, //s4fF0 ++ {0x50,0xA0,0x00}, //s50D0 ++ {0x51,0xB0,0x00}, //s51B0 ++ {0x52,0x25,0x00}, //s5210 ++ {0x53,0x70,0x00}, //s5370 ++ {0x54,0xD0,0x00}, //s5490 ++ {0x55,0xD0,0x00}, //s55B0 ++ {0x56,0x3A,0x00}, //s5640 ++ {0x57,0xD0,0x00}, //s57D0 ++ {0x58,0xA0,0x00}, //s58D0 ++ {0x59,0xA0,0x00}, //s59B0 ++ {0x5a,0x32,0x00}, //s5a0A ++ {0x5b,0x7A,0x00}, //s5b7A ++ {0x5c,0xB0,0x00}, //s5c90 ++ {0x5d,0xC0,0x00}, //s5dC0 ++ {0x5e,0x3E,0x00}, //s5e4A ++ {0x5f,0xfa,0x00}, //s5fD0 ++ ++ // gamma ++ {0xec,0x01,0x01}, ++ {0x24,0x31,0x01}, ++ {0x25,0x4C,0x01}, ++ {0x26,0x75,0x01}, ++ {0x27,0xB5,0x01}, ++ {0x28,0x17,0x01}, ++ {0x29,0xAE,0x01}, ++ {0x2A,0x97,0x01}, ++ {0x2B,0xFF,0x01}, ++ {0x2C,0x00,0x01}, ++ {0x2D,0x5B,0x01}, ++ ++ {0xB0,0x31,0x01}, ++ {0xB1,0x4C,0x01}, ++ {0xB2,0x75,0x01}, ++ {0xB3,0xB5,0x01}, ++ {0xB4,0x17,0x01}, ++ {0xB5,0xAE,0x01}, ++ {0xB6,0x97,0x01}, ++ {0xB7,0xFF,0x01}, ++ {0xB8,0x00,0x01}, ++ {0xB9,0x5B,0x01}, ++ ++ {0xec,0x00,0x00}, ++ {0x77,0xb0,0x00}, ++ {0x39,0x06,0x00}, ++ {0x3a,0x08,0x00}, ++ ++}; ++ ++ ++#define S5X532_INIT_REGS (sizeof(s5x532_reg)/sizeof(s5x532_reg[0])) ++#define S5X532_RISC_REGS 0xEB ++#define S5X532_ISP_REGS 0xFB /* S5C7323X */ ++#define S5X532_CIS_REGS 0x2F /* S5K437LA03 */ ++ ++ ++#define PAGE_ADDRESS 0xEC ++ ++//#define S5X532_REGS (S5X532_RISC_REGS+S5X532_ISP_REGS+S5X532_CIS_REGS) ++#define S5X532_REGS (0x1000) ++ ++ ++ ++#endif ++ ++ +Index: linux-2.6.28/arch/arm/mach-s3c2440/camera/userapp.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-2.6.28/arch/arm/mach-s3c2440/camera/userapp.h 2009-01-02 00:01:56.000000000 +0100 +@@ -0,0 +1,44 @@ ++/* ++ Character Driver API Interface ++ ++ Copyright (C) 2003 Samsung Electronics (SW.LEE: hitchcar@samsung.com) ++ ++ This program is free software; you can redistribute it and/or modify ++ it under the terms of the GNU General Public License as published by ++ the Free Software Foundation; either version 2 of the License, or ++ (at your option) any later version. ++ ++*/ ++ ++#ifndef __FIMC20_CAMIF_USR_APP_H_ ++#define __FIMC20_CAMIF_USR_APP_H_ ++ ++ ++/* ++ * IOCTL Command for Character Driver ++ */ ++ ++#define CMD_CAMERA_INIT 0x23 ++/* Test Application Usage */ ++typedef struct { ++ int src_x; ++ int src_y; ++ int dst_x; ++ int dst_y; ++ int bpp; ++ int flip; ++} camif_param_t; ++ ++ ++ ++#endif ++ ++ ++/* ++ * Local variables: ++ * tab-width: 8 ++ * c-indent-level: 8 ++ * c-basic-offset: 8 ++ * c-set-style: "K&R" ++ * End: ++ */ +Index: linux-2.6.28/arch/arm/mach-s3c2440/camera/v4l2_api.c +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-2.6.28/arch/arm/mach-s3c2440/camera/v4l2_api.c 2009-01-02 00:01:56.000000000 +0100 +@@ -0,0 +1,311 @@ ++/* ++ * . 2004-01-03: SW.LEE ++ * ++ * This file is subject to the terms and conditions of the GNU General Public ++ * License 2. See the file COPYING in the main directory of this archive ++ * for more details. ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include ++#include ++#include ++#include ++ ++#include ++#include ++ ++#include "camif.h" ++#include "videodev.h" ++ ++/* ++ Codec_formats/Preview_format[0] must be same to initial value of ++ preview_init_param/codec_init_param ++*/ ++ ++const struct v4l2_fmtdesc codec_formats[] = { ++ { ++ .index = 0, ++ .type = V4L2_BUF_TYPE_VIDEO_CAPTURE, ++// .flags = FORMAT_FLAGS_PLANAR, ++ .description = "4:2:2, planar, Y-Cb-Cr", ++ .pixelformat = V4L2_PIX_FMT_YUV422P, ++ ++ },{ ++ .index = 1, ++ .type = V4L2_BUF_TYPE_VIDEO_CAPTURE, ++// .flags = FORMAT_FLAGS_PLANAR, ++ .name = "4:2:0, planar, Y-Cb-Cr", ++ .fourcc = V4L2_PIX_FMT_YUV420, ++ } ++}; ++ ++ ++/* Todo ++ FIMC V4L2_PIX_FMT_RGB565 is not same to that of V4L2spec ++ and so we need image convert to FIMC V4l2_PIX_FMT_RGB565. ++*/ ++const struct v4l2_fmtdesc preview_formats[] = { ++ { ++ .index = 1, ++ .type = V4L2_BUF_TYPE_VIDEO_CAPTURE, ++ .description = "16 bpp RGB, le", ++ .fourcc = V4L2_PIX_FMT_RGB565, ++// .flags = FORMAT_FLAGS_PACKED, ++ }, ++ { ++ .index = 0, ++ .type = V4L2_BUF_TYPE_VIDEO_CAPTURE, ++// .flags = FORMAT_FLAGS_PACKED, ++ .description = "32 bpp RGB, le", ++ .fourcc = V4L2_PIX_FMT_BGR32, ++ } ++} ++ ++#define NUM_F ARRARY_SIZE(preview_formats) ++ ++ ++/* ++ * This function and v4l2 structure made for V4L2 API functions ++ * App <--> v4l2 <--> logical param <--> hardware ++ */ ++static int camif_get_v4l2(camif_cfg_t *cfg) ++{ ++ return 0; ++} ++ ++ ++/* ++** Gives the depth of a video4linux2 fourcc aka pixel format in bits. ++*/ ++static int pixfmt2depth(int pixfmt,int *fmtptr) ++{ ++ int fmt, depth; ++ ++ switch (pixfmt) { ++ case V4L2_PIX_FMT_RGB565: ++ case V4L2_PIX_FMT_RGB565X: ++ fmt = CAMIF_RGB_16; ++ depth = 16; ++ break; ++ case V4L2_PIX_FMT_BGR24: /* Not tested */ ++ case V4L2_PIX_FMT_RGB24: ++ fmt = CAMIF_RGB_24; ++ depth = 24; ++ break; ++ case V4L2_PIX_FMT_BGR32: ++ case V4L2_PIX_FMT_RGB32: ++ fmt = CAMIF_RGB_24; ++ depth 32; ++ break; ++ case V4L2_PIX_FMT_GREY: /* Not tested */ ++ fmt = CAMIF_OUT_YCBCR420; ++ depth = 8; ++ break; ++ case V4L2_PIX_FMT_YUYV: ++ case V4L2_PIX_FMT_UYVY: ++ case V4L2_PIX_FMT_YUV422P: ++ fmt = CAMIF_OUT_YCBCR422; ++ depth = 16; ++ break; ++ case V4L2_PIX_FMT_YUV420: ++ fmt = CAMIF_OUT_YCBCR420; ++ depth = 12; ++ break; ++ } ++ if (fmtptr) *fmtptr = fmt; ++ return depth; ++} ++ ++ ++ ++static int camif_s_v4l2(camif_cfg_t *cfg) ++{ ++ int num = cfg->v2.used_fmt; ++ ++ if ( !(cfg->v2.status&CAMIF_V4L2_INIT)) { ++ int depth; ++ int fourcc = v2.fmtdesc[num].pixelformat; ++ ++ /* To define v4l2_fmtsdesc */ ++ if (cfg->dma_type == CAMIF_CODEC) ++ cfg->v2->fmtdesc = codec_formats; ++ else ++ cfg->v2->fmtdesc = preview_formats; ++ ++ /* To define v4l2_format used currently */ ++ cfg->v2.fmt.width = cfg->target_x; ++ cfg->v2.fmt.height = cfg->target_y; ++ cfg->v2.fmt.field = V4L2_FIELD_NONE; ++ cfg->v2.fmt.pixelformat = fourcc; ++ depth = pixfmt2depth(fourcc,NULL); ++ cfg->v2.fmt.bytesperline= cfg->v2.fmt.width*depth >> 3; ++ cfg->v2.fmt.sizeimage = ++ cfg->v2.fmt.height * cfg->v2.fmt.bytesperline; ++ ++ /* To define v4l2_input */ ++ cfg->v2.input.index = 0; ++ if (cfg->dma_type == CAMIF_CODEC) ++ snprintf(cfg->v2.input.name, 31, "CAMIF CODEC"); ++ else ++ snprintf(cfg->v2.input.name, 31, "CAMIF PREVIEW"); ++ cfg->v2.input.type = V4L2_INPUT_TYPE_CAMERA; ++ ++ /* Write the Status of v4l2 machine */ ++ cfg->v2.status |= CAMIF_V4L2_INIT; ++ } ++ return 0; ++} ++ ++ ++static int camif_g_fmt(camif_cfg_t *cfg, struct v4l2_format *f) ++{ ++ int size = sizeof(struct v4l2_pix_format); ++ ++ switch (f->type) { ++ case V4L2_BUF_TYPE_VIDEO_CAPTURE: ++ memset(&f->fmt.pix,0,size); ++ memcpy(&f->fmt.pix,&cfg->v2.fmt,size); ++ return 0; ++ default: ++ return -EINVAL; ++ } ++} ++ ++ ++/* Copy v4l2 parameter into other element of camif_cfg_t */ ++static int camif_s_try(camif_cfg_t *cfg, int f) ++{ ++ int fmt; ++ cfg->target_x = cfg->v2.fmt.width; ++ cfg->target_y = cfg->v2.fmt.height; ++ pixfmt2depth(cfg->v2.fmt.pixelformat,&fmt); ++ cfg->fmt = fmt; ++ camif_dynamic_conf(cfg); ++} ++ ++ ++static int camif_s_fmt(camif_cfg_t *cfg, struct v4l2_format *f) ++{ ++ int retval; ++ ++ switch (f->type) { ++ case V4L2_BUF_TYPE_VIDEO_CAPTURE: ++ { ++ /* update our state informations */ ++// down(&fh->cap.lock); ++ cfg->v2.fmt = f->pix; ++ cfg->v2.status |= CAMIF_v4L2_DIRTY; ++ camif_dynamic_conf(cfg); ++ cfg->v2.status &= ~CAMIF_v4L2_DIRTY; /* dummy ? */ ++// up(&fh->cap.lock); ++ ++ return 0; ++ } ++ default: ++ return -EINVAL; ++ } ++ ++} ++ ++/* Refer ioctl of videodeX.c and bttv-driver.c */ ++int camif_do_ioctl ++(struct inode *inode, struct file *file,unsigned int cmd, void * arg) ++{ ++ camif_cfg_t *cfg = file->private_data; ++ int ret = 0; ++ ++ switch (cmd) { ++ case VIDIOC_QUERYCAP: ++ { ++ struct v4l2_capability *cap = arg; ++ ++ strcpy(cap->driver,"Fimc Camera"); ++ strlcpy(cap->card,cfg->v->name,sizeof(cap->card)); ++ sprintf(cap->bus_info,"FIMC 2.0 AHB Bus"); ++ cap->version = 0; ++ cap->capabilities = ++ V4L2_CAP_VIDEO_CAPTURE |V4L2_CAP_READWRITE; ++ return 0; ++ } ++ case VIDIOC_G_FMT: ++ { ++ struct v4l2_format *f = arg; ++ return camif_g_fmt(cfg,f); ++ } ++ case VIDIOC_S_FMT: ++ { ++ struct v4l2_format *f = arg; ++ return camif_s_fmt(cfg,f); ++ } ++ ++ case VIDIOC_ENUM_FMT: ++ { ++ struct v4l2_fmtdesc *f = arg; ++ enum v4l2_buf_type type = f->type; ++ int index = f->index; ++ ++ if (index >= NUM_F) ++ return -EINVAL; ++ switch (f->type) { ++ case V4L2_BUF_TYPE_VIDEO_CAPTURE: ++ break; ++ case V4L2_BUF_TYPE_VIDEO_OVERLAY: ++ case V4L2_BUF_TYPE_VBI_CAPTURE: ++ default: ++ return -EINVAL; ++ } ++ memset(f,0,sizeof(*f)); ++ memcpy(f,cfg->v2.fmtdesc+index,sizeof(*f)); ++ return 0; ++ } ++ case VIDIOC_G_INPUT: ++ { ++ u32 *i = arg; ++ *i = cfg->v2.input; ++ return 0; ++ } ++ case VIDIOC_S_INPUT: ++ { ++ int index = *((int *)arg); ++ if (index != 0) ++ return -EINVAL; ++ cfg->v2.input.index = index; ++ return 0; ++ } ++ ++ default: ++ return -ENOIOCTLCMD; /* errno.h */ ++ } /* End of Switch */ ++ ++ ++} ++ ++ ++ ++ ++ ++ ++ ++/* ++ * Local variables: ++ * tab-width: 8 ++ * c-indent-level: 8 ++ * c-basic-offset: 8 ++ * c-set-style: "K&R" ++ * End: ++ */ +Index: linux-2.6.28/arch/arm/mach-s3c2440/camera/videodev2.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-2.6.28/arch/arm/mach-s3c2440/camera/videodev2.h 2009-01-02 00:01:56.000000000 +0100 +@@ -0,0 +1,938 @@ ++#ifndef __LINUX_VIDEODEV2_H ++#define __LINUX_VIDEODEV2_H ++/* ++ * Video for Linux Two ++ * ++ * Header file for v4l or V4L2 drivers and applications, for ++ * Linux kernels 2.2.x or 2.4.x. ++ * ++ * See http://bytesex.org/v4l/ for API specs and other ++ * v4l2 documentation. ++ * ++ * Author: Bill Dirks ++ * Justin Schoeman ++ * et al. ++ */ ++#ifdef __KERNEL__ ++#include /* need struct timeval */ ++#endif ++ ++/* ++ * M I S C E L L A N E O U S ++ */ ++ ++/* Four-character-code (FOURCC) */ ++#define v4l2_fourcc(a,b,c,d)\ ++ (((__u32)(a)<<0)|((__u32)(b)<<8)|((__u32)(c)<<16)|((__u32)(d)<<24)) ++ ++/* ++ * E N U M S ++ */ ++enum v4l2_field { ++ V4L2_FIELD_ANY = 0, /* driver can choose from none, ++ top, bottom, interlaced ++ depending on whatever it thinks ++ is approximate ... */ ++ V4L2_FIELD_NONE = 1, /* this device has no fields ... */ ++ V4L2_FIELD_TOP = 2, /* top field only */ ++ V4L2_FIELD_BOTTOM = 3, /* bottom field only */ ++ V4L2_FIELD_INTERLACED = 4, /* both fields interlaced */ ++ V4L2_FIELD_SEQ_TB = 5, /* both fields sequential into one ++ buffer, top-bottom order */ ++ V4L2_FIELD_SEQ_BT = 6, /* same as above + bottom-top order */ ++ V4L2_FIELD_ALTERNATE = 7, /* both fields alternating into ++ separate buffers */ ++}; ++#define V4L2_FIELD_HAS_TOP(field) \ ++ ((field) == V4L2_FIELD_TOP ||\ ++ (field) == V4L2_FIELD_INTERLACED ||\ ++ (field) == V4L2_FIELD_SEQ_TB ||\ ++ (field) == V4L2_FIELD_SEQ_BT) ++#define V4L2_FIELD_HAS_BOTTOM(field) \ ++ ((field) == V4L2_FIELD_BOTTOM ||\ ++ (field) == V4L2_FIELD_INTERLACED ||\ ++ (field) == V4L2_FIELD_SEQ_TB ||\ ++ (field) == V4L2_FIELD_SEQ_BT) ++#define V4L2_FIELD_HAS_BOTH(field) \ ++ ((field) == V4L2_FIELD_INTERLACED ||\ ++ (field) == V4L2_FIELD_SEQ_TB ||\ ++ (field) == V4L2_FIELD_SEQ_BT) ++ ++enum v4l2_buf_type { ++ V4L2_BUF_TYPE_VIDEO_CAPTURE = 1, ++ V4L2_BUF_TYPE_VIDEO_OUTPUT = 2, ++ V4L2_BUF_TYPE_VIDEO_OVERLAY = 3, ++ V4L2_BUF_TYPE_VBI_CAPTURE = 4, ++ V4L2_BUF_TYPE_VBI_OUTPUT = 5, ++ V4L2_BUF_TYPE_PRIVATE = 0x80, ++}; ++ ++enum v4l2_ctrl_type { ++ V4L2_CTRL_TYPE_INTEGER = 1, ++ V4L2_CTRL_TYPE_BOOLEAN = 2, ++ V4L2_CTRL_TYPE_MENU = 3, ++ V4L2_CTRL_TYPE_BUTTON = 4, ++}; ++ ++enum v4l2_tuner_type { ++ V4L2_TUNER_RADIO = 1, ++ V4L2_TUNER_ANALOG_TV = 2, ++}; ++ ++enum v4l2_memory { ++ V4L2_MEMORY_MMAP = 1, ++ V4L2_MEMORY_USERPTR = 2, ++ V4L2_MEMORY_OVERLAY = 3, ++}; ++ ++/* see also http://vektor.theorem.ca/graphics/ycbcr/ */ ++enum v4l2_colorspace { ++ /* ITU-R 601 -- broadcast NTSC/PAL */ ++ V4L2_COLORSPACE_SMPTE170M = 1, ++ ++ /* 1125-Line (US) HDTV */ ++ V4L2_COLORSPACE_SMPTE240M = 2, ++ ++ /* HD and modern captures. */ ++ V4L2_COLORSPACE_REC709 = 3, ++ ++ /* broken BT878 extents (601, luma range 16-253 instead of 16-235) */ ++ V4L2_COLORSPACE_BT878 = 4, ++ ++ /* These should be useful. Assume 601 extents. */ ++ V4L2_COLORSPACE_470_SYSTEM_M = 5, ++ V4L2_COLORSPACE_470_SYSTEM_BG = 6, ++ ++ /* I know there will be cameras that send this. So, this is ++ * unspecified chromaticities and full 0-255 on each of the ++ * Y'CbCr components ++ */ ++ V4L2_COLORSPACE_JPEG = 7, ++ ++ /* For RGB colourspaces, this is probably a good start. */ ++ V4L2_COLORSPACE_SRGB = 8, ++}; ++ ++enum v4l2_priority { ++ V4L2_PRIORITY_UNSET = 0, /* not initialized */ ++ V4L2_PRIORITY_BACKGROUND = 1, ++ V4L2_PRIORITY_INTERACTIVE = 2, ++ V4L2_PRIORITY_RECORD = 3, ++ V4L2_PRIORITY_DEFAULT = V4L2_PRIORITY_INTERACTIVE, ++}; ++ ++struct v4l2_rect { ++ __s32 left; ++ __s32 top; ++ __s32 width; ++ __s32 height; ++}; ++ ++struct v4l2_fract { ++ __u32 numerator; ++ __u32 denominator; ++}; ++ ++/* ++ * D R I V E R C A P A B I L I T I E S ++ */ ++struct v4l2_capability ++{ ++ __u8 driver[16]; /* i.e. "bttv" */ ++ __u8 card[32]; /* i.e. "Hauppauge WinTV" */ ++ __u8 bus_info[32]; /* "PCI:" + pci_name(pci_dev) */ ++ __u32 version; /* should use KERNEL_VERSION() */ ++ __u32 capabilities; /* Device capabilities */ ++ __u32 reserved[4]; ++}; ++ ++/* Values for 'capabilities' field */ ++#define V4L2_CAP_VIDEO_CAPTURE 0x00000001 /* Is a video capture device */ ++#define V4L2_CAP_VIDEO_OUTPUT 0x00000002 /* Is a video output device */ ++#define V4L2_CAP_VIDEO_OVERLAY 0x00000004 /* Can do video overlay */ ++#define V4L2_CAP_VBI_CAPTURE 0x00000010 /* Is a VBI capture device */ ++#define V4L2_CAP_VBI_OUTPUT 0x00000020 /* Is a VBI output device */ ++#define V4L2_CAP_RDS_CAPTURE 0x00000100 /* RDS data capture */ ++ ++#define V4L2_CAP_TUNER 0x00010000 /* has a tuner */ ++#define V4L2_CAP_AUDIO 0x00020000 /* has audio support */ ++#define V4L2_CAP_RADIO 0x00040000 /* is a radio device */ ++ ++#define V4L2_CAP_READWRITE 0x01000000 /* read/write systemcalls */ ++#define V4L2_CAP_ASYNCIO 0x02000000 /* async I/O */ ++#define V4L2_CAP_STREAMING 0x04000000 /* streaming I/O ioctls */ ++ ++/* ++ * V I D E O I M A G E F O R M A T ++ */ ++ ++struct v4l2_pix_format ++{ ++ __u32 width; ++ __u32 height; ++ __u32 pixelformat; ++ enum v4l2_field field; ++ __u32 bytesperline; /* for padding, zero if unused */ ++ __u32 sizeimage; ++ enum v4l2_colorspace colorspace; ++ __u32 priv; /* private data, depends on pixelformat */ ++}; ++ ++/* Pixel format FOURCC depth Description */ ++#define V4L2_PIX_FMT_RGB332 v4l2_fourcc('R','G','B','1') /* 8 RGB-3-3-2 */ ++#define V4L2_PIX_FMT_RGB555 v4l2_fourcc('R','G','B','O') /* 16 RGB-5-5-5 */ ++#define V4L2_PIX_FMT_RGB565 v4l2_fourcc('R','G','B','P') /* 16 RGB-5-6-5 */ ++#define V4L2_PIX_FMT_RGB555X v4l2_fourcc('R','G','B','Q') /* 16 RGB-5-5-5 BE */ ++#define V4L2_PIX_FMT_RGB565X v4l2_fourcc('R','G','B','R') /* 16 RGB-5-6-5 BE */ ++#define V4L2_PIX_FMT_BGR24 v4l2_fourcc('B','G','R','3') /* 24 BGR-8-8-8 */ ++#define V4L2_PIX_FMT_RGB24 v4l2_fourcc('R','G','B','3') /* 24 RGB-8-8-8 */ ++#define V4L2_PIX_FMT_BGR32 v4l2_fourcc('B','G','R','4') /* 32 BGR-8-8-8-8 */ ++#define V4L2_PIX_FMT_RGB32 v4l2_fourcc('R','G','B','4') /* 32 RGB-8-8-8-8 */ ++#define V4L2_PIX_FMT_GREY v4l2_fourcc('G','R','E','Y') /* 8 Greyscale */ ++#define V4L2_PIX_FMT_YVU410 v4l2_fourcc('Y','V','U','9') /* 9 YVU 4:1:0 */ ++#define V4L2_PIX_FMT_YVU420 v4l2_fourcc('Y','V','1','2') /* 12 YVU 4:2:0 */ ++#define V4L2_PIX_FMT_YUYV v4l2_fourcc('Y','U','Y','V') /* 16 YUV 4:2:2 */ ++#define V4L2_PIX_FMT_UYVY v4l2_fourcc('U','Y','V','Y') /* 16 YUV 4:2:2 */ ++#define V4L2_PIX_FMT_YUV422P v4l2_fourcc('4','2','2','P') /* 16 YVU422 planar */ ++#define V4L2_PIX_FMT_YUV411P v4l2_fourcc('4','1','1','P') /* 16 YVU411 planar */ ++#define V4L2_PIX_FMT_Y41P v4l2_fourcc('Y','4','1','P') /* 12 YUV 4:1:1 */ ++ ++/* two planes -- one Y, one Cr + Cb interleaved */ ++#define V4L2_PIX_FMT_NV12 v4l2_fourcc('N','V','1','2') /* 12 Y/CbCr 4:2:0 */ ++#define V4L2_PIX_FMT_NV21 v4l2_fourcc('N','V','2','1') /* 12 Y/CrCb 4:2:0 */ ++ ++/* The following formats are not defined in the V4L2 specification */ ++#define V4L2_PIX_FMT_YUV410 v4l2_fourcc('Y','U','V','9') /* 9 YUV 4:1:0 */ ++#define V4L2_PIX_FMT_YUV420 v4l2_fourcc('Y','U','1','2') /* 12 YUV 4:2:0 */ ++#define V4L2_PIX_FMT_YYUV v4l2_fourcc('Y','Y','U','V') /* 16 YUV 4:2:2 */ ++#define V4L2_PIX_FMT_HI240 v4l2_fourcc('H','I','2','4') /* 8 8-bit color */ ++ ++/* compressed formats */ ++#define V4L2_PIX_FMT_MJPEG v4l2_fourcc('M','J','P','G') /* Motion-JPEG */ ++#define V4L2_PIX_FMT_JPEG v4l2_fourcc('J','P','E','G') /* JFIF JPEG */ ++#define V4L2_PIX_FMT_DV v4l2_fourcc('d','v','s','d') /* 1394 */ ++#define V4L2_PIX_FMT_MPEG v4l2_fourcc('M','P','E','G') /* MPEG */ ++ ++/* Vendor-specific formats */ ++#define V4L2_PIX_FMT_WNVA v4l2_fourcc('W','N','V','A') /* Winnov hw compress */ ++ ++/* ++ * F O R M A T E N U M E R A T I O N ++ */ ++struct v4l2_fmtdesc ++{ ++ __u32 index; /* Format number */ ++ enum v4l2_buf_type type; /* buffer type */ ++ __u32 flags; ++ __u8 description[32]; /* Description string */ ++ __u32 pixelformat; /* Format fourcc */ ++ __u32 reserved[4]; ++}; ++ ++#define V4L2_FMT_FLAG_COMPRESSED 0x0001 ++ ++ ++/* ++ * T I M E C O D E ++ */ ++struct v4l2_timecode ++{ ++ __u32 type; ++ __u32 flags; ++ __u8 frames; ++ __u8 seconds; ++ __u8 minutes; ++ __u8 hours; ++ __u8 userbits[4]; ++}; ++ ++/* Type */ ++#define V4L2_TC_TYPE_24FPS 1 ++#define V4L2_TC_TYPE_25FPS 2 ++#define V4L2_TC_TYPE_30FPS 3 ++#define V4L2_TC_TYPE_50FPS 4 ++#define V4L2_TC_TYPE_60FPS 5 ++ ++/* Flags */ ++#define V4L2_TC_FLAG_DROPFRAME 0x0001 /* "drop-frame" mode */ ++#define V4L2_TC_FLAG_COLORFRAME 0x0002 ++#define V4L2_TC_USERBITS_field 0x000C ++#define V4L2_TC_USERBITS_USERDEFINED 0x0000 ++#define V4L2_TC_USERBITS_8BITCHARS 0x0008 ++/* The above is based on SMPTE timecodes */ ++ ++ ++/* ++ * C O M P R E S S I O N P A R A M E T E R S ++ */ ++#if 0 ++/* ### generic compression settings don't work, there is too much ++ * ### codec-specific stuff. Maybe reuse that for MPEG codec settings ++ * ### later ... */ ++struct v4l2_compression ++{ ++ __u32 quality; ++ __u32 keyframerate; ++ __u32 pframerate; ++ __u32 reserved[5]; ++ ++/* what we'll need for MPEG, extracted from some postings on ++ the v4l list (Gert Vervoort, PlasmaJohn). ++ ++system stream: ++ - type: elementary stream(ES), packatised elementary stream(s) (PES) ++ program stream(PS), transport stream(TS) ++ - system bitrate ++ - PS packet size (DVD: 2048 bytes, VCD: 2324 bytes) ++ - TS video PID ++ - TS audio PID ++ - TS PCR PID ++ - TS system information tables (PAT, PMT, CAT, NIT and SIT) ++ - (MPEG-1 systems stream vs. MPEG-2 program stream (TS not supported ++ by MPEG-1 systems) ++ ++audio: ++ - type: MPEG (+Layer I,II,III), AC-3, LPCM ++ - bitrate ++ - sampling frequency (DVD: 48 Khz, VCD: 44.1 KHz, 32 kHz) ++ - Trick Modes? (ff, rew) ++ - Copyright ++ - Inverse Telecine ++ ++video: ++ - picturesize (SIF, 1/2 D1, 2/3 D1, D1) and PAL/NTSC norm can be set ++ through excisting V4L2 controls ++ - noise reduction, parameters encoder specific? ++ - MPEG video version: MPEG-1, MPEG-2 ++ - GOP (Group Of Pictures) definition: ++ - N: number of frames per GOP ++ - M: distance between reference (I,P) frames ++ - open/closed GOP ++ - quantiser matrix: inter Q matrix (64 bytes) and intra Q matrix (64 bytes) ++ - quantiser scale: linear or logarithmic ++ - scanning: alternate or zigzag ++ - bitrate mode: CBR (constant bitrate) or VBR (variable bitrate). ++ - target video bitrate for CBR ++ - target video bitrate for VBR ++ - maximum video bitrate for VBR - min. quantiser value for VBR ++ - max. quantiser value for VBR ++ - adaptive quantisation value ++ - return the number of bytes per GOP or bitrate for bitrate monitoring ++ ++*/ ++}; ++#endif ++ ++struct v4l2_jpegcompression ++{ ++ int quality; ++ ++ int APPn; /* Number of APP segment to be written, ++ * must be 0..15 */ ++ int APP_len; /* Length of data in JPEG APPn segment */ ++ char APP_data[60]; /* Data in the JPEG APPn segment. */ ++ ++ int COM_len; /* Length of data in JPEG COM segment */ ++ char COM_data[60]; /* Data in JPEG COM segment */ ++ ++ __u32 jpeg_markers; /* Which markers should go into the JPEG ++ * output. Unless you exactly know what ++ * you do, leave them untouched. ++ * Inluding less markers will make the ++ * resulting code smaller, but there will ++ * be fewer aplications which can read it. ++ * The presence of the APP and COM marker ++ * is influenced by APP_len and COM_len ++ * ONLY, not by this property! */ ++ ++#define V4L2_JPEG_MARKER_DHT (1<<3) /* Define Huffman Tables */ ++#define V4L2_JPEG_MARKER_DQT (1<<4) /* Define Quantization Tables */ ++#define V4L2_JPEG_MARKER_DRI (1<<5) /* Define Restart Interval */ ++#define V4L2_JPEG_MARKER_COM (1<<6) /* Comment segment */ ++#define V4L2_JPEG_MARKER_APP (1<<7) /* App segment, driver will ++ * allways use APP0 */ ++}; ++ ++ ++/* ++ * M E M O R Y - M A P P I N G B U F F E R S ++ */ ++struct v4l2_requestbuffers ++{ ++ __u32 count; ++ enum v4l2_buf_type type; ++ enum v4l2_memory memory; ++ __u32 reserved[2]; ++}; ++ ++struct v4l2_buffer ++{ ++ __u32 index; ++ enum v4l2_buf_type type; ++ __u32 bytesused; ++ __u32 flags; ++ enum v4l2_field field; ++ struct timeval timestamp; ++ struct v4l2_timecode timecode; ++ __u32 sequence; ++ ++ /* memory location */ ++ enum v4l2_memory memory; ++ union { ++ __u32 offset; ++ unsigned long userptr; ++ } m; ++ __u32 length; ++ ++ __u32 reserved[2]; ++}; ++ ++/* Flags for 'flags' field */ ++#define V4L2_BUF_FLAG_MAPPED 0x0001 /* Buffer is mapped (flag) */ ++#define V4L2_BUF_FLAG_QUEUED 0x0002 /* Buffer is queued for processing */ ++#define V4L2_BUF_FLAG_DONE 0x0004 /* Buffer is ready */ ++#define V4L2_BUF_FLAG_KEYFRAME 0x0008 /* Image is a keyframe (I-frame) */ ++#define V4L2_BUF_FLAG_PFRAME 0x0010 /* Image is a P-frame */ ++#define V4L2_BUF_FLAG_BFRAME 0x0020 /* Image is a B-frame */ ++#define V4L2_BUF_FLAG_TIMECODE 0x0100 /* timecode field is valid */ ++ ++/* ++ * O V E R L A Y P R E V I E W ++ */ ++struct v4l2_framebuffer ++{ ++ __u32 capability; ++ __u32 flags; ++/* FIXME: in theory we should pass something like PCI device + memory ++ * region + offset instead of some physical address */ ++ void* base; ++ struct v4l2_pix_format fmt; ++}; ++/* Flags for the 'capability' field. Read only */ ++#define V4L2_FBUF_CAP_EXTERNOVERLAY 0x0001 ++#define V4L2_FBUF_CAP_CHROMAKEY 0x0002 ++#define V4L2_FBUF_CAP_LIST_CLIPPING 0x0004 ++#define V4L2_FBUF_CAP_BITMAP_CLIPPING 0x0008 ++/* Flags for the 'flags' field. */ ++#define V4L2_FBUF_FLAG_PRIMARY 0x0001 ++#define V4L2_FBUF_FLAG_OVERLAY 0x0002 ++#define V4L2_FBUF_FLAG_CHROMAKEY 0x0004 ++ ++struct v4l2_clip ++{ ++ struct v4l2_rect c; ++ struct v4l2_clip *next; ++}; ++ ++struct v4l2_window ++{ ++ struct v4l2_rect w; ++ enum v4l2_field field; ++ __u32 chromakey; ++ struct v4l2_clip *clips; ++ __u32 clipcount; ++ void *bitmap; ++}; ++ ++ ++/* ++ * C A P T U R E P A R A M E T E R S ++ */ ++struct v4l2_captureparm ++{ ++ __u32 capability; /* Supported modes */ ++ __u32 capturemode; /* Current mode */ ++ struct v4l2_fract timeperframe; /* Time per frame in .1us units */ ++ __u32 extendedmode; /* Driver-specific extensions */ ++ __u32 readbuffers; /* # of buffers for read */ ++ __u32 reserved[4]; ++}; ++/* Flags for 'capability' and 'capturemode' fields */ ++#define V4L2_MODE_HIGHQUALITY 0x0001 /* High quality imaging mode */ ++#define V4L2_CAP_TIMEPERFRAME 0x1000 /* timeperframe field is supported */ ++ ++struct v4l2_outputparm ++{ ++ __u32 capability; /* Supported modes */ ++ __u32 outputmode; /* Current mode */ ++ struct v4l2_fract timeperframe; /* Time per frame in seconds */ ++ __u32 extendedmode; /* Driver-specific extensions */ ++ __u32 writebuffers; /* # of buffers for write */ ++ __u32 reserved[4]; ++}; ++ ++/* ++ * I N P U T I M A G E C R O P P I N G ++ */ ++ ++struct v4l2_cropcap { ++ enum v4l2_buf_type type; ++ struct v4l2_rect bounds; ++ struct v4l2_rect defrect; ++ struct v4l2_fract pixelaspect; ++}; ++ ++struct v4l2_crop { ++ enum v4l2_buf_type type; ++ struct v4l2_rect c; ++}; ++ ++/* ++ * A N A L O G V I D E O S T A N D A R D ++ */ ++ ++typedef __u64 v4l2_std_id; ++ ++/* one bit for each */ ++#define V4L2_STD_PAL_B ((v4l2_std_id)0x00000001) ++#define V4L2_STD_PAL_B1 ((v4l2_std_id)0x00000002) ++#define V4L2_STD_PAL_G ((v4l2_std_id)0x00000004) ++#define V4L2_STD_PAL_H ((v4l2_std_id)0x00000008) ++#define V4L2_STD_PAL_I ((v4l2_std_id)0x00000010) ++#define V4L2_STD_PAL_D ((v4l2_std_id)0x00000020) ++#define V4L2_STD_PAL_D1 ((v4l2_std_id)0x00000040) ++#define V4L2_STD_PAL_K ((v4l2_std_id)0x00000080) ++ ++#define V4L2_STD_PAL_M ((v4l2_std_id)0x00000100) ++#define V4L2_STD_PAL_N ((v4l2_std_id)0x00000200) ++#define V4L2_STD_PAL_Nc ((v4l2_std_id)0x00000400) ++#define V4L2_STD_PAL_60 ((v4l2_std_id)0x00000800) ++ ++#define V4L2_STD_NTSC_M ((v4l2_std_id)0x00001000) ++#define V4L2_STD_NTSC_M_JP ((v4l2_std_id)0x00002000) ++ ++#define V4L2_STD_SECAM_B ((v4l2_std_id)0x00010000) ++#define V4L2_STD_SECAM_D ((v4l2_std_id)0x00020000) ++#define V4L2_STD_SECAM_G ((v4l2_std_id)0x00040000) ++#define V4L2_STD_SECAM_H ((v4l2_std_id)0x00080000) ++#define V4L2_STD_SECAM_K ((v4l2_std_id)0x00100000) ++#define V4L2_STD_SECAM_K1 ((v4l2_std_id)0x00200000) ++#define V4L2_STD_SECAM_L ((v4l2_std_id)0x00400000) ++ ++/* ATSC/HDTV */ ++#define V4L2_STD_ATSC_8_VSB ((v4l2_std_id)0x01000000) ++#define V4L2_STD_ATSC_16_VSB ((v4l2_std_id)0x02000000) ++ ++/* some common needed stuff */ ++#define V4L2_STD_PAL_BG (V4L2_STD_PAL_B |\ ++ V4L2_STD_PAL_B1 |\ ++ V4L2_STD_PAL_G) ++#define V4L2_STD_PAL_DK (V4L2_STD_PAL_D |\ ++ V4L2_STD_PAL_D1 |\ ++ V4L2_STD_PAL_K) ++#define V4L2_STD_PAL (V4L2_STD_PAL_BG |\ ++ V4L2_STD_PAL_DK |\ ++ V4L2_STD_PAL_H |\ ++ V4L2_STD_PAL_I) ++#define V4L2_STD_NTSC (V4L2_STD_NTSC_M |\ ++ V4L2_STD_NTSC_M_JP) ++#define V4L2_STD_SECAM (V4L2_STD_SECAM_B |\ ++ V4L2_STD_SECAM_D |\ ++ V4L2_STD_SECAM_G |\ ++ V4L2_STD_SECAM_H |\ ++ V4L2_STD_SECAM_K |\ ++ V4L2_STD_SECAM_K1 |\ ++ V4L2_STD_SECAM_L) ++ ++#define V4L2_STD_525_60 (V4L2_STD_PAL_M |\ ++ V4L2_STD_PAL_60 |\ ++ V4L2_STD_NTSC) ++#define V4L2_STD_625_50 (V4L2_STD_PAL |\ ++ V4L2_STD_PAL_N |\ ++ V4L2_STD_PAL_Nc |\ ++ V4L2_STD_SECAM) ++ ++#define V4L2_STD_UNKNOWN 0 ++#define V4L2_STD_ALL (V4L2_STD_525_60 |\ ++ V4L2_STD_625_50) ++ ++struct v4l2_standard ++{ ++ __u32 index; ++ v4l2_std_id id; ++ __u8 name[24]; ++ struct v4l2_fract frameperiod; /* Frames, not fields */ ++ __u32 framelines; ++ __u32 reserved[4]; ++}; ++ ++ ++/* ++ * V I D E O I N P U T S ++ */ ++struct v4l2_input ++{ ++ __u32 index; /* Which input */ ++ __u8 name[32]; /* Label */ ++ __u32 type; /* Type of input */ ++ __u32 audioset; /* Associated audios (bitfield) */ ++ __u32 tuner; /* Associated tuner */ ++ v4l2_std_id std; ++ __u32 status; ++ __u32 reserved[4]; ++}; ++/* Values for the 'type' field */ ++#define V4L2_INPUT_TYPE_TUNER 1 ++#define V4L2_INPUT_TYPE_CAMERA 2 ++ ++/* field 'status' - general */ ++#define V4L2_IN_ST_NO_POWER 0x00000001 /* Attached device is off */ ++#define V4L2_IN_ST_NO_SIGNAL 0x00000002 ++#define V4L2_IN_ST_NO_COLOR 0x00000004 ++ ++/* field 'status' - analog */ ++#define V4L2_IN_ST_NO_H_LOCK 0x00000100 /* No horizontal sync lock */ ++#define V4L2_IN_ST_COLOR_KILL 0x00000200 /* Color killer is active */ ++ ++/* field 'status' - digital */ ++#define V4L2_IN_ST_NO_SYNC 0x00010000 /* No synchronization lock */ ++#define V4L2_IN_ST_NO_EQU 0x00020000 /* No equalizer lock */ ++#define V4L2_IN_ST_NO_CARRIER 0x00040000 /* Carrier recovery failed */ ++ ++/* field 'status' - VCR and set-top box */ ++#define V4L2_IN_ST_MACROVISION 0x01000000 /* Macrovision detected */ ++#define V4L2_IN_ST_NO_ACCESS 0x02000000 /* Conditional access denied */ ++#define V4L2_IN_ST_VTR 0x04000000 /* VTR time constant */ ++ ++/* ++ * V I D E O O U T P U T S ++ */ ++struct v4l2_output ++{ ++ __u32 index; /* Which output */ ++ __u8 name[32]; /* Label */ ++ __u32 type; /* Type of output */ ++ __u32 audioset; /* Associated audios (bitfield) */ ++ __u32 modulator; /* Associated modulator */ ++ v4l2_std_id std; ++ __u32 reserved[4]; ++}; ++/* Values for the 'type' field */ ++#define V4L2_OUTPUT_TYPE_MODULATOR 1 ++#define V4L2_OUTPUT_TYPE_ANALOG 2 ++#define V4L2_OUTPUT_TYPE_ANALOGVGAOVERLAY 3 ++ ++/* ++ * C O N T R O L S ++ */ ++struct v4l2_control ++{ ++ __u32 id; ++ __s32 value; ++}; ++ ++/* Used in the VIDIOC_QUERYCTRL ioctl for querying controls */ ++struct v4l2_queryctrl ++{ ++ __u32 id; ++ enum v4l2_ctrl_type type; ++ __u8 name[32]; /* Whatever */ ++ __s32 minimum; /* Note signedness */ ++ __s32 maximum; ++ __s32 step; ++ __s32 default_value; ++ __u32 flags; ++ __u32 reserved[2]; ++}; ++ ++/* Used in the VIDIOC_QUERYMENU ioctl for querying menu items */ ++struct v4l2_querymenu ++{ ++ __u32 id; ++ __u32 index; ++ __u8 name[32]; /* Whatever */ ++ __u32 reserved; ++}; ++ ++/* Control flags */ ++#define V4L2_CTRL_FLAG_DISABLED 0x0001 ++#define V4L2_CTRL_FLAG_GRABBED 0x0002 ++ ++/* Control IDs defined by V4L2 */ ++#define V4L2_CID_BASE 0x00980900 ++/* IDs reserved for driver specific controls */ ++#define V4L2_CID_PRIVATE_BASE 0x08000000 ++ ++#define V4L2_CID_BRIGHTNESS (V4L2_CID_BASE+0) ++#define V4L2_CID_CONTRAST (V4L2_CID_BASE+1) ++#define V4L2_CID_SATURATION (V4L2_CID_BASE+2) ++#define V4L2_CID_HUE (V4L2_CID_BASE+3) ++#define V4L2_CID_AUDIO_VOLUME (V4L2_CID_BASE+5) ++#define V4L2_CID_AUDIO_BALANCE (V4L2_CID_BASE+6) ++#define V4L2_CID_AUDIO_BASS (V4L2_CID_BASE+7) ++#define V4L2_CID_AUDIO_TREBLE (V4L2_CID_BASE+8) ++#define V4L2_CID_AUDIO_MUTE (V4L2_CID_BASE+9) ++#define V4L2_CID_AUDIO_LOUDNESS (V4L2_CID_BASE+10) ++#define V4L2_CID_BLACK_LEVEL (V4L2_CID_BASE+11) ++#define V4L2_CID_AUTO_WHITE_BALANCE (V4L2_CID_BASE+12) ++#define V4L2_CID_DO_WHITE_BALANCE (V4L2_CID_BASE+13) ++#define V4L2_CID_RED_BALANCE (V4L2_CID_BASE+14) ++#define V4L2_CID_BLUE_BALANCE (V4L2_CID_BASE+15) ++#define V4L2_CID_GAMMA (V4L2_CID_BASE+16) ++#define V4L2_CID_WHITENESS (V4L2_CID_GAMMA) /* ? Not sure */ ++#define V4L2_CID_EXPOSURE (V4L2_CID_BASE+17) ++#define V4L2_CID_AUTOGAIN (V4L2_CID_BASE+18) ++#define V4L2_CID_GAIN (V4L2_CID_BASE+19) ++#define V4L2_CID_HFLIP (V4L2_CID_BASE+20) ++#define V4L2_CID_VFLIP (V4L2_CID_BASE+21) ++#define V4L2_CID_HCENTER (V4L2_CID_BASE+22) ++#define V4L2_CID_VCENTER (V4L2_CID_BASE+23) ++#define V4L2_CID_LASTP1 (V4L2_CID_BASE+24) /* last CID + 1 */ ++ ++/* ++ * T U N I N G ++ */ ++struct v4l2_tuner ++{ ++ __u32 index; ++ __u8 name[32]; ++ enum v4l2_tuner_type type; ++ __u32 capability; ++ __u32 rangelow; ++ __u32 rangehigh; ++ __u32 rxsubchans; ++ __u32 audmode; ++ __s32 signal; ++ __s32 afc; ++ __u32 reserved[4]; ++}; ++ ++struct v4l2_modulator ++{ ++ __u32 index; ++ __u8 name[32]; ++ __u32 capability; ++ __u32 rangelow; ++ __u32 rangehigh; ++ __u32 txsubchans; ++ __u32 reserved[4]; ++}; ++ ++/* Flags for the 'capability' field */ ++#define V4L2_TUNER_CAP_LOW 0x0001 ++#define V4L2_TUNER_CAP_NORM 0x0002 ++#define V4L2_TUNER_CAP_STEREO 0x0010 ++#define V4L2_TUNER_CAP_LANG2 0x0020 ++#define V4L2_TUNER_CAP_SAP 0x0020 ++#define V4L2_TUNER_CAP_LANG1 0x0040 ++ ++/* Flags for the 'rxsubchans' field */ ++#define V4L2_TUNER_SUB_MONO 0x0001 ++#define V4L2_TUNER_SUB_STEREO 0x0002 ++#define V4L2_TUNER_SUB_LANG2 0x0004 ++#define V4L2_TUNER_SUB_SAP 0x0004 ++#define V4L2_TUNER_SUB_LANG1 0x0008 ++ ++/* Values for the 'audmode' field */ ++#define V4L2_TUNER_MODE_MONO 0x0000 ++#define V4L2_TUNER_MODE_STEREO 0x0001 ++#define V4L2_TUNER_MODE_LANG2 0x0002 ++#define V4L2_TUNER_MODE_SAP 0x0002 ++#define V4L2_TUNER_MODE_LANG1 0x0003 ++ ++struct v4l2_frequency ++{ ++ __u32 tuner; ++ enum v4l2_tuner_type type; ++ __u32 frequency; ++ __u32 reserved[8]; ++}; ++ ++/* ++ * A U D I O ++ */ ++struct v4l2_audio ++{ ++ __u32 index; ++ __u8 name[32]; ++ __u32 capability; ++ __u32 mode; ++ __u32 reserved[2]; ++}; ++/* Flags for the 'capability' field */ ++#define V4L2_AUDCAP_STEREO 0x00001 ++#define V4L2_AUDCAP_AVL 0x00002 ++ ++/* Flags for the 'mode' field */ ++#define V4L2_AUDMODE_AVL 0x00001 ++ ++struct v4l2_audioout ++{ ++ __u32 index; ++ __u8 name[32]; ++ __u32 capability; ++ __u32 mode; ++ __u32 reserved[2]; ++}; ++ ++/* ++ * D A T A S E R V I C E S ( V B I ) ++ * ++ * Data services API by Michael Schimek ++ */ ++ ++struct v4l2_vbi_format ++{ ++ __u32 sampling_rate; /* in 1 Hz */ ++ __u32 offset; ++ __u32 samples_per_line; ++ __u32 sample_format; /* V4L2_PIX_FMT_* */ ++ __s32 start[2]; ++ __u32 count[2]; ++ __u32 flags; /* V4L2_VBI_* */ ++ __u32 reserved[2]; /* must be zero */ ++}; ++ ++/* VBI flags */ ++#define V4L2_VBI_UNSYNC (1<< 0) ++#define V4L2_VBI_INTERLACED (1<< 1) ++ ++ ++/* ++ * A G G R E G A T E S T R U C T U R E S ++ */ ++ ++/* Stream data format ++ */ ++struct v4l2_format ++{ ++ enum v4l2_buf_type type; ++ union ++ { ++ struct v4l2_pix_format pix; // V4L2_BUF_TYPE_VIDEO_CAPTURE ++ struct v4l2_window win; // V4L2_BUF_TYPE_VIDEO_OVERLAY ++ struct v4l2_vbi_format vbi; // V4L2_BUF_TYPE_VBI_CAPTURE ++ __u8 raw_data[200]; // user-defined ++ } fmt; ++}; ++ ++ ++/* Stream type-dependent parameters ++ */ ++struct v4l2_streamparm ++{ ++ enum v4l2_buf_type type; ++ union ++ { ++ struct v4l2_captureparm capture; ++ struct v4l2_outputparm output; ++ __u8 raw_data[200]; /* user-defined */ ++ } parm; ++}; ++ ++ ++ ++/* ++ * I O C T L C O D E S F O R V I D E O D E V I C E S ++ * ++ */ ++#define VIDIOC_QUERYCAP _IOR ('V', 0, struct v4l2_capability) ++#define VIDIOC_RESERVED _IO ('V', 1) ++#define VIDIOC_ENUM_FMT _IOWR ('V', 2, struct v4l2_fmtdesc) ++#define VIDIOC_G_FMT _IOWR ('V', 4, struct v4l2_format) ++#define VIDIOC_S_FMT _IOWR ('V', 5, struct v4l2_format) ++#if 0 ++#define VIDIOC_G_COMP _IOR ('V', 6, struct v4l2_compression) ++#define VIDIOC_S_COMP _IOW ('V', 7, struct v4l2_compression) ++#endif ++#define VIDIOC_REQBUFS _IOWR ('V', 8, struct v4l2_requestbuffers) ++#define VIDIOC_QUERYBUF _IOWR ('V', 9, struct v4l2_buffer) ++#define VIDIOC_G_FBUF _IOR ('V', 10, struct v4l2_framebuffer) ++#define VIDIOC_S_FBUF _IOW ('V', 11, struct v4l2_framebuffer) ++#define VIDIOC_OVERLAY _IOW ('V', 14, int) ++#define VIDIOC_QBUF _IOWR ('V', 15, struct v4l2_buffer) ++#define VIDIOC_DQBUF _IOWR ('V', 17, struct v4l2_buffer) ++#define VIDIOC_STREAMON _IOW ('V', 18, int) ++#define VIDIOC_STREAMOFF _IOW ('V', 19, int) ++#define VIDIOC_G_PARM _IOWR ('V', 21, struct v4l2_streamparm) ++#define VIDIOC_S_PARM _IOWR ('V', 22, struct v4l2_streamparm) ++#define VIDIOC_G_STD _IOR ('V', 23, v4l2_std_id) ++#define VIDIOC_S_STD _IOW ('V', 24, v4l2_std_id) ++#define VIDIOC_ENUMSTD _IOWR ('V', 25, struct v4l2_standard) ++#define VIDIOC_ENUMINPUT _IOWR ('V', 26, struct v4l2_input) ++#define VIDIOC_G_CTRL _IOWR ('V', 27, struct v4l2_control) ++#define VIDIOC_S_CTRL _IOWR ('V', 28, struct v4l2_control) ++#define VIDIOC_G_TUNER _IOWR ('V', 29, struct v4l2_tuner) ++#define VIDIOC_S_TUNER _IOW ('V', 30, struct v4l2_tuner) ++#define VIDIOC_G_AUDIO _IOR ('V', 33, struct v4l2_audio) ++#define VIDIOC_S_AUDIO _IOW ('V', 34, struct v4l2_audio) ++#define VIDIOC_QUERYCTRL _IOWR ('V', 36, struct v4l2_queryctrl) ++#define VIDIOC_QUERYMENU _IOWR ('V', 37, struct v4l2_querymenu) ++#define VIDIOC_G_INPUT _IOR ('V', 38, int) ++#define VIDIOC_S_INPUT _IOWR ('V', 39, int) ++#define VIDIOC_G_OUTPUT _IOR ('V', 46, int) ++#define VIDIOC_S_OUTPUT _IOWR ('V', 47, int) ++#define VIDIOC_ENUMOUTPUT _IOWR ('V', 48, struct v4l2_output) ++#define VIDIOC_G_AUDOUT _IOR ('V', 49, struct v4l2_audioout) ++#define VIDIOC_S_AUDOUT _IOW ('V', 50, struct v4l2_audioout) ++#define VIDIOC_G_MODULATOR _IOWR ('V', 54, struct v4l2_modulator) ++#define VIDIOC_S_MODULATOR _IOW ('V', 55, struct v4l2_modulator) ++#define VIDIOC_G_FREQUENCY _IOWR ('V', 56, struct v4l2_frequency) ++#define VIDIOC_S_FREQUENCY _IOW ('V', 57, struct v4l2_frequency) ++#define VIDIOC_CROPCAP _IOR ('V', 58, struct v4l2_cropcap) ++#define VIDIOC_G_CROP _IOWR ('V', 59, struct v4l2_crop) ++#define VIDIOC_S_CROP _IOW ('V', 60, struct v4l2_crop) ++#define VIDIOC_G_JPEGCOMP _IOR ('V', 61, struct v4l2_jpegcompression) ++#define VIDIOC_S_JPEGCOMP _IOW ('V', 62, struct v4l2_jpegcompression) ++#define VIDIOC_QUERYSTD _IOR ('V', 63, v4l2_std_id) ++#define VIDIOC_TRY_FMT _IOWR ('V', 64, struct v4l2_format) ++#define VIDIOC_ENUMAUDIO _IOWR ('V', 65, struct v4l2_audio) ++#define VIDIOC_ENUMAUDOUT _IOWR ('V', 66, struct v4l2_audioout) ++#define VIDIOC_G_PRIORITY _IOR ('V', 67, enum v4l2_priority) ++#define VIDIOC_S_PRIORITY _IOW ('V', 68, enum v4l2_priority) ++ ++/* for compatibility, will go away some day */ ++#define VIDIOC_OVERLAY_OLD _IOWR ('V', 14, int) ++#define VIDIOC_S_PARM_OLD _IOW ('V', 22, struct v4l2_streamparm) ++#define VIDIOC_S_CTRL_OLD _IOW ('V', 28, struct v4l2_control) ++#define VIDIOC_G_AUDIO_OLD _IOWR ('V', 33, struct v4l2_audio) ++#define VIDIOC_G_AUDOUT_OLD _IOWR ('V', 49, struct v4l2_audioout) ++ ++#define BASE_VIDIOC_PRIVATE 192 /* 192-255 are private */ ++ ++ ++#ifdef __KERNEL__ ++/* ++ * ++ * V 4 L 2 D R I V E R H E L P E R A P I ++ * ++ * Some commonly needed functions for drivers (v4l2-common.o module) ++ */ ++#include ++ ++/* Video standard functions */ ++extern unsigned int v4l2_video_std_fps(struct v4l2_standard *vs); ++extern int v4l2_video_std_construct(struct v4l2_standard *vs, ++ int id, char *name); ++ ++/* prority handling */ ++struct v4l2_prio_state { ++ atomic_t prios[4]; ++}; ++int v4l2_prio_init(struct v4l2_prio_state *global); ++int v4l2_prio_change(struct v4l2_prio_state *global, enum v4l2_priority *local, ++ enum v4l2_priority new); ++int v4l2_prio_open(struct v4l2_prio_state *global, enum v4l2_priority *local); ++int v4l2_prio_close(struct v4l2_prio_state *global, enum v4l2_priority *local); ++enum v4l2_priority v4l2_prio_max(struct v4l2_prio_state *global); ++int v4l2_prio_check(struct v4l2_prio_state *global, enum v4l2_priority *local); ++ ++/* names for fancy debug output */ ++extern char *v4l2_field_names[]; ++extern char *v4l2_type_names[]; ++extern char *v4l2_ioctl_names[]; ++ ++/* Compatibility layer interface -- v4l1-compat module */ ++typedef int (*v4l2_kioctl)(struct inode *inode, struct file *file, ++ unsigned int cmd, void *arg); ++int v4l_compat_translate_ioctl(struct inode *inode, struct file *file, ++ int cmd, void *arg, v4l2_kioctl driver_ioctl); ++ ++#endif /* __KERNEL__ */ ++#endif /* __LINUX_VIDEODEV2_H */ ++ ++/* ++ * Local variables: ++ * c-basic-offset: 8 ++ * End: ++ */ +Index: linux-2.6.28/arch/arm/mach-s3c2440/camera/videodev.c +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-2.6.28/arch/arm/mach-s3c2440/camera/videodev.c 2009-01-02 00:01:56.000000000 +0100 +@@ -0,0 +1,332 @@ ++/* ++ * Video capture interface for Linux Character Device Driver. ++ * based on ++ * Alan Cox, video4linux ++ * ++ * Author: SW.LEE ++ * 2004 (C) Samsung Electronics ++ * Modified for S3C2440/S3C24A0 Interface ++ * ++ * This file is released under the GPLv2 ++ */ ++ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++/* #include */ ++#include ++#include ++#include ++#include ++ ++ ++ ++#define CONFIG_VIDEO_V4L1_COMPAT ++#include ++#include "camif.h" ++#include "miscdevice.h" ++ ++ ++static DECLARE_MUTEX(videodev_lock); ++ ++const char *fimc_version = "$Id: videodev.c,v 1.1.1.1 2004/04/27 03:52:50 swlee Exp $"; ++ ++#define VIDEO_NAME "video4linux" ++ ++ ++#define VIDEO_NUM_DEVICES 2 ++static struct video_device *video_device[VIDEO_NUM_DEVICES]; ++ ++static inline struct video_device * get_vd(int nr) ++{ ++ if ( nr == CODEC_MINOR) ++ return video_device[0]; ++ else { ++ assert ( nr & PREVIEW_MINOR); ++ return video_device[1]; ++ } ++} ++ ++static inline void set_vd ( struct video_device * vd, int nr) ++{ ++ if ( nr == CODEC_MINOR) ++ video_device[0] = vd; ++ else { ++ assert ( nr & PREVIEW_MINOR); ++ video_device[1] = vd; ++ } ++} ++ ++static inline int video_release(struct inode *inode, struct file *f) ++{ ++ int minor = MINOR(inode->i_rdev); ++ struct video_device *vfd; ++ ++ vfd = get_vd(minor); ++#if 1 /* needed until all drivers are fixed */ ++ if (!vfd->release) ++ return 0; ++#endif ++ vfd->release(vfd); ++ return 0; ++} ++ ++struct video_device* video_devdata(struct file *file) ++{ ++ return video_device[iminor(file->f_dentry->d_inode)]; ++} ++ ++ ++/* ++ * Open a video device. ++ */ ++static int video_open(struct inode *inode, struct file *file) ++{ ++ int minor = MINOR(inode->i_rdev); ++ int err = 0; ++ struct video_device *vfl; ++ struct file_operations const *old_fops; ++ ++ down(&videodev_lock); ++ ++ vfl = get_vd(minor); ++ ++ old_fops = file->f_op; ++ file->f_op = fops_get(vfl->fops); ++ if(file->f_op->open) ++ err = file->f_op->open(inode,file); ++ if (err) { ++ fops_put(file->f_op); ++ file->f_op = fops_get(old_fops); ++ } ++ fops_put(old_fops); ++ up(&videodev_lock); ++ return err; ++} ++ ++/* ++ * open/release helper functions -- handle exclusive opens ++ */ ++extern int video_exclusive_open(struct inode *inode, struct file *file) ++{ ++ struct video_device *vfl = get_vd(MINOR(inode->i_rdev)); ++ int retval = 0; ++ ++ mutex_lock(&vfl->lock); ++ if (vfl->users) { ++ retval = -EBUSY; ++ } else { ++ vfl->users++; ++ } ++ mutex_unlock(&vfl->lock); ++ return retval; ++} ++ ++extern int video_exclusive_release(struct inode *inode, struct file *file) ++{ ++ struct video_device *vfl = get_vd(MINOR(inode->i_rdev)); ++ vfl->users--; ++ return 0; ++} ++ ++int ++video_usercopy(struct inode *inode, struct file *file, ++ unsigned int cmd, unsigned long arg, ++ int (*func)(struct inode *inode, struct file *file, ++ unsigned int cmd, void *arg)) ++{ ++ char sbuf[128]; ++ void *mbuf = NULL; ++ void *parg = NULL; ++ int err = -EINVAL; ++ ++ // cmd = video_fix_command(cmd); ++ ++ /* Copy arguments into temp kernel buffer */ ++ switch (_IOC_DIR(cmd)) { ++ case _IOC_NONE: ++ parg = (void *)arg; ++ break; ++ case _IOC_READ: ++ case _IOC_WRITE: ++ case (_IOC_WRITE | _IOC_READ): ++ if (_IOC_SIZE(cmd) <= sizeof(sbuf)) { ++ parg = sbuf; ++ } else { ++ /* too big to allocate from stack */ ++ mbuf = kmalloc(_IOC_SIZE(cmd),GFP_KERNEL); ++ if (NULL == mbuf) ++ return -ENOMEM; ++ parg = mbuf; ++ } ++ ++ err = -EFAULT; ++ if (_IOC_DIR(cmd) & _IOC_WRITE) ++ if (copy_from_user(parg, (void *)arg, _IOC_SIZE(cmd))) ++ goto out; ++ break; ++ } ++ ++ /* call driver */ ++ err = func(inode, file, cmd, parg); ++ if (err == -ENOIOCTLCMD) ++ err = -EINVAL; ++ if (err < 0) ++ goto out; ++ ++ /* Copy results into user buffer */ ++ switch (_IOC_DIR(cmd)) ++ { ++ case _IOC_READ: ++ case (_IOC_WRITE | _IOC_READ): ++ if (copy_to_user((void *)arg, parg, _IOC_SIZE(cmd))) ++ err = -EFAULT; ++ break; ++ } ++ ++out: ++ if (mbuf) ++ kfree(mbuf); ++ return err; ++} ++ ++ ++static struct file_operations video_fops= ++{ ++ .owner = THIS_MODULE, ++ .llseek = no_llseek, ++ .open = video_open, ++ .release = video_release, ++}; ++ ++static struct miscdevice codec_dev = { ++ minor: CODEC_MINOR, ++ name : "codec", ++ fops : &video_fops ++}; ++ ++static struct miscdevice preview_dev = { ++ minor: PREVIEW_MINOR, ++ name : "preview", ++ fops : &video_fops ++}; ++ ++ ++/** ++ * video_register_device - register video4linux devices ++ * @vfd: video device structure we want to register ++ * @type: type of device to register ++ * @nr: minor number ++ * ++ * Zero is returned on success. ++ * type : ignored. ++ * nr : ++ * 0 Codec index ++ * 1 Preview index ++ */ ++int video_register_device(struct video_device *vfd, int type, int nr) ++{ ++ int ret=0; ++ ++ /* pick a minor number */ ++ down(&videodev_lock); ++ set_vd (vfd, nr); ++ vfd->minor=nr; ++ up(&videodev_lock); ++ ++ switch (vfd->minor) { ++ case CODEC_MINOR: ++ ret = misc_register(&codec_dev); ++ if (ret) { ++ printk(KERN_ERR ++ "can't misc_register : codec on minor=%d\n", CODEC_MINOR); ++ panic(" Give me misc codec \n"); ++ } ++ break; ++ case PREVIEW_MINOR: ++ ret = misc_register(&preview_dev); ++ if (ret) { ++ printk(KERN_ERR ++ "can't misc_register (preview) on minor=%d\n", PREVIEW_MINOR); ++ panic(" Give me misc codec \n"); ++ } ++ break; ++ } ++ ++#if 0 /* needed until all drivers are fixed */ ++ if (!vfd->release) ++ printk(KERN_WARNING "videodev: \"%s\" has no release callback. " ++ "Please fix your driver for proper sysfs support, see " ++ "http://lwn.net/Articles/36850/\n", vfd->name); ++#endif ++ return 0; ++} ++ ++/** ++ * video_unregister_device - unregister a video4linux device ++ * @vfd: the device to unregister ++ * ++ * This unregisters the passed device and deassigns the minor ++ * number. Future open calls will be met with errors. ++ */ ++ ++void video_unregister_device(struct video_device *vfd) ++{ ++ down(&videodev_lock); ++ ++ if(get_vd(vfd->minor)!=vfd) ++ panic("videodev: bad unregister"); ++ ++ if (vfd->minor== CODEC_MINOR) ++ misc_deregister(&codec_dev); ++ else ++ misc_deregister(&preview_dev); ++ set_vd (NULL, vfd->minor); ++ up(&videodev_lock); ++} ++ ++ ++/* ++ * Initialise video for linux ++ */ ++ ++static int __init videodev_init(void) ++{ ++// printk(KERN_INFO "FIMC2.0 Built:"__DATE__" "__TIME__"\n%s\n",fimc_version); ++ return 0; ++} ++ ++static void __exit videodev_exit(void) ++{ ++} ++ ++module_init(videodev_init) ++module_exit(videodev_exit) ++ ++EXPORT_SYMBOL(video_register_device); ++EXPORT_SYMBOL(fimc_version); ++EXPORT_SYMBOL(video_unregister_device); ++EXPORT_SYMBOL(video_usercopy); ++EXPORT_SYMBOL(video_exclusive_open); ++EXPORT_SYMBOL(video_exclusive_release); ++ ++ ++MODULE_AUTHOR("SW.LEE "); ++MODULE_DESCRIPTION("VideoDev For FIMC2.0 MISC Drivers"); ++MODULE_LICENSE("GPL"); ++ ++ ++/* ++ * Local variables: ++ * c-basic-offset: 8 ++ * End: ++ */ +Index: linux-2.6.28/arch/arm/mach-s3c2440/camera/videodev.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-2.6.28/arch/arm/mach-s3c2440/camera/videodev.h 2009-01-02 00:01:56.000000000 +0100 +@@ -0,0 +1,108 @@ ++//#ifndef __LINUX_S3C_VIDEODEV_H ++//#define __LINUX_S3C_VIDEODEV_H ++ ++#include ++#include ++#include ++ ++#if 0 ++struct video_device ++{ ++ /* device info */ ++ // struct device *dev; ++ char name[32]; ++ int type; /* v4l1 */ ++ int type2; /* v4l2 */ ++ int hardware; ++ int minor; ++ ++ /* device ops + callbacks */ ++ struct file_operations *fops; ++ void (*release)(struct video_device *vfd); ++ ++ ++#if 1 /* to be removed in 2.7.x */ ++ /* obsolete -- fops->owner is used instead */ ++ struct module *owner; ++ /* dev->driver_data will be used instead some day. ++ * Use the video_{get|set}_drvdata() helper functions, ++ * so the switch over will be transparent for you. ++ * Or use {pci|usb}_{get|set}_drvdata() directly. */ ++ void *priv; ++#endif ++ ++ /* for videodev.c intenal usage -- please don't touch */ ++ int users; /* video_exclusive_{open|close} ... */ ++ struct semaphore lock; /* ... helper function uses these */ ++ char devfs_name[64]; /* devfs */ ++ // struct class_device class_dev; /* sysfs */ ++}; ++ ++#define VIDEO_MAJOR 81 ++ ++#define VFL_TYPE_GRABBER 0 ++ ++ ++extern int video_register_device(struct video_device *, int type, int nr); ++extern void video_unregister_device(struct video_device *); ++extern struct video_device* video_devdata(struct file*); ++ ++ ++ ++struct video_picture ++{ ++ __u16 brightness; ++ __u16 hue; ++ __u16 colour; ++ __u16 contrast; ++ __u16 whiteness; /* Black and white only */ ++ __u16 depth; /* Capture depth */ ++ __u16 palette; /* Palette in use */ ++#define VIDEO_PALETTE_GREY 1 /* Linear greyscale */ ++#define VIDEO_PALETTE_HI240 2 /* High 240 cube (BT848) */ ++#define VIDEO_PALETTE_RGB565 3 /* 565 16 bit RGB */ ++#define VIDEO_PALETTE_RGB24 4 /* 24bit RGB */ ++#define VIDEO_PALETTE_RGB32 5 /* 32bit RGB */ ++#define VIDEO_PALETTE_RGB555 6 /* 555 15bit RGB */ ++#define VIDEO_PALETTE_YUV422 7 /* YUV422 capture */ ++#define VIDEO_PALETTE_YUYV 8 ++#define VIDEO_PALETTE_UYVY 9 /* The great thing about standards is ... */ ++#define VIDEO_PALETTE_YUV420 10 ++#define VIDEO_PALETTE_YUV411 11 /* YUV411 capture */ ++#define VIDEO_PALETTE_RAW 12 /* RAW capture (BT848) */ ++#define VIDEO_PALETTE_YUV422P 13 /* YUV 4:2:2 Planar */ ++#define VIDEO_PALETTE_YUV411P 14 /* YUV 4:1:1 Planar */ ++#define VIDEO_PALETTE_YUV420P 15 /* YUV 4:2:0 Planar */ ++#define VIDEO_PALETTE_YUV410P 16 /* YUV 4:1:0 Planar */ ++#define VIDEO_PALETTE_PLANAR 13 /* start of planar entries */ ++#define VIDEO_PALETTE_COMPONENT 7 /* start of component entries */ ++}; ++ ++extern int video_exclusive_open(struct inode *inode, struct file *file); ++extern int video_exclusive_release(struct inode *inode, struct file *file); ++extern int video_usercopy(struct inode *inode, struct file *file, ++ unsigned int cmd, unsigned long arg, ++ int (*func)(struct inode *inode, struct file *file, ++ unsigned int cmd, void *arg)); ++ ++ ++ ++ ++#define VID_TYPE_CAPTURE 1 /* Can capture */ ++#define VID_TYPE_CLIPPING 32 /* Can clip */ ++#define VID_TYPE_FRAMERAM 64 /* Uses the frame buffer memory */ ++#define VID_TYPE_SCALES 128 /* Scalable */ ++#define VID_TYPE_SUBCAPTURE 512 /* Can capture subareas of the image */ ++ ++ ++ ++#endif ++//#endif ++ ++#define VID_HARDWARE_SAMSUNG_FIMC 255 ++ ++/* ++ * Local variables: ++ * c-basic-offset: 8 ++ * End: ++ */ +Index: linux-2.6.28/arch/arm/mach-s3c2440/camera/video-driver.c +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-2.6.28/arch/arm/mach-s3c2440/camera/video-driver.c 2009-01-02 00:01:56.000000000 +0100 +@@ -0,0 +1,624 @@ ++/* ++ Copyright (C) 2004 Samsung Electronics ++ SW.LEE ++ This program is free software; you can redistribute it and/or modify ++ it under the terms of the GNU General Public License as published by ++ the Free Software Foundation; either version 2 of the License, or ++ (at your option) any later version. ++*/ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++//#define SW_DEBUG ++#define CONFIG_VIDEO_V4L1_COMPAT ++#include ++#include "camif.h" ++#include "miscdevice.h" ++#include "cam_reg.h" ++#include "sensor.h" ++#include "userapp.h" ++ ++#ifdef Z_API ++#include "qt.h" ++#endif ++ ++/* Codec and Preview */ ++#define CAMIF_NUM 2 ++static camif_cfg_t fimc[CAMIF_NUM]; ++u32 *camregs; ++ ++static const char *driver_version = ++ "$Id: video-driver.c,v 1.9 2004/06/02 03:10:36 swlee Exp $"; ++extern const char *fimc_version; ++extern const char *fsm_version; ++ ++extern void camif_start_c_with_p (camif_cfg_t *cfg, camif_cfg_t *other); ++ ++camif_cfg_t * get_camif(int nr) ++{ ++ camif_cfg_t *ret = NULL; ++ switch(nr) { ++ case CODEC_MINOR: ++ ret = &fimc[0]; ++ break; ++ case PREVIEW_MINOR: ++ ret = &fimc[1]; ++ break; ++ default: ++ panic("Unknow Minor Number \n"); ++ } ++ return ret; ++} ++ ++ ++static int camif_codec_start(camif_cfg_t *cfg) ++{ ++ int ret = 0; ++ ret =camif_check_preview(cfg); ++ switch(ret) { ++ case 0: /* Play alone */ ++ DPRINTK("Start Alone \n"); ++ camif_4fsm_start(cfg); ++ cfg->gc->status |= C_WORKING; ++ break; ++ case -ERESTARTSYS: /* Busy , retry */ ++ //DPRINTK("Error \n"); ++ printk("Error \n"); ++ break; ++ case 1: ++ DPRINTK("need callback \n"); ++ ret = camif_callback_start(cfg); ++ if(ret < 0 ) { ++ printk(KERN_INFO "Busy RESTART \n"); ++ return ret; /* Busy, retry */ ++ } ++ break; ++ } ++ return ret; ++} ++ ++ ++ssize_t camif_write (struct file *f, const char *b, size_t c,loff_t *offset) ++{ ++ camif_cfg_t *cfg; ++ ++ c = 0; /* return value */ ++ DPRINTK("\n"); ++ cfg = get_camif(MINOR(f->f_dentry->d_inode->i_rdev)); ++ switch (*b) { ++ case 'O': ++ if (cfg->dma_type & CAMIF_PREVIEW) { ++ if (cfg->gc->status & C_WORKING) { ++ camif_start_c_with_p(cfg,get_camif(CODEC_MINOR)); ++ } ++ else { ++ camif_4fsm_start(cfg); ++ } ++ } ++ else{ ++ c = camif_codec_start(cfg); ++ if(c < 0) c = 1; /* Error and neet to retry */ ++ } ++ ++ break; ++ case 'X': ++ camif_p_stop(cfg); ++ break; ++ default: ++ panic("CAMERA:camif_write: Unexpected Param\n"); ++ } ++ DPRINTK("end\n"); ++ ++ return c; ++} ++ ++ ++ssize_t camif_p_read(struct file *file, char *buf, size_t count, loff_t *pos) ++{ ++ camif_cfg_t *cfg = NULL; ++ size_t end; ++ ++ cfg = get_camif(MINOR(file->f_dentry->d_inode->i_rdev)); ++ cfg->status = CAMIF_STARTED; ++ ++ if (wait_event_interruptible(cfg->waitq,cfg->status == CAMIF_INT_HAPPEN)) ++ return -ERESTARTSYS; ++ ++ cfg->status = CAMIF_STOPPED; ++ end = min_t(size_t, cfg->pp_totalsize /cfg->pp_num, count); ++ if (copy_to_user(buf, camif_g_frame(cfg), end)) ++ return -EFAULT; ++ ++ return end; ++} ++ ++ ++static ssize_t ++camif_c_read(struct file *file, char *buf, size_t count, loff_t *pos) ++{ ++ camif_cfg_t *cfg = NULL; ++ size_t end; ++ ++ /* cfg = file->private_data; */ ++ cfg = get_camif(MINOR(file->f_dentry->d_inode->i_rdev)); ++#if 0 ++ if(file->f_flags & O_NONBLOCK) { ++ printk(KERN_ERR"Don't Support NON_BLOCK \n"); ++ } ++#endif ++ ++ /* Change the below wait_event_interruptible func */ ++ if (wait_event_interruptible(cfg->waitq,cfg->status == CAMIF_INT_HAPPEN)) ++ return -ERESTARTSYS; ++ cfg->status = CAMIF_STOPPED; ++ end = min_t(size_t, cfg->pp_totalsize /cfg->pp_num, count); ++ if (copy_to_user(buf, camif_g_frame(cfg), end)) ++ return -EFAULT; ++ return end; ++} ++ ++ ++static irqreturn_t camif_c_irq(int irq, void *dev_id) ++{ ++ camif_cfg_t *cfg = (camif_cfg_t *)dev_id; ++ ++ DPRINTK("\n"); ++ camif_g_fifo_status(cfg); ++ camif_g_frame_num(cfg); ++ if(camif_enter_c_4fsm(cfg) != INSTANT_SKIP) ++ wake_up_interruptible(&cfg->waitq); ++ ++ return IRQ_HANDLED; ++} ++ ++static irqreturn_t camif_p_irq(int irq, void *dev_id) ++{ ++ camif_cfg_t *cfg = (camif_cfg_t *)dev_id; ++ ++ DPRINTK("\n"); ++ camif_g_fifo_status(cfg); ++ camif_g_frame_num(cfg); ++ if(camif_enter_p_4fsm(cfg) != INSTANT_SKIP) ++ wake_up_interruptible(&cfg->waitq); ++#if 0 ++ if( (cfg->perf.frames % 5) == 0) ++ DPRINTK("5\n"); ++#endif ++ ++ return IRQ_HANDLED; ++} ++ ++static void camif_release_irq(camif_cfg_t *cfg) ++{ ++ disable_irq(cfg->irq); ++ free_irq(cfg->irq, cfg); ++} ++ ++static int camif_irq_request(camif_cfg_t *cfg) ++{ ++ int ret = 0; ++ ++ if (cfg->dma_type & CAMIF_CODEC) { ++ if ((ret = request_irq(cfg->irq, camif_c_irq, ++ 0, cfg->shortname, cfg))) { ++ printk("request_irq(CAM_C) failed.\n"); ++ } ++ } ++ if (cfg->dma_type & CAMIF_PREVIEW) { ++ if ((ret = request_irq(cfg->irq, camif_p_irq, ++ 0, cfg->shortname, cfg))) { ++ printk("request_irq(CAM_P) failed.\n"); ++ } ++ } ++ return 0; ++} ++ ++static void camif_init_sensor(camif_cfg_t *cfg) ++{ ++ camif_gc_t *gc = cfg->gc; ++ if (!gc->sensor) ++ panic("CAMERA:I2C Client(Img Sensor)Not registered\n"); ++ if(!gc->init_sensor) { ++ camif_reset(gc->reset_type, gc->reset_udelay); ++ gc->sensor->driver->command(gc->sensor,SENSOR_INIT,NULL); ++ gc->init_sensor = 1; /*sensor init done */ ++ } ++ gc->sensor->driver->command(gc->sensor, USER_ADD, NULL); ++} ++ ++static int camif_open(struct inode *inode, struct file *file) ++{ ++ int err; ++ camif_cfg_t * cfg = get_camif(MINOR(inode->i_rdev)); ++ ++ if(cfg->dma_type & CAMIF_PREVIEW) { ++ if(down_interruptible(&cfg->gc->lock)) ++ return -ERESTARTSYS; ++ if (cfg->dma_type & CAMIF_PREVIEW) { ++ cfg->gc->status &= ~PNOTWORKING; ++ } ++ up(&cfg->gc->lock); ++ } ++ err = video_exclusive_open(inode,file); ++ cfg->gc->user++; ++ cfg->status = CAMIF_STOPPED; ++ if (err < 0) return err; ++ if (file->f_flags & O_NONCAP ) { ++ printk("Don't Support Non-capturing open \n"); ++ return 0; ++ } ++ file->private_data = cfg; ++ camif_irq_request(cfg); ++ camif_init_sensor(cfg); ++ return 0; ++} ++ ++#if 0 ++static void print_pregs(void) ++{ ++ printk(" CISRCFMT 0x%08X \n", CISRCFMT); ++ printk(" CIWDOFST 0x%08X \n", CIWDOFST); ++ printk(" CIGCTRL 0x%08X \n", CIGCTRL); ++ printk(" CIPRTRGFMT 0x%08X \n", CIPRTRGFMT); ++ printk(" CIPRCTRL 0x%08X \n", CIPRCTRL); ++ printk(" CIPRSCPRERATIO 0x%08X \n", CIPRSCPRERATIO); ++ printk(" CIPRSCPREDST 0x%08X \n", CIPRSCPREDST); ++ printk(" CIPRSCCTRL 0x%08X \n", CIPRSCCTRL); ++ printk(" CIPRTAREA 0x%08X \n", CIPRTAREA); ++ printk(" CIPRSTATUS 0x%08X \n", CIPRSTATUS); ++ printk(" CIIMGCPT 0x%08X \n", CIIMGCPT); ++} ++ ++static void print_cregs(void) ++{ ++ printk(" CISRCFMT 0x%08X \n", CISRCFMT); ++ printk(" CIWDOFST 0x%08X \n", CIWDOFST); ++ printk(" CIGCTRL 0x%08X \n", CIGCTRL); ++ printk(" CICOCTRL 0x%8X \n", CICOCTRL); ++ printk(" CICOSCPRERATIO 0x%08X \n", CICOSCPRERATIO); ++ printk(" CICOSCPREDST 0x%08X \n", CICOSCPREDST); ++ printk(" CICOSCCTRL 0x%08X \n", CICOSCCTRL); ++ printk(" CICOTAREA 0x%08X \n", CICOTAREA); ++ printk(" CICOSTATUS 0x%8X \n", CICOSTATUS); ++ printk(" CIIMGCPT 0x%08X \n", CIIMGCPT); ++} ++#endif ++ ++ ++static int camif_release(struct inode *inode, struct file *file) ++{ ++ camif_cfg_t * cfg = get_camif(MINOR(inode->i_rdev)); ++ ++ //DPRINTK(" cfg->status 0x%0X cfg->gc->status 0x%0X \n", cfg->status,cfg->gc->status ); ++ if (cfg->dma_type & CAMIF_PREVIEW) { ++ if(down_interruptible(&cfg->gc->lock)) ++ return -ERESTARTSYS; ++ cfg->gc->status &= ~PWANT2START; ++ cfg->gc->status |= PNOTWORKING; ++ up(&cfg->gc->lock); ++ } ++ else { ++ cfg->gc->status &= ~CWANT2START; /* No need semaphore */ ++ } ++ camif_dynamic_close(cfg); ++ camif_release_irq(cfg); ++ video_exclusive_release(inode,file); ++ camif_p_stop(cfg); ++ cfg->gc->sensor->driver->command(cfg->gc->sensor, USER_EXIT, NULL); ++ cfg->gc->user--; ++ cfg->status = CAMIF_STOPPED; ++ return 0; ++} ++ ++static void fimc_config(camif_cfg_t *cfg,u32 x, u32 y, int bpp) ++{ ++ cfg->target_x = x; ++ cfg->target_y = y; ++ ++ switch (bpp) { ++ case 16: ++ cfg->fmt = CAMIF_RGB16; ++ break; ++ case 24: ++ cfg->fmt = CAMIF_RGB24; ++ break; ++ case 420: ++ cfg->fmt = CAMIF_IN_YCBCR422|CAMIF_OUT_YCBCR420; ++ break; ++ case 422: ++ cfg->fmt = CAMIF_IN_YCBCR422|CAMIF_OUT_YCBCR422; ++ break; ++ default: ++ panic("Wrong BPP \n"); ++ } ++} ++ ++ ++static int ++camif_ioctl(struct inode *inode, struct file *file, unsigned int cmd, unsigned long arg) ++{ ++ int ret = 0; ++ camif_cfg_t *cfg = file->private_data; ++ camif_param_t par; ++ ++ switch (cmd) { ++ case CMD_CAMERA_INIT: ++ if (copy_from_user(&par,(camif_param_t *)arg, ++ sizeof(camif_param_t))) ++ return -EFAULT; ++ fimc_config(cfg,par.dst_x, par.dst_y, par.bpp); ++ if (camif_dynamic_open(cfg)) { ++ printk(" Eror Happens \n"); ++ ret = -1; ++ } ++ ++ switch (par.flip) { ++ case 3 : ++ cfg->flip = CAMIF_FLIP_MIRROR; ++ break; ++ case 1 : ++ cfg->flip = CAMIF_FLIP_X; ++ break; ++ case 2 : ++ cfg->flip = CAMIF_FLIP_Y; ++ break; ++ case 0 : ++ default: ++ cfg->flip = CAMIF_FLIP; ++ } ++ break; ++ /* Todo ++ case CMD_SENSOR_BRIGHTNESS: ++ cfg->gc->sensor->driver->command(cfg->gc->sensor, SENSOR_BRIGHTNESS, NULL); ++ break; ++ */ ++ default: ++ ret = -EINVAL; ++ break; ++ } ++ ++ return ret; ++} ++ ++ ++#if 0 ++static int camif_ioctl(struct inode *inode, struct file *file, ++ unsigned int cmd, unsigned long arg) ++{ ++// camif_cfg_t *cfg = file->private_data; ++ ++ ++ switch (cmd) { ++/* case Some_other_action */ ++ default: ++ return video_usercopy(inode, file, cmd, arg, camif_do_ioctl); ++ } ++} ++#endif ++ ++static struct file_operations camif_c_fops = ++{ ++ .owner = THIS_MODULE, ++ .open = camif_open, ++ .release = camif_release, ++ .ioctl = camif_ioctl, ++ .read = camif_c_read, ++ .write = camif_write, ++}; ++ ++static struct file_operations camif_p_fops = ++{ ++ .owner = THIS_MODULE, ++ .open = camif_open, ++ .release = camif_release, ++ .ioctl = camif_ioctl, ++#ifdef Z_API ++ .read = z_read, ++ .write = z_write, ++#else ++ .read = camif_p_read, ++ .write = camif_write, ++#endif ++}; ++ ++static struct video_device codec_template = ++{ ++ .name = "CODEC_IF", ++ .type = VID_TYPE_CAPTURE|VID_TYPE_CLIPPING|VID_TYPE_SCALES, ++/* .hardware = VID_HARDWARE_SAMSUNG_FIMC20, */ ++ .fops = &camif_c_fops, ++// .release = camif_release ++ .minor = -1, ++}; ++ ++static struct video_device preview_template = ++{ ++ .name = "PREVIEW_IF", ++ .type = VID_TYPE_CAPTURE|VID_TYPE_CLIPPING|VID_TYPE_SCALES, ++/* .hardware = VID_HARDWARE_SAMSUNG_FIMC20, */ ++ .fops = &camif_p_fops, ++ .minor = -1, ++}; ++ ++static int preview_init(camif_cfg_t *cfg) ++{ ++ char name[16]="CAM_PREVIEW"; ++ ++ memset(cfg, 0, sizeof(camif_cfg_t)); ++ cfg->target_x = 640; ++ cfg->target_y = 480; ++ cfg->pp_num = 4; ++ cfg->dma_type = CAMIF_PREVIEW; ++ cfg->fmt = CAMIF_RGB16; ++ cfg->flip = CAMIF_FLIP_Y; ++ cfg->v = &preview_template; ++ mutex_init(&cfg->v->lock); ++ cfg->irq = IRQ_S3C2440_CAM_P; ++ ++ strcpy(cfg->shortname,name); ++ init_waitqueue_head(&cfg->waitq); ++ cfg->status = CAMIF_STOPPED; ++ return cfg->status; ++} ++ ++static int codec_init(camif_cfg_t *cfg) ++{ ++ char name[16]="CAM_CODEC"; ++ ++ memset(cfg, 0, sizeof(camif_cfg_t)); ++ cfg->target_x = 176; ++ cfg->target_y = 144; ++ cfg->pp_num = 4; ++ cfg->dma_type = CAMIF_CODEC; ++ cfg->fmt = CAMIF_IN_YCBCR422|CAMIF_OUT_YCBCR420; ++ cfg->flip = CAMIF_FLIP_X; ++ cfg->v = &codec_template; ++ mutex_init(&cfg->v->lock); ++ cfg->irq = IRQ_S3C2440_CAM_C; ++ strcpy(cfg->shortname,name); ++ init_waitqueue_head(&cfg->waitq); ++ cfg->status = CAMIF_STOPPED; ++ return cfg->status; ++} ++ ++static void camif_init(void) ++{ ++ camif_setup_sensor(); ++} ++ ++ ++ ++static void print_version(void) ++{ ++ printk(KERN_INFO"FIMC built:"__DATE__ " "__TIME__"\n%s\n%s\n%s\n", ++ fimc_version, driver_version,fsm_version); ++} ++ ++ ++static int camif_m_in(void) ++{ ++ int ret = -EINVAL; ++ camif_cfg_t * cfg; ++ ++ printk(KERN_INFO"Starting S3C2440 Camera Driver\n"); ++ ++ camregs = ioremap(CAM_BASE_ADD, 0x100); ++ if (!camregs) { ++ printk(KERN_ERR"Unable to map camera regs\n"); ++ ret = -ENOMEM; ++ goto bail1; ++ } ++ ++ camif_init(); ++ cfg = get_camif(CODEC_MINOR); ++ codec_init(cfg); ++ ++ ret = video_register_device(cfg->v,0,CODEC_MINOR); ++ if (ret) { ++ printk(KERN_ERR"Couldn't register codec driver.\n"); ++ goto bail2; ++ } ++ cfg = get_camif(PREVIEW_MINOR); ++ preview_init(cfg); ++ ret = video_register_device(cfg->v,0,PREVIEW_MINOR); ++ if (ret) { ++ printk(KERN_ERR"Couldn't register preview driver.\n"); ++ goto bail3; /* hm seems it us unregistered the once */ ++ } ++ ++ print_version(); ++ return 0; ++ ++bail3: ++ video_unregister_device(cfg->v); ++bail2: ++ iounmap(camregs); ++ camregs = NULL; ++bail1: ++ return ret; ++} ++ ++static void unconfig_device(camif_cfg_t *cfg) ++{ ++ video_unregister_device(cfg->v); ++ camif_hw_close(cfg); ++ iounmap(camregs); ++ //memset(cfg, 0, sizeof(camif_cfg_t)); ++ camregs = NULL; ++} ++ ++static void camif_m_out(void) /* module out */ ++{ ++ camif_cfg_t *cfg; ++ ++ cfg = get_camif(CODEC_MINOR); ++ unconfig_device(cfg); ++ cfg = get_camif(PREVIEW_MINOR); ++ unconfig_device(cfg); ++ ++ return; ++} ++ ++void camif_register_decoder(struct i2c_client *ptr) ++{ ++ camif_cfg_t *cfg; ++ void * data = i2c_get_clientdata(ptr); ++ ++ cfg =get_camif(CODEC_MINOR); ++ cfg->gc = (camif_gc_t *)(data); ++ ++ cfg =get_camif(PREVIEW_MINOR); ++ cfg->gc = (camif_gc_t *)(data); ++ ++ sema_init(&cfg->gc->lock, 1); /* global lock for both Codec and Preview */ ++ cfg->gc->status |= PNOTWORKING; /* Default Value */ ++ camif_hw_open(cfg->gc); ++} ++ ++void camif_unregister_decoder(struct i2c_client *ptr) ++{ ++ camif_gc_t *gc; ++ void * data = i2c_get_clientdata(ptr); ++ ++ gc = (camif_gc_t *)(data); ++ gc->init_sensor = 0; /* need to modify */ ++} ++ ++module_init(camif_m_in); ++module_exit(camif_m_out); ++ ++EXPORT_SYMBOL(camif_register_decoder); ++EXPORT_SYMBOL(camif_unregister_decoder); ++ ++MODULE_AUTHOR("SW.LEE "); ++MODULE_DESCRIPTION("Video-Driver For Fimc2.0 MISC Drivers"); ++MODULE_LICENSE("GPL"); ++ ++ ++/* ++ * Local variables: ++ * c-basic-offset: 8 ++ * End: ++ */ +Index: linux-2.6.28/arch/arm/mach-s3c2440/dma.c +=================================================================== +--- linux-2.6.28.orig/arch/arm/mach-s3c2440/dma.c 2008-12-25 00:26:37.000000000 +0100 ++++ linux-2.6.28/arch/arm/mach-s3c2440/dma.c 2009-01-02 00:01:56.000000000 +0100 +@@ -25,12 +25,12 @@ + + #include + #include +-#include ++#include + #include + #include + #include + #include +-#include ++#include + + static struct s3c24xx_dma_map __initdata s3c2440_dma_mappings[] = { + [DMACH_XD0] = { +Index: linux-2.6.28/arch/arm/mach-s3c2440/fiq_c_isr.c +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-2.6.28/arch/arm/mach-s3c2440/fiq_c_isr.c 2009-01-02 00:01:56.000000000 +0100 +@@ -0,0 +1,321 @@ ++/* ++ * Copyright 2007 Andy Green ++ * S3C modfifications ++ * Copyright 2008 Andy Green ++ */ ++ ++#include ++#include ++#include ++#include ++#include "fiq_c_isr.h" ++#include ++#include ++#include ++#include ++ ++#include ++ ++#include ++#include ++ ++#include ++#include ++ ++/* ++ * Major Caveats for using FIQ ++ * --------------------------- ++ * ++ * 1) it CANNOT touch any vmalloc()'d memory, only memory ++ * that was kmalloc()'d. Static allocations in the monolithic kernel ++ * are kmalloc()'d so they are okay. You can touch memory-mapped IO, but ++ * the pointer for it has to have been stored in kmalloc'd memory. The ++ * reason for this is simple: every now and then Linux turns off interrupts ++ * and reorders the paging tables. If a FIQ happens during this time, the ++ * virtual memory space can be partly or entirely disordered or missing. ++ * ++ * 2) Because vmalloc() is used when a module is inserted, THIS FIQ ++ * ISR HAS TO BE IN THE MONOLITHIC KERNEL, not a module. But the way ++ * it is set up, you can all to enable and disable it from your module ++ * and intercommunicate with it through struct fiq_ipc ++ * fiq_ipc which you can define in ++ * asm/archfiq_ipc_type.h. The reason is the same as above, a ++ * FIQ could happen while even the ISR is not present in virtual memory ++ * space due to pagetables being changed at the time. ++ * ++ * 3) You can't call any Linux API code except simple macros ++ * - understand that FIQ can come in at any time, no matter what ++ * state of undress the kernel may privately be in, thinking it ++ * locked the door by turning off interrupts... FIQ is an ++ * unstoppable monster force (which is its value) ++ * - they are not vmalloc()'d memory safe ++ * - they might do crazy stuff like sleep: FIQ pisses fire and ++ * is not interested in 'sleep' that the weak seem to need ++ * - calling APIs from FIQ can re-enter un-renterable things ++ * - summary: you cannot interoperate with linux APIs directly in the FIQ ISR ++ * ++ * If you follow these rules, it is fantastic, an extremely powerful, solid, ++ * genuine hard realtime feature. ++ * ++ */ ++ ++/* more than enough to cover our jump instruction to the isr */ ++#define SIZEOF_FIQ_JUMP 4 ++ ++#define FIQ_VECTOR 0xffff001c ++ ++/* we put the stack at the area after the FIQ vector */ ++#define FIQ_STACK_SIZE 256 ++ ++/* only one FIQ ISR possible, okay to do these here */ ++u32 _fiq_ack_mask; /* used by isr exit define */ ++unsigned long _fiq_count_fiqs; /* used by isr exit define */ ++static int _fiq_irq; /* private ; irq index we were started with, or 0 */ ++struct s3c2410_pwm pwm_timer_fiq; ++int _fiq_timer_index; ++u16 _fiq_timer_divisor; ++u8 fiq_ready; ++ ++/* this function must live in the monolithic kernel somewhere! A module is ++ * NOT good enough! ++ */ ++extern void __attribute__ ((naked)) s3c2440_fiq_isr(void); ++ ++static void fiq_set_vector_and_regs(void); ++ ++ ++/* this is copied into the hard FIQ vector during init */ ++ ++static void __attribute__ ((naked)) s3c2440_FIQ_Branch(void) ++{ ++ asm __volatile__ ( ++ "mov pc, r8 ; " ++ ); ++} ++ ++/* sysfs */ ++ ++static ssize_t show_count(struct device *dev, struct device_attribute *attr, ++ char *buf) ++{ ++ return sprintf(buf, "%ld\n", _fiq_count_fiqs); ++} ++ ++static DEVICE_ATTR(count, 0444, show_count, NULL); ++ ++static struct attribute *s3c2440_fiq_sysfs_entries[] = { ++ &dev_attr_count.attr, ++ NULL ++}; ++ ++static struct attribute_group s3c2440_fiq_attr_group = { ++ .name = "fiq", ++ .attrs = s3c2440_fiq_sysfs_entries, ++}; ++ ++/* ++ * call this from your kernel module to set up the FIQ ISR to service FIQs, ++ * You need to have configured your FIQ input pin before anything will happen ++ * ++ * call it with, eg, IRQ_TIMER3 from asm-arm/arch-s3c2410/irqs.h ++ * ++ * you still need to clear the source interrupt in S3C2410_INTMSK to get ++ * anything good happening ++ */ ++static int fiq_init_irq_source(int irq_index_fiq) ++{ ++ int rc = 0; ++ ++ if (!irq_index_fiq) /* no interrupt */ ++ goto bail; ++ ++ local_fiq_disable(); ++ ++ _fiq_irq = irq_index_fiq; ++ _fiq_ack_mask = 1 << (irq_index_fiq - S3C2410_CPUIRQ_OFFSET); ++ _fiq_timer_index = (irq_index_fiq - IRQ_TIMER0); ++ ++ /* set up the timer to operate as a pwm device */ ++ ++ rc = s3c2410_pwm_init(&pwm_timer_fiq); ++ if (rc) ++ goto bail; ++ ++ pwm_timer_fiq.timerid = PWM0 + _fiq_timer_index; ++ pwm_timer_fiq.prescaler = (6 - 1) / 2; ++ pwm_timer_fiq.divider = S3C2410_TCFG1_MUX3_DIV2; ++ /* default rate == ~32us */ ++ pwm_timer_fiq.counter = pwm_timer_fiq.comparer = 3000; ++ ++ rc = s3c2410_pwm_enable(&pwm_timer_fiq); ++ if (rc) ++ goto bail; ++ ++ s3c2410_pwm_start(&pwm_timer_fiq); ++ ++ _fiq_timer_divisor = 0xffff; /* so kick will work initially */ ++ ++ /* let our selected interrupt be a magic FIQ interrupt */ ++ __raw_writel(_fiq_ack_mask, S3C2410_INTMOD); ++ ++ /* it's ready to go as soon as we unmask the source in S3C2410_INTMSK */ ++ local_fiq_enable(); ++bail: ++ return rc; ++} ++ ++ ++/* call this from your kernel module to disable generation of FIQ actions */ ++static void fiq_disable_irq_source(void) ++{ ++ /* nothing makes FIQ any more */ ++ __raw_writel(0, S3C2410_INTMOD); ++ local_fiq_disable(); ++ _fiq_irq = 0; /* no active source interrupt now either */ ++} ++ ++/* ++ * fiq_kick() forces a FIQ event to happen shortly after leaving the routine ++ */ ++void fiq_kick(void) ++{ ++ unsigned long flags; ++ u32 tcon; ++ ++ if (!fiq_ready) { ++ printk(KERN_ERR "fiq_kick called before fiq probed\n"); ++ return; ++ } ++ ++ /* we have to take care about FIQ because this modification is ++ * non-atomic, FIQ could come in after the read and before the ++ * writeback and its changes to the register would be lost ++ * (platform INTMSK mod code is taken care of already) ++ */ ++ local_save_flags(flags); ++ local_fiq_disable(); ++ /* allow FIQs to resume */ ++ __raw_writel(__raw_readl(S3C2410_INTMSK) & ++ ~(1 << (_fiq_irq - S3C2410_CPUIRQ_OFFSET)), ++ S3C2410_INTMSK); ++ tcon = __raw_readl(S3C2410_TCON) & ~S3C2410_TCON_T3START; ++ /* fake the timer to a count of 1 */ ++ __raw_writel(1, S3C2410_TCNTB(_fiq_timer_index)); ++ __raw_writel(tcon | S3C2410_TCON_T3MANUALUPD, S3C2410_TCON); ++ __raw_writel(tcon | S3C2410_TCON_T3MANUALUPD | S3C2410_TCON_T3START, ++ S3C2410_TCON); ++ __raw_writel(tcon | S3C2410_TCON_T3START, S3C2410_TCON); ++ local_irq_restore(flags); ++} ++EXPORT_SYMBOL_GPL(fiq_kick); ++ ++ ++ ++ ++static int __init sc32440_fiq_probe(struct platform_device *pdev) ++{ ++ struct resource *r = platform_get_resource(pdev, IORESOURCE_IRQ, 0); ++ struct sc32440_fiq_platform_data *pdata = pdev->dev.platform_data; ++ int ret; ++ ++ if (!r) ++ return -EIO; ++ ++ /* configure for the interrupt we are meant to use */ ++ printk(KERN_INFO "Enabling FIQ using irq %d\n", r->start); ++ ++ fiq_set_vector_and_regs(); ++ fiq_init_irq_source(r->start); ++ ++ ret = sysfs_create_group(&pdev->dev.kobj, &s3c2440_fiq_attr_group); ++ if (ret) ++ return ret; ++ ++ fiq_ready = 1; ++ ++ /* ++ * if wanted, users can defer registration of devices ++ * that depend on FIQ until after we register, and can use our ++ * device as parent so suspend-resume ordering is correct ++ */ ++ if (pdata->attach_child_devices) ++ (pdata->attach_child_devices)(&pdev->dev); ++ ++ return 0; ++} ++ ++static int sc32440_fiq_remove(struct platform_device *pdev) ++{ ++ fiq_disable_irq_source(); ++ sysfs_remove_group(&pdev->dev.kobj, &s3c2440_fiq_attr_group); ++ ++ return 0; ++} ++ ++static void fiq_set_vector_and_regs(void) ++{ ++ struct pt_regs regs; ++ ++ /* prep the special FIQ mode regs */ ++ memset(®s, 0, sizeof(regs)); ++ regs.ARM_r8 = (unsigned long)s3c2440_fiq_isr; ++ regs.ARM_r10 = FIQ_VECTOR + SIZEOF_FIQ_JUMP; ++ regs.ARM_sp = FIQ_VECTOR + SIZEOF_FIQ_JUMP + FIQ_STACK_SIZE - 4; ++ ++ /* copy our jump to the real ISR into the hard vector address */ ++ set_fiq_handler(s3c2440_FIQ_Branch, SIZEOF_FIQ_JUMP); ++ ++ /* set up the special FIQ-mode-only registers from our regs */ ++ set_fiq_regs(®s); ++} ++ ++#ifdef CONFIG_PM ++static int sc32440_fiq_suspend(struct platform_device *pdev, pm_message_t state) ++{ ++ /* nothing makes FIQ any more */ ++ __raw_writel(0, S3C2410_INTMOD); ++ local_fiq_disable(); ++ ++ return 0; ++} ++ ++static int sc32440_fiq_resume(struct platform_device *pdev) ++{ ++ fiq_set_vector_and_regs(); ++ fiq_init_irq_source(_fiq_irq); ++ return 0; ++} ++#else ++#define sc32440_fiq_suspend NULL ++#define sc32440_fiq_resume NULL ++#endif ++ ++static struct platform_driver sc32440_fiq_driver = { ++ .driver = { ++ .name = "sc32440_fiq", ++ .owner = THIS_MODULE, ++ }, ++ ++ .probe = sc32440_fiq_probe, ++ .remove = __devexit_p(sc32440_fiq_remove), ++ .suspend = sc32440_fiq_suspend, ++ .resume = sc32440_fiq_resume, ++}; ++ ++static int __init sc32440_fiq_init(void) ++{ ++ fiq_set_vector_and_regs(); ++ ++ return platform_driver_register(&sc32440_fiq_driver); ++} ++ ++static void __exit sc32440_fiq_exit(void) ++{ ++ fiq_disable_irq_source(); ++} ++ ++MODULE_AUTHOR("Andy Green "); ++MODULE_LICENSE("GPL"); ++ ++module_init(sc32440_fiq_init); ++module_exit(sc32440_fiq_exit); +Index: linux-2.6.28/arch/arm/mach-s3c2440/fiq_c_isr.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-2.6.28/arch/arm/mach-s3c2440/fiq_c_isr.h 2009-01-02 00:01:56.000000000 +0100 +@@ -0,0 +1,76 @@ ++#ifndef _LINUX_FIQ_C_ISR_H ++#define _LINUX_FIQ_C_ISR_H ++ ++#include ++#include ++ ++extern unsigned long _fiq_count_fiqs; ++extern u32 _fiq_ack_mask; ++extern int _fiq_timer_index; ++extern u16 _fiq_timer_divisor; ++ ++/* platform data */ ++ ++struct sc32440_fiq_platform_data { ++ /* ++ * give an opportunity to use us as parent for ++ * devices that depend on us ++ */ ++ void (*attach_child_devices)(struct device *parent_device); ++}; ++ ++/* This CANNOT be implemented in a module -- it has to be used in code ++ * included in the monolithic kernel ++ */ ++ ++#define FIQ_HANDLER_START() \ ++void __attribute__ ((naked)) s3c2440_fiq_isr(void) \ ++{\ ++ /*\ ++ * you can declare local vars here, take care to set the frame size\ ++ * below accordingly if there are more than a few dozen bytes of them\ ++ */\ ++ ++/* stick your locals here :-) ++ * Do NOT initialize them here! define them and initialize them after ++ * FIQ_HANDLER_ENTRY() is done. ++ */ ++ ++#define FIQ_HANDLER_ENTRY(LOCALS, FRAME) \ ++ const int _FIQ_FRAME_SIZE = FRAME; \ ++ /* entry takes care to store registers we will be treading on here */\ ++ asm __volatile__ (\ ++ /* stash FIQ and r0-r8 normal regs */\ ++ "stmdb sp!, {r0-r12, lr};"\ ++ /* allow SP to get some space */\ ++ "sub sp, sp, %1 ;"\ ++ /* !! THIS SETS THE FRAME, adjust to > sizeof locals */\ ++ "sub fp, sp, %0 ;"\ ++ :\ ++ : "rI" (LOCALS), "rI" (FRAME)\ ++ :"r9"\ ++ ); ++ ++/* stick your ISR code here and then end with... */ ++ ++#define FIQ_HANDLER_END() \ ++ _fiq_count_fiqs++;\ ++ __raw_writel(_fiq_ack_mask, S3C2410_SRCPND);\ ++\ ++ /* exit back to normal mode restoring everything */\ ++ asm __volatile__ (\ ++ /* pop our allocation */\ ++ "add sp, sp, %0 ;"\ ++ /* return FIQ regs back to pristine state\ ++ * and get normal regs back\ ++ */\ ++ "ldmia sp!, {r0-r12, lr};"\ ++\ ++ /* return */\ ++ "subs pc, lr, #4;"\ ++ : \ ++ : "rI" (_FIQ_FRAME_SIZE) \ ++ );\ ++} ++ ++#endif /* _LINUX_FIQ_C_ISR_H */ +Index: linux-2.6.28/arch/arm/mach-s3c2440/Kconfig +=================================================================== +--- linux-2.6.28.orig/arch/arm/mach-s3c2440/Kconfig 2008-12-25 00:26:37.000000000 +0100 ++++ linux-2.6.28/arch/arm/mach-s3c2440/Kconfig 2009-01-02 00:01:56.000000000 +0100 +@@ -22,12 +22,20 @@ config S3C2440_DMA + help + Support for S3C2440 specific DMA code5A + ++config S3C2440_C_FIQ ++ bool "FIQ ISR support in C" ++ depends on ARCH_S3C2410 ++ select FIQ ++ help ++ Support for S3C2440 FIQ support in C -- see ++ ./arch/arm/mach-s3c2440/fiq_c_isr.c + + menu "S3C2440 Machines" + + config MACH_ANUBIS + bool "Simtec Electronics ANUBIS" + select CPU_S3C2440 ++ select S3C24XX_DCLK + select PM_SIMTEC if PM + select HAVE_PATA_PLATFORM + help +@@ -37,6 +45,7 @@ config MACH_ANUBIS + config MACH_OSIRIS + bool "Simtec IM2440D20 (OSIRIS) module" + select CPU_S3C2440 ++ select S3C24XX_DCLK + select PM_SIMTEC if PM + help + Say Y here if you are using the Simtec IM2440D20 module, also +@@ -74,5 +83,30 @@ config MACH_AT2440EVB + help + Say Y here if you are using the AT2440EVB development board + ++config MACH_NEO1973_GTA02 ++ bool "FIC Neo1973 GSM Phone (GTA02 Hardware)" ++ select CPU_S3C2442 ++ select MFD_PCF50633 ++ select INPUT_PCF50633_PMU ++ select PCF50633_ADC ++ select PCF50633_GPIO ++ select RTC_DRV_PCF50633 ++ select REGULATOR_PCF50633 ++ select CHARGER_PCF50633 ++ select POWER_SUPPLY ++ select GTA02_HDQ ++ select MACH_NEO1973 ++ help ++ Say Y here if you are using the FIC Neo1973 GSM Phone ++ ++config NEO1973_GTA02_2440 ++ bool "Old FIC Neo1973 GTA02 hardware using S3C2440 CPU" ++ depends on MACH_NEO1973_GTA02 ++ select CPU_S3C2440 ++ help ++ Say Y here if you are using an early hardware revision ++ of the FIC/Openmoko Neo1973 GTA02 GSM Phone. ++ + endmenu + ++#source "arch/arm/mach-s3c2440/camera/Kconfig" +Index: linux-2.6.28/arch/arm/mach-s3c2440/mach-anubis.c +=================================================================== +--- linux-2.6.28.orig/arch/arm/mach-s3c2440/mach-anubis.c 2008-12-25 00:26:37.000000000 +0100 ++++ linux-2.6.28/arch/arm/mach-s3c2440/mach-anubis.c 2009-01-02 00:01:56.000000000 +0100 +@@ -39,7 +39,8 @@ + #include + #include + #include +-#include ++#include ++#include + + #include + #include +@@ -404,7 +405,7 @@ static struct platform_device *anubis_de + &s3c_device_usb, + &s3c_device_wdt, + &s3c_device_adc, +- &s3c_device_i2c, ++ &s3c_device_i2c0, + &s3c_device_rtc, + &s3c_device_nand, + &anubis_device_ide0, +@@ -468,6 +469,7 @@ static void __init anubis_map_io(void) + + static void __init anubis_init(void) + { ++ s3c_i2c0_set_platdata(NULL); + platform_add_devices(anubis_devices, ARRAY_SIZE(anubis_devices)); + + i2c_register_board_info(0, anubis_i2c_devs, +Index: linux-2.6.28/arch/arm/mach-s3c2440/mach-at2440evb.c +=================================================================== +--- linux-2.6.28.orig/arch/arm/mach-s3c2440/mach-at2440evb.c 2008-12-25 00:26:37.000000000 +0100 ++++ linux-2.6.28/arch/arm/mach-s3c2440/mach-at2440evb.c 2009-01-02 00:01:56.000000000 +0100 +@@ -35,7 +35,8 @@ + #include + #include + #include +-#include ++#include ++#include + + #include + #include +@@ -166,7 +167,7 @@ static struct platform_device *at2440evb + &s3c_device_usb, + &s3c_device_wdt, + &s3c_device_adc, +- &s3c_device_i2c, ++ &s3c_device_i2c0, + &s3c_device_rtc, + &s3c_device_nand, + &at2440evb_device_eth, +@@ -183,6 +184,7 @@ static void __init at2440evb_map_io(void + + static void __init at2440evb_init(void) + { ++ s3c_i2c0_set_platdata(NULL); + platform_add_devices(at2440evb_devices, ARRAY_SIZE(at2440evb_devices)); + } + +Index: linux-2.6.28/arch/arm/mach-s3c2440/mach-gta02.c +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-2.6.28/arch/arm/mach-s3c2440/mach-gta02.c 2009-01-02 00:01:56.000000000 +0100 +@@ -0,0 +1,1778 @@ ++/* ++ * linux/arch/arm/mach-s3c2440/mach-gta02.c ++ * ++ * S3C2440 Machine Support for the FIC GTA02 (Neo1973) ++ * ++ * Copyright (C) 2006-2007 by Openmoko, Inc. ++ * Author: Harald Welte ++ * All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or ++ * modify it under the terms of the GNU General Public License as ++ * published by the Free Software Foundation; either version 2 of ++ * the License, or (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not, write to the Free Software ++ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, ++ * MA 02111-1307 USA ++ * ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include ++#include ++#include ++#include ++#include ++ ++#include ++#include ++#include ++ ++#include ++#include ++#include ++#include ++#include ++ ++#include ++ ++#include ++#include ++#include ++ ++#include ++#include ++#include ++#include ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include ++ ++#include ++ ++#include ++#include "fiq_c_isr.h" ++#include ++#include ++ ++#include ++ ++#include "../plat-s3c24xx/neo1973_pm_gps.h" ++ ++#include ++#include ++#include ++#include ++ ++/* arbitrates which sensor IRQ owns the shared SPI bus */ ++static spinlock_t motion_irq_lock; ++ ++/* define FIQ IPC struct */ ++/* ++ * contains stuff FIQ ISR modifies and normal kernel code can see and use ++ * this is defined in , you should customize ++ * the definition in there and include the same definition in your kernel ++ * module that wants to interoperate with your FIQ code. ++ */ ++struct fiq_ipc fiq_ipc; ++EXPORT_SYMBOL(fiq_ipc); ++ ++#define DIVISOR_FROM_US(x) ((x) << 3) ++ ++#define FIQ_DIVISOR_VIBRATOR DIVISOR_FROM_US(100) ++ ++#ifdef CONFIG_GTA02_HDQ ++/* HDQ specific */ ++#define HDQ_SAMPLE_PERIOD_US 20 ++/* private HDQ FSM state -- all other info interesting for caller in fiq_ipc */ ++static enum hdq_bitbang_states hdq_state; ++static u8 hdq_ctr; ++static u8 hdq_ctr2; ++static u8 hdq_bit; ++static u8 hdq_shifter; ++static u8 hdq_tx_data_done; ++ ++#define FIQ_DIVISOR_HDQ DIVISOR_FROM_US(HDQ_SAMPLE_PERIOD_US) ++#endif ++/* define FIQ ISR */ ++ ++FIQ_HANDLER_START() ++/* define your locals here -- no initializers though */ ++ u16 divisor; ++FIQ_HANDLER_ENTRY(64, 64) ++/* Your ISR here :-) */ ++ divisor = 0xffff; ++ ++ /* Vibrator servicing */ ++ ++ if (fiq_ipc.vib_pwm_latched || fiq_ipc.vib_pwm) { /* not idle */ ++ if (((u8)_fiq_count_fiqs) == fiq_ipc.vib_pwm_latched) ++ neo1973_gpb_setpin(fiq_ipc.vib_gpio_pin, 0); ++ if (((u8)_fiq_count_fiqs) == 0) { ++ fiq_ipc.vib_pwm_latched = fiq_ipc.vib_pwm; ++ if (fiq_ipc.vib_pwm_latched) ++ neo1973_gpb_setpin(fiq_ipc.vib_gpio_pin, 1); ++ } ++ divisor = FIQ_DIVISOR_VIBRATOR; ++ } ++ ++#ifdef CONFIG_GTA02_HDQ ++ /* HDQ servicing */ ++ ++ switch (hdq_state) { ++ case HDQB_IDLE: ++ if (fiq_ipc.hdq_request_ctr == fiq_ipc.hdq_transaction_ctr) ++ break; ++ hdq_ctr = 210 / HDQ_SAMPLE_PERIOD_US; ++ s3c2410_gpio_setpin(fiq_ipc.hdq_gpio_pin, 0); ++ s3c2410_gpio_cfgpin(fiq_ipc.hdq_gpio_pin, S3C2410_GPIO_OUTPUT); ++ hdq_tx_data_done = 0; ++ hdq_state = HDQB_TX_BREAK; ++ break; ++ ++ case HDQB_TX_BREAK: /* issue low for > 190us */ ++ if (--hdq_ctr == 0) { ++ hdq_ctr = 60 / HDQ_SAMPLE_PERIOD_US; ++ hdq_state = HDQB_TX_BREAK_RECOVERY; ++ s3c2410_gpio_setpin(fiq_ipc.hdq_gpio_pin, 1); ++ } ++ break; ++ ++ case HDQB_TX_BREAK_RECOVERY: /* issue low for > 40us */ ++ if (--hdq_ctr) ++ break; ++ hdq_shifter = fiq_ipc.hdq_ads; ++ hdq_bit = 8; /* 8 bits of ads / rw */ ++ hdq_tx_data_done = 0; /* doing ads */ ++ /* fallthru on last one */ ++ case HDQB_ADS_CALC: ++ if (hdq_shifter & 1) ++ hdq_ctr = 50 / HDQ_SAMPLE_PERIOD_US; ++ else ++ hdq_ctr = 120 / HDQ_SAMPLE_PERIOD_US; ++ /* carefully precompute the other phase length */ ++ hdq_ctr2 = (210 - (hdq_ctr * HDQ_SAMPLE_PERIOD_US)) / ++ HDQ_SAMPLE_PERIOD_US; ++ hdq_state = HDQB_ADS_LOW; ++ hdq_shifter >>= 1; ++ hdq_bit--; ++ s3c2410_gpio_setpin(fiq_ipc.hdq_gpio_pin, 0); ++ break; ++ ++ case HDQB_ADS_LOW: ++ if (--hdq_ctr) ++ break; ++ s3c2410_gpio_setpin(fiq_ipc.hdq_gpio_pin, 1); ++ hdq_state = HDQB_ADS_HIGH; ++ break; ++ ++ case HDQB_ADS_HIGH: ++ if (--hdq_ctr2 > 1) /* account for HDQB_ADS_CALC */ ++ break; ++ if (hdq_bit) { /* more bits to do */ ++ hdq_state = HDQB_ADS_CALC; ++ break; ++ } ++ /* no more bits, wait it out until hdq_ctr2 exhausted */ ++ if (hdq_ctr2) ++ break; ++ /* ok no more bits and very last state */ ++ hdq_ctr = 60 / HDQ_SAMPLE_PERIOD_US; ++ /* FIXME 0 = read */ ++ if (fiq_ipc.hdq_ads & 0x80) { /* write the byte out */ ++ /* set delay before payload */ ++ hdq_ctr = 300 / HDQ_SAMPLE_PERIOD_US; ++ /* already high, no need to write */ ++ hdq_state = HDQB_WAIT_TX; ++ break; ++ } ++ /* read the next byte */ ++ hdq_bit = 8; /* 8 bits of data */ ++ hdq_ctr = 3000 / HDQ_SAMPLE_PERIOD_US; ++ hdq_state = HDQB_WAIT_RX; ++ s3c2410_gpio_cfgpin(fiq_ipc.hdq_gpio_pin, S3C2410_GPIO_INPUT); ++ break; ++ ++ case HDQB_WAIT_TX: /* issue low for > 40us */ ++ if (--hdq_ctr) ++ break; ++ if (!hdq_tx_data_done) { /* was that the data sent? */ ++ hdq_tx_data_done++; ++ hdq_shifter = fiq_ipc.hdq_tx_data; ++ hdq_bit = 8; /* 8 bits of data */ ++ hdq_state = HDQB_ADS_CALC; /* start sending */ ++ break; ++ } ++ fiq_ipc.hdq_error = 0; ++ fiq_ipc.hdq_transaction_ctr = fiq_ipc.hdq_request_ctr; ++ hdq_state = HDQB_IDLE; /* all tx is done */ ++ /* idle in input mode, it's pulled up by 10K */ ++ s3c2410_gpio_cfgpin(fiq_ipc.hdq_gpio_pin, S3C2410_GPIO_INPUT); ++ break; ++ ++ case HDQB_WAIT_RX: /* wait for battery to talk to us */ ++ if (s3c2410_gpio_getpin(fiq_ipc.hdq_gpio_pin) == 0) { ++ /* it talks to us! */ ++ hdq_ctr2 = 1; ++ hdq_bit = 8; /* 8 bits of data */ ++ /* timeout */ ++ hdq_ctr = 300 / HDQ_SAMPLE_PERIOD_US; ++ hdq_state = HDQB_DATA_RX_LOW; ++ break; ++ } ++ if (--hdq_ctr == 0) { /* timed out, error */ ++ fiq_ipc.hdq_error = 1; ++ fiq_ipc.hdq_transaction_ctr = fiq_ipc.hdq_request_ctr; ++ hdq_state = HDQB_IDLE; /* abort */ ++ } ++ break; ++ ++ /* ++ * HDQ basically works by measuring the low time of the bit cell ++ * 32-50us --> '1', 80 - 145us --> '0' ++ */ ++ ++ case HDQB_DATA_RX_LOW: ++ if (s3c2410_gpio_getpin(fiq_ipc.hdq_gpio_pin)) { ++ fiq_ipc.hdq_rx_data >>= 1; ++ if (hdq_ctr2 <= (65 / HDQ_SAMPLE_PERIOD_US)) ++ fiq_ipc.hdq_rx_data |= 0x80; ++ ++ if (--hdq_bit == 0) { ++ fiq_ipc.hdq_error = 0; ++ fiq_ipc.hdq_transaction_ctr = ++ fiq_ipc.hdq_request_ctr; ++ ++ hdq_state = HDQB_IDLE; ++ } else ++ hdq_state = HDQB_DATA_RX_HIGH; ++ /* timeout */ ++ hdq_ctr = 1000 / HDQ_SAMPLE_PERIOD_US; ++ hdq_ctr2 = 1; ++ break; ++ } ++ hdq_ctr2++; ++ if (--hdq_ctr) ++ break; ++ /* timed out, error */ ++ fiq_ipc.hdq_error = 2; ++ fiq_ipc.hdq_transaction_ctr = fiq_ipc.hdq_request_ctr; ++ hdq_state = HDQB_IDLE; /* abort */ ++ break; ++ ++ case HDQB_DATA_RX_HIGH: ++ if (!s3c2410_gpio_getpin(fiq_ipc.hdq_gpio_pin)) { ++ /* it talks to us! */ ++ hdq_ctr2 = 1; ++ /* timeout */ ++ hdq_ctr = 400 / HDQ_SAMPLE_PERIOD_US; ++ hdq_state = HDQB_DATA_RX_LOW; ++ break; ++ } ++ if (--hdq_ctr) ++ break; ++ /* timed out, error */ ++ fiq_ipc.hdq_error = 3; ++ fiq_ipc.hdq_transaction_ctr = fiq_ipc.hdq_request_ctr; ++ ++ /* we're in input mode already */ ++ hdq_state = HDQB_IDLE; /* abort */ ++ break; ++ } ++ ++ if (hdq_state != HDQB_IDLE) /* ie, not idle */ ++ if (divisor > FIQ_DIVISOR_HDQ) ++ divisor = FIQ_DIVISOR_HDQ; /* keep us going */ ++#endif ++ ++ /* disable further timer interrupts if nobody has any work ++ * or adjust rate according to who still has work ++ * ++ * CAUTION: it means forground code must disable FIQ around ++ * its own non-atomic S3C2410_INTMSK changes... not common ++ * thankfully and taken care of by the fiq-basis patch ++ */ ++ if (divisor == 0xffff) /* mask the fiq irq source */ ++ __raw_writel(__raw_readl(S3C2410_INTMSK) | _fiq_ack_mask, ++ S3C2410_INTMSK); ++ else /* still working, maybe at a different rate */ ++ __raw_writel(divisor, S3C2410_TCNTB(_fiq_timer_index)); ++ _fiq_timer_divisor = divisor; ++ ++FIQ_HANDLER_END() ++ ++ ++/* ++ * this gets called every 1ms when we paniced. ++ */ ++ ++static long gta02_panic_blink(long count) ++{ ++ long delay = 0; ++ static long last_blink; ++ static char led; ++ ++ if (count - last_blink < 100) /* 200ms period, fast blink */ ++ return 0; ++ ++ led ^= 1; ++ s3c2410_gpio_cfgpin(GTA02_GPIO_AUX_LED, S3C2410_GPIO_OUTPUT); ++ neo1973_gpb_setpin(GTA02_GPIO_AUX_LED, led); ++ ++ last_blink = count; ++ return delay; ++} ++ ++ ++/** ++ * returns PCB revision information in b9,b8 and b2,b1,b0 ++ * Pre-GTA02 A6 returns 0x000 ++ * GTA02 A6 returns 0x101 ++ * ... ++ */ ++ ++int gta02_get_pcb_revision(void) ++{ ++ int n; ++ int u = 0; ++ static unsigned long pinlist[] = { ++ GTA02_PCB_ID1_0, ++ GTA02_PCB_ID1_1, ++ GTA02_PCB_ID1_2, ++ GTA02_PCB_ID2_0, ++ GTA02_PCB_ID2_1, ++ }; ++ static int pin_offset[] = { ++ 0, 1, 2, 8, 9 ++ }; ++ ++ for (n = 0 ; n < ARRAY_SIZE(pinlist); n++) { ++ /* ++ * set the PCB version GPIO to be pulled-down input ++ * force low briefly first ++ */ ++ s3c2410_gpio_cfgpin(pinlist[n], S3C2410_GPIO_OUTPUT); ++ s3c2410_gpio_setpin(pinlist[n], 0); ++ /* misnomer: it is a pullDOWN in 2442 */ ++ s3c2410_gpio_pullup(pinlist[n], 1); ++ s3c2410_gpio_cfgpin(pinlist[n], S3C2410_GPIO_INPUT); ++ ++ udelay(10); ++ ++ if (s3c2410_gpio_getpin(pinlist[n])) ++ u |= 1 << pin_offset[n]; ++ ++ /* ++ * when not being interrogated, all of the revision GPIO ++ * are set to output HIGH without pulldown so no current flows ++ * if they are NC or pulled up. ++ */ ++ s3c2410_gpio_setpin(pinlist[n], 1); ++ s3c2410_gpio_cfgpin(pinlist[n], S3C2410_GPIO_OUTPUT); ++ /* misnomer: it is a pullDOWN in 2442 */ ++ s3c2410_gpio_pullup(pinlist[n], 0); ++ } ++ ++ return u; ++} ++ ++struct platform_device gta02_version_device = { ++ .name = "neo1973-version", ++ .num_resources = 0, ++}; ++ ++struct platform_device gta02_resume_reason_device = { ++ .name = "neo1973-resume", ++ .num_resources = 0, ++}; ++ ++struct platform_device gta02_memconfig_device = { ++ .name = "neo1973-memconfig", ++ .num_resources = 0, ++}; ++ ++static struct map_desc gta02_iodesc[] __initdata = { ++ { ++ .virtual = 0xe0000000, ++ .pfn = __phys_to_pfn(S3C2410_CS3+0x01000000), ++ .length = SZ_1M, ++ .type = MT_DEVICE ++ }, ++}; ++ ++#define UCON S3C2410_UCON_DEFAULT ++#define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB ++#define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE ++ ++static struct s3c2410_uartcfg gta02_uartcfgs[] = { ++ [0] = { ++ .hwport = 0, ++ .flags = 0, ++ .ucon = UCON, ++ .ulcon = ULCON, ++ .ufcon = UFCON, ++ }, ++ [1] = { ++ .hwport = 1, ++ .flags = 0, ++ .ucon = UCON, ++ .ulcon = ULCON, ++ .ufcon = UFCON, ++ }, ++ [2] = { ++ .hwport = 2, ++ .flags = 0, ++ .ucon = UCON, ++ .ulcon = ULCON, ++ .ufcon = UFCON, ++ }, ++ ++}; ++ ++/* BQ27000 Battery */ ++ ++static int gta02_get_charger_online_status(void) ++{ ++ struct pcf50633 *pcf = gta02_pcf_pdata.pcf; ++ ++ return pcf->mbc.usb_online; ++} ++ ++static int gta02_get_charger_active_status(void) ++{ ++ struct pcf50633 *pcf = gta02_pcf_pdata.pcf; ++ ++ return pcf->mbc.usb_active; ++} ++ ++ ++struct bq27000_platform_data bq27000_pdata = { ++ .name = "battery", ++ .rsense_mohms = 20, ++ .hdq_read = gta02hdq_read, ++ .hdq_write = gta02hdq_write, ++ .hdq_initialized = gta02hdq_initialized, ++ .get_charger_online_status = gta02_get_charger_online_status, ++ .get_charger_active_status = gta02_get_charger_active_status ++}; ++ ++struct platform_device bq27000_battery_device = { ++ .name = "bq27000-battery", ++ .dev = { ++ .platform_data = &bq27000_pdata, ++ }, ++}; ++ ++#define ADC_NOM_CHG_DETECT_1A 6 ++#define ADC_NOM_CHG_DETECT_USB 43 ++ ++static void ++gta02_configure_pmu_for_charger(struct pcf50633 *pcf, void *unused, int res) ++{ ++ int ma; ++ ++ /* Interpret charger type */ ++ if (res < ((ADC_NOM_CHG_DETECT_USB + ADC_NOM_CHG_DETECT_1A) / 2)) { ++ ++ /* Stop GPO driving out now that we have a IA charger */ ++ pcf50633_gpio_set(pcf, PCF50633_GPO, 0); ++ ++ ma = 1000; ++ } else ++ ma = 100; ++ ++ pcf50633_mbc_usb_curlim_set(pcf, ma); ++} ++ ++static struct delayed_work gta02_charger_work; ++static int gta02_usb_vbus_draw; ++ ++static void gta02_charger_worker(struct work_struct *work) ++{ ++ struct pcf50633 *pcf = gta02_pcf_pdata.pcf; ++ ++ if (gta02_usb_vbus_draw) { ++ pcf50633_mbc_usb_curlim_set(pcf, gta02_usb_vbus_draw); ++ return; ++ } else { ++ pcf50633_adc_async_read(pcf, ++ PCF50633_ADCC1_MUX_ADCIN1, ++ PCF50633_ADCC1_AVERAGE_16, ++ gta02_configure_pmu_for_charger, NULL); ++ return; ++ } ++} ++ ++#define GTA02_CHARGER_CONFIGURE_TIMEOUT ((3000 * HZ) / 1000) ++static void gta02_pmu_event_callback(struct pcf50633 *pcf, int irq) ++{ ++ if (irq == PCF50633_IRQ_USBINS) { ++ schedule_delayed_work(>a02_charger_work, ++ GTA02_CHARGER_CONFIGURE_TIMEOUT); ++ return; ++ } else if (irq == PCF50633_IRQ_USBREM) { ++ cancel_delayed_work_sync(>a02_charger_work); ++ gta02_usb_vbus_draw = 0; ++ } ++} ++ ++static struct platform_device gta01_pm_gps_dev = { ++ .name = "neo1973-pm-gps", ++}; ++ ++static struct platform_device gta01_pm_bt_dev = { ++ .name = "neo1973-pm-bt", ++}; ++ ++static struct platform_device gta02_pm_gsm_dev = { ++ .name = "neo1973-pm-gsm", ++}; ++ ++/* this is called when pc50633 is probed, unfortunately quite late in the ++ * day since it is an I2C bus device. Here we can belatedly define some ++ * platform devices with the advantage that we can mark the pcf50633 as the ++ * parent. This makes them get suspended and resumed with their parent ++ * the pcf50633 still around. ++ */ ++ ++static struct platform_device gta02_glamo_dev; ++static void mangle_glamo_res_by_system_rev(void); ++ ++static void gta02_pmu_attach_child_devices(struct pcf50633 *pcf); ++static void gta02_pmu_regulator_registered(struct pcf50633 *pcf, int id); ++ ++static struct platform_device gta02_pm_wlan_dev = { ++ .name = "gta02-pm-wlan", ++}; ++ ++static struct regulator_consumer_supply ldo4_consumers[] = { ++ { ++ .dev = >a01_pm_bt_dev.dev, ++ .supply = "BT_3V2", ++ }, ++}; ++ ++static struct regulator_consumer_supply ldo5_consumers[] = { ++ { ++ .dev = >a01_pm_gps_dev.dev, ++ .supply = "RF_3V", ++ }, ++}; ++ ++/* ++ * We need this dummy thing to fill the regulator consumers ++ */ ++static struct platform_device gta02_mmc_dev = { ++ /* details filled in by glamo core */ ++}; ++ ++static struct regulator_consumer_supply hcldo_consumers[] = { ++ { ++ .dev = >a02_mmc_dev.dev, ++ .supply = "SD_3V3", ++ }, ++}; ++ ++static char *gta02_batteries[] = { ++ "battery", ++}; ++ ++struct pcf50633_platform_data gta02_pcf_pdata = { ++ .resumers = { ++ [0] = PCF50633_INT1_USBINS | ++ PCF50633_INT1_USBREM | ++ PCF50633_INT1_ALARM, ++ [1] = PCF50633_INT2_ONKEYF, ++ [2] = PCF50633_INT3_ONKEY1S, ++ [3] = PCF50633_INT4_LOWSYS | ++ PCF50633_INT4_LOWBAT | ++ PCF50633_INT4_HIGHTMP, ++ }, ++ ++ .batteries = gta02_batteries, ++ .num_batteries = ARRAY_SIZE(gta02_batteries), ++ ++ .reg_init_data = { ++ [PCF50633_REGULATOR_AUTO] = { ++ .constraints = { ++ .min_uV = 3300000, ++ .max_uV = 3300000, ++ .valid_modes_mask = REGULATOR_MODE_NORMAL, ++ .boot_on = 1, ++ .apply_uV = 1, ++ .state_mem = { ++ .enabled = 1, ++ }, ++ }, ++ .num_consumer_supplies = 0, ++ }, ++ [PCF50633_REGULATOR_DOWN1] = { ++ .constraints = { ++ .min_uV = 1300000, ++ .max_uV = 1600000, ++ .valid_modes_mask = REGULATOR_MODE_NORMAL, ++ .boot_on = 1, ++ .apply_uV = 1, ++ }, ++ .num_consumer_supplies = 0, ++ }, ++ [PCF50633_REGULATOR_DOWN2] = { ++ .constraints = { ++ .min_uV = 1800000, ++ .max_uV = 1800000, ++ .valid_modes_mask = REGULATOR_MODE_NORMAL, ++ .apply_uV = 1, ++ .boot_on = 1, ++ .state_mem = { ++ .enabled = 1, ++ }, ++ }, ++ .num_consumer_supplies = 0, ++ }, ++ [PCF50633_REGULATOR_HCLDO] = { ++ .constraints = { ++ .min_uV = 2000000, ++ .max_uV = 3300000, ++ .valid_modes_mask = REGULATOR_MODE_NORMAL, ++ .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE, ++ .boot_on = 1, ++ }, ++ .num_consumer_supplies = 1, ++ .consumer_supplies = hcldo_consumers, ++ }, ++ [PCF50633_REGULATOR_LDO1] = { ++ .constraints = { ++ .min_uV = 1300000, ++ .max_uV = 1300000, ++ .valid_modes_mask = REGULATOR_MODE_NORMAL, ++ .apply_uV = 1, ++ }, ++ .num_consumer_supplies = 0, ++ }, ++ [PCF50633_REGULATOR_LDO2] = { ++ .constraints = { ++ .min_uV = 3300000, ++ .max_uV = 3300000, ++ .valid_modes_mask = REGULATOR_MODE_NORMAL, ++ .apply_uV = 1, ++ }, ++ .num_consumer_supplies = 0, ++ }, ++ [PCF50633_REGULATOR_LDO3] = { ++ .constraints = { ++ .min_uV = 3000000, ++ .max_uV = 3000000, ++ .valid_modes_mask = REGULATOR_MODE_NORMAL, ++ .apply_uV = 1, ++ }, ++ .num_consumer_supplies = 0, ++ }, ++ [PCF50633_REGULATOR_LDO4] = { ++ .constraints = { ++ .min_uV = 3200000, ++ .max_uV = 3200000, ++ .valid_modes_mask = REGULATOR_MODE_NORMAL, ++ .apply_uV = 1, ++ }, ++ .num_consumer_supplies = 1, ++ .consumer_supplies = ldo4_consumers, ++ }, ++ [PCF50633_REGULATOR_LDO5] = { ++ .constraints = { ++ .min_uV = 1500000, ++ .max_uV = 1500000, ++ .valid_modes_mask = REGULATOR_MODE_NORMAL, ++ .apply_uV = 1, ++ }, ++ .num_consumer_supplies = 1, ++ .consumer_supplies = ldo5_consumers, ++ }, ++ [PCF50633_REGULATOR_LDO6] = { ++ .constraints = { ++ .min_uV = 0, ++ .max_uV = 3300000, ++ .valid_modes_mask = REGULATOR_MODE_NORMAL, ++ }, ++ .num_consumer_supplies = 0, ++ }, ++ [PCF50633_REGULATOR_MEMLDO] = { ++ .constraints = { ++ .min_uV = 1800000, ++ .max_uV = 1800000, ++ .valid_modes_mask = REGULATOR_MODE_NORMAL, ++ .state_mem = { ++ .enabled = 1, ++ }, ++ }, ++ .num_consumer_supplies = 0, ++ }, ++ ++ }, ++ .probe_done = gta02_pmu_attach_child_devices, ++ .regulator_registered = gta02_pmu_regulator_registered, ++ .mbc_event_callback = gta02_pmu_event_callback, ++}; ++ ++static void mangle_pmu_pdata_by_system_rev(void) ++{ ++ struct regulator_init_data *reg_init_data; ++ ++ reg_init_data = gta02_pcf_pdata.reg_init_data; ++ ++ switch (system_rev) { ++ case GTA02v1_SYSTEM_REV: ++ /* FIXME: this is only in v1 due to wrong PMU variant */ ++ reg_init_data[PCF50633_REGULATOR_DOWN2] ++ .constraints.state_mem.enabled = 1; ++ break; ++ case GTA02v2_SYSTEM_REV: ++ case GTA02v3_SYSTEM_REV: ++ case GTA02v4_SYSTEM_REV: ++ case GTA02v5_SYSTEM_REV: ++ case GTA02v6_SYSTEM_REV: ++ reg_init_data[PCF50633_REGULATOR_LDO1] ++ .constraints.min_uV = 3300000; ++ reg_init_data[PCF50633_REGULATOR_LDO1] ++ .constraints.min_uV = 3300000; ++ reg_init_data[PCF50633_REGULATOR_LDO1] ++ .constraints.state_mem.enabled = 0; ++ ++ reg_init_data[PCF50633_REGULATOR_LDO5] ++ .constraints.min_uV = 3000000; ++ reg_init_data[PCF50633_REGULATOR_LDO5] ++ .constraints.max_uV = 3000000; ++ ++ reg_init_data[PCF50633_REGULATOR_LDO6] ++ .constraints.min_uV = 3000000; ++ reg_init_data[PCF50633_REGULATOR_LDO6] ++ .constraints.max_uV = 3000000; ++ reg_init_data[PCF50633_REGULATOR_LDO6] ++ .constraints.apply_uV = 1; ++ break; ++ default: ++ break; ++ } ++} ++ ++#ifdef CONFIG_GTA02_HDQ ++/* HDQ */ ++ ++static void gta02_hdq_attach_child_devices(struct device *parent_device) ++{ ++ switch (system_rev) { ++ case GTA02v5_SYSTEM_REV: ++ case GTA02v6_SYSTEM_REV: ++ bq27000_battery_device.dev.parent = parent_device; ++ platform_device_register(&bq27000_battery_device); ++ break; ++ default: ++ break; ++ } ++} ++ ++static struct resource gta02_hdq_resources[] = { ++ [0] = { ++ .start = GTA02v5_GPIO_HDQ, ++ .end = GTA02v5_GPIO_HDQ, ++ }, ++}; ++ ++struct gta02_hdq_platform_data gta02_hdq_platform_data = { ++ .attach_child_devices = gta02_hdq_attach_child_devices ++}; ++ ++struct platform_device gta02_hdq_device = { ++ .name = "gta02-hdq", ++ .num_resources = 1, ++ .resource = gta02_hdq_resources, ++ .dev = { ++ .platform_data = >a02_hdq_platform_data, ++ }, ++}; ++#endif ++ ++/* vibrator (child of FIQ) */ ++ ++static struct resource gta02_vibrator_resources[] = { ++ [0] = { ++ .start = GTA02_GPIO_VIBRATOR_ON, ++ .end = GTA02_GPIO_VIBRATOR_ON, ++ }, ++}; ++ ++static struct platform_device gta02_vibrator_dev = { ++ .name = "neo1973-vibrator", ++ .num_resources = ARRAY_SIZE(gta02_vibrator_resources), ++ .resource = gta02_vibrator_resources, ++}; ++ ++/* FIQ, used PWM regs, so not child of PWM */ ++ ++static void gta02_fiq_attach_child_devices(struct device *parent_device) ++{ ++#ifdef CONFIG_GTA02_HDQ ++ switch (system_rev) { ++ case GTA02v5_SYSTEM_REV: ++ case GTA02v6_SYSTEM_REV: ++ gta02_hdq_device.dev.parent = parent_device; ++ platform_device_register(>a02_hdq_device); ++ gta02_vibrator_dev.dev.parent = parent_device; ++ platform_device_register(>a02_vibrator_dev); ++ break; ++ default: ++ break; ++ } ++#endif ++} ++ ++ ++static struct resource sc32440_fiq_resources[] = { ++ [0] = { ++ .flags = IORESOURCE_IRQ, ++ .start = IRQ_TIMER3, ++ .end = IRQ_TIMER3, ++ }, ++}; ++ ++struct sc32440_fiq_platform_data gta02_sc32440_fiq_platform_data = { ++ .attach_child_devices = gta02_fiq_attach_child_devices ++}; ++ ++struct platform_device sc32440_fiq_device = { ++ .name = "sc32440_fiq", ++ .num_resources = 1, ++ .resource = sc32440_fiq_resources, ++ .dev = { ++ .platform_data = >a02_sc32440_fiq_platform_data, ++ }, ++}; ++ ++/* NOR Flash */ ++ ++#define GTA02_FLASH_BASE 0x18000000 /* GCS3 */ ++#define GTA02_FLASH_SIZE 0x200000 /* 2MBytes */ ++ ++static struct physmap_flash_data gta02_nor_flash_data = { ++ .width = 2, ++}; ++ ++static struct resource gta02_nor_flash_resource = { ++ .start = GTA02_FLASH_BASE, ++ .end = GTA02_FLASH_BASE + GTA02_FLASH_SIZE - 1, ++ .flags = IORESOURCE_MEM, ++}; ++ ++static struct platform_device gta02_nor_flash = { ++ .name = "physmap-flash", ++ .id = 0, ++ .dev = { ++ .platform_data = >a02_nor_flash_data, ++ }, ++ .resource = >a02_nor_flash_resource, ++ .num_resources = 1, ++}; ++ ++ ++struct platform_device s3c24xx_pwm_device = { ++ .name = "s3c24xx_pwm", ++ .num_resources = 0, ++}; ++ ++static struct i2c_board_info gta02_i2c_devs[] __initdata = { ++ { ++ I2C_BOARD_INFO("pcf50633", 0x73), ++ .irq = GTA02_IRQ_PCF50633, ++ .platform_data = >a02_pcf_pdata, ++ }, ++}; ++ ++static struct s3c2410_nand_set gta02_nand_sets[] = { ++ [0] = { ++ .name = "neo1973-nand", ++ .nr_chips = 1, ++ .flags = S3C2410_NAND_BBT, ++ }, ++}; ++ ++/* choose a set of timings derived from S3C@2442B MCP54 ++ * data sheet (K5D2G13ACM-D075 MCP Memory) ++ */ ++ ++static struct s3c2410_platform_nand gta02_nand_info = { ++ .tacls = 0, ++ .twrph0 = 25, ++ .twrph1 = 15, ++ .nr_sets = ARRAY_SIZE(gta02_nand_sets), ++ .sets = gta02_nand_sets, ++ .software_ecc = 1, ++}; ++ ++ ++static void gta02_s3c_mmc_set_power(unsigned char power_mode, ++ unsigned short vdd) ++{ ++ gta02_wlan_power( ++ power_mode == MMC_POWER_ON || ++ power_mode == MMC_POWER_UP); ++} ++ ++ ++static struct s3c24xx_mci_pdata gta02_s3c_mmc_cfg = { ++ .set_power = gta02_s3c_mmc_set_power, ++}; ++ ++static void gta02_udc_command(enum s3c2410_udc_cmd_e cmd) ++{ ++ switch (cmd) { ++ case S3C2410_UDC_P_ENABLE: ++ printk(KERN_DEBUG "%s S3C2410_UDC_P_ENABLE\n", __func__); ++ neo1973_gpb_setpin(GTA02_GPIO_USB_PULLUP, 1); ++ break; ++ case S3C2410_UDC_P_DISABLE: ++ printk(KERN_DEBUG "%s S3C2410_UDC_P_DISABLE\n", __func__); ++ neo1973_gpb_setpin(GTA02_GPIO_USB_PULLUP, 0); ++ break; ++ case S3C2410_UDC_P_RESET: ++ printk(KERN_DEBUG "%s S3C2410_UDC_P_RESET\n", __func__); ++ /* FIXME! */ ++ break; ++ default: ++ break; ++ } ++} ++ ++/* get PMU to set USB current limit accordingly */ ++ ++static void gta02_udc_vbus_draw(unsigned int ma) ++{ ++ if (!gta02_pcf_pdata.pcf) { ++ printk(KERN_ERR "********** NULL gta02_pcf_pdata.pcf *****\n"); ++ return; ++ } ++ ++ gta02_usb_vbus_draw = ma; ++ ++ schedule_delayed_work(>a02_charger_work, ++ GTA02_CHARGER_CONFIGURE_TIMEOUT); ++} ++ ++static struct s3c2410_udc_mach_info gta02_udc_cfg = { ++ .vbus_draw = gta02_udc_vbus_draw, ++ .udc_command = gta02_udc_command, ++ ++}; ++ ++ ++/* touchscreen configuration */ ++ ++static struct ts_filter_linear_configuration gta02_ts_linear_config = { ++ .constants = {1, 0, 0, 0, 1, 0, 1}, /* don't modify coords */ ++ .coord0 = 0, ++ .coord1 = 1, ++}; ++ ++static struct ts_filter_group_configuration gta02_ts_group_config = { ++ .extent = 12, ++ .close_enough = 10, ++ .threshold = 6, /* at least half of the points in a group */ ++ .attempts = 10, ++}; ++ ++static struct ts_filter_median_configuration gta02_ts_median_config = { ++ .extent = 20, ++ .decimation_below = 3, ++ .decimation_threshold = 8 * 3, ++ .decimation_above = 4, ++}; ++ ++static struct ts_filter_mean_configuration gta02_ts_mean_config = { ++ .bits_filter_length = 2, /* 4 points */ ++}; ++ ++static struct s3c2410_ts_mach_info gta02_ts_cfg = { ++ .delay = 10000, ++ .presc = 0xff, /* slow as we can go */ ++ .filter_sequence = { ++ [0] = &ts_filter_group_api, ++ [1] = &ts_filter_median_api, ++ [2] = &ts_filter_mean_api, ++ [3] = &ts_filter_linear_api, ++ }, ++ .filter_config = { ++ [0] = >a02_ts_group_config, ++ [1] = >a02_ts_median_config, ++ [2] = >a02_ts_mean_config, ++ [3] = >a02_ts_linear_config, ++ }, ++}; ++ ++ ++static void gta02_bl_set_intensity(int intensity) ++{ ++ struct pcf50633 *pcf = gta02_pcf_pdata.pcf; ++ int old_intensity = pcf50633_reg_read(pcf, PCF50633_REG_LEDOUT); ++ int ret; ++ ++ intensity >>= 2; ++ ++ if (intensity == old_intensity) ++ return; ++ ++ /* We can't do this anywhere else */ ++ pcf50633_reg_write(pcf, PCF50633_REG_LEDDIM, 5); ++ ++ if (!(pcf50633_reg_read(pcf, PCF50633_REG_LEDENA) & 3)) ++ old_intensity = 0; ++ ++ /* ++ * The PCF50633 cannot handle LEDOUT = 0 (datasheet p60) ++ * if seen, you have to re-enable the LED unit ++ */ ++ if (!intensity || !old_intensity) ++ pcf50633_reg_write(pcf, PCF50633_REG_LEDENA, 0); ++ ++ if (!intensity) /* illegal to set LEDOUT to 0 */ ++ ret = pcf50633_reg_set_bit_mask(pcf, PCF50633_REG_LEDOUT, 0x3f, ++ 2); ++ else ++ ret = pcf50633_reg_set_bit_mask(pcf, PCF50633_REG_LEDOUT, 0x3f, ++ intensity); ++ ++ if (intensity) ++ pcf50633_reg_write(pcf, PCF50633_REG_LEDENA, 2); ++ ++} ++ ++static struct generic_bl_info gta02_bl_info = { ++ .name = "gta02-bl", ++ .max_intensity = 0xff, ++ .default_intensity = 0xff, ++ .set_bl_intensity = gta02_bl_set_intensity, ++}; ++ ++static struct platform_device gta02_bl_dev = { ++ .name = "generic-bl", ++ .id = 1, ++ .dev = { ++ .platform_data = >a02_bl_info, ++ }, ++}; ++ ++/* SPI: LCM control interface attached to Glamo3362 */ ++ ++static void gta02_jbt6k74_reset(int devidx, int level) ++{ ++ glamo_lcm_reset(level); ++} ++ ++static void gta02_jbt6k74_probe_completed(struct device *dev) ++{ ++ struct pcf50633 *pcf = gta02_pcf_pdata.pcf; ++ ++ /* Switch on backlight. Qi does not do it for us */ ++ pcf50633_reg_write(pcf, PCF50633_REG_LEDOUT, 0x01); ++ pcf50633_reg_write(pcf, PCF50633_REG_LEDENA, 0x00); ++ pcf50633_reg_write(pcf, PCF50633_REG_LEDDIM, 0x01); ++ pcf50633_reg_write(pcf, PCF50633_REG_LEDENA, 0x01); ++ ++ gta02_bl_dev.dev.parent = dev; ++ platform_device_register(>a02_bl_dev); ++} ++ ++const struct jbt6k74_platform_data jbt6k74_pdata = { ++ .reset = gta02_jbt6k74_reset, ++ .probe_completed = gta02_jbt6k74_probe_completed, ++}; ++ ++static struct spi_board_info gta02_spi_board_info[] = { ++ { ++ .modalias = "jbt6k74", ++ /* platform_data */ ++ .platform_data = &jbt6k74_pdata, ++ /* controller_data */ ++ /* irq */ ++ .max_speed_hz = 100 * 1000, ++ .bus_num = 2, ++ /* chip_select */ ++ }, ++}; ++ ++#if 0 /* currently this is not used and we use gpio spi */ ++static struct glamo_spi_info glamo_spi_cfg = { ++ .board_size = ARRAY_SIZE(gta02_spi_board_info), ++ .board_info = gta02_spi_board_info, ++}; ++#endif /* 0 */ ++ ++static struct glamo_spigpio_info glamo_spigpio_cfg = { ++ .pin_clk = GLAMO_GPIO10_OUTPUT, ++ .pin_mosi = GLAMO_GPIO11_OUTPUT, ++ .pin_cs = GLAMO_GPIO12_OUTPUT, ++ .pin_miso = 0, ++ .board_size = ARRAY_SIZE(gta02_spi_board_info), ++ .board_info = gta02_spi_board_info, ++}; ++ ++/* SPI: Accelerometers attached to SPI of s3c244x */ ++ ++/* ++ * Situation is that Linux SPI can't work in an interrupt context, so we ++ * implement our own bitbang here. Arbitration is needed because not only ++ * can this interrupt happen at any time even if foreground wants to use ++ * the bitbang API from Linux, but multiple motion sensors can be on the ++ * same SPI bus, and multiple interrupts can happen. ++ * ++ * Foreground / interrupt arbitration is okay because the interrupts are ++ * disabled around all the foreground SPI code. ++ * ++ * Interrupt / Interrupt arbitration is evidently needed, otherwise we ++ * lose edge-triggered service after a while due to the two sensors sharing ++ * the SPI bus having irqs at the same time eventually. ++ * ++ * Servicing is typ 75 - 100us at 400MHz. ++ */ ++ ++/* #define DEBUG_SPEW_MS */ ++#define MG_PER_SAMPLE 18 ++ ++struct lis302dl_platform_data lis302_pdata_top; ++struct lis302dl_platform_data lis302_pdata_bottom; ++ ++/* ++ * generic SPI RX and TX bitbang ++ * only call with interrupts off! ++ */ ++ ++static void __gta02_lis302dl_bitbang(struct lis302dl_info *lis, u8 *tx, ++ int tx_bytes, u8 *rx, int rx_bytes) ++{ ++ struct lis302dl_platform_data *pdata = lis->pdata; ++ int n; ++ u8 shifter = 0; ++ unsigned long other_cs; ++ ++ /* ++ * Huh... "quirk"... CS on this device is not really "CS" like you can ++ * expect. ++ * ++ * When it is 0 it selects SPI interface mode. ++ * When it is 1 it selects I2C interface mode. ++ * ++ * Because we have 2 devices on one interface we have to make sure ++ * that the "disabled" device (actually in I2C mode) don't think we're ++ * talking to it. ++ * ++ * When we talk to the "enabled" device, the "disabled" device sees ++ * the clocks as I2C clocks, creating havoc. ++ * ++ * I2C sees MOSI going LOW while CLK HIGH as a START action, thus we ++ * must ensure this is never issued. ++ */ ++ ++ if (&lis302_pdata_top == pdata) ++ other_cs = lis302_pdata_bottom.pin_chip_select; ++ else ++ other_cs = lis302_pdata_top.pin_chip_select; ++ ++ s3c2410_gpio_setpin(other_cs, 1); ++ s3c2410_gpio_setpin(pdata->pin_chip_select, 1); ++ s3c2410_gpio_setpin(pdata->pin_clk, 1); ++ s3c2410_gpio_setpin(pdata->pin_chip_select, 0); ++ ++ /* send the register index, r/w and autoinc bits */ ++ for (n = 0; n < (tx_bytes << 3); n++) { ++ if (!(n & 7)) ++ shifter = ~tx[n >> 3]; ++ s3c2410_gpio_setpin(pdata->pin_clk, 0); ++ s3c2410_gpio_setpin(pdata->pin_mosi, !(shifter & 0x80)); ++ s3c2410_gpio_setpin(pdata->pin_clk, 1); ++ shifter <<= 1; ++ } ++ ++ for (n = 0; n < (rx_bytes << 3); n++) { /* 8 bits each */ ++ s3c2410_gpio_setpin(pdata->pin_clk, 0); ++ shifter <<= 1; ++ if (s3c2410_gpio_getpin(pdata->pin_miso)) ++ shifter |= 1; ++ if ((n & 7) == 7) ++ rx[n >> 3] = shifter; ++ s3c2410_gpio_setpin(pdata->pin_clk, 1); ++ } ++ s3c2410_gpio_setpin(pdata->pin_chip_select, 1); ++ s3c2410_gpio_setpin(other_cs, 1); ++} ++ ++ ++static int gta02_lis302dl_bitbang_read_reg(struct lis302dl_info *lis, u8 reg) ++{ ++ u8 data = 0xc0 | reg; /* read, autoincrement */ ++ unsigned long flags; ++ ++ local_irq_save(flags); ++ ++ __gta02_lis302dl_bitbang(lis, &data, 1, &data, 1); ++ ++ local_irq_restore(flags); ++ ++ return data; ++} ++ ++static void gta02_lis302dl_bitbang_write_reg(struct lis302dl_info *lis, u8 reg, ++ u8 val) ++{ ++ u8 data[2] = { 0x00 | reg, val }; /* write, no autoincrement */ ++ unsigned long flags; ++ ++ local_irq_save(flags); ++ ++ __gta02_lis302dl_bitbang(lis, &data[0], 2, NULL, 0); ++ ++ local_irq_restore(flags); ++ ++} ++ ++ ++void gta02_lis302dl_suspend_io(struct lis302dl_info *lis, int resume) ++{ ++ struct lis302dl_platform_data *pdata = lis->pdata; ++ ++ if (!resume) { ++ /* ++ * we don't want to power them with a high level ++ * because GSENSOR_3V3 is not up during suspend ++ */ ++ s3c2410_gpio_setpin(pdata->pin_chip_select, 0); ++ s3c2410_gpio_setpin(pdata->pin_clk, 0); ++ s3c2410_gpio_setpin(pdata->pin_mosi, 0); ++ /* misnomer: it is a pullDOWN in 2442 */ ++ s3c2410_gpio_pullup(pdata->pin_miso, 1); ++ return; ++ } ++ ++ /* back to normal */ ++ s3c2410_gpio_setpin(pdata->pin_chip_select, 1); ++ s3c2410_gpio_setpin(pdata->pin_clk, 1); ++ /* misnomer: it is a pullDOWN in 2442 */ ++ s3c2410_gpio_pullup(pdata->pin_miso, 0); ++ ++ s3c2410_gpio_cfgpin(pdata->pin_chip_select, S3C2410_GPIO_OUTPUT); ++ s3c2410_gpio_cfgpin(pdata->pin_clk, S3C2410_GPIO_OUTPUT); ++ s3c2410_gpio_cfgpin(pdata->pin_mosi, S3C2410_GPIO_OUTPUT); ++ s3c2410_gpio_cfgpin(pdata->pin_miso, S3C2410_GPIO_INPUT); ++ ++} ++ ++ ++ ++struct lis302dl_platform_data lis302_pdata_top = { ++ .name = "lis302-1 (top)", ++ .pin_chip_select= S3C2410_GPD12, ++ .pin_clk = S3C2410_GPG7, ++ .pin_mosi = S3C2410_GPG6, ++ .pin_miso = S3C2410_GPG5, ++ .interrupt = GTA02_IRQ_GSENSOR_1, ++ .open_drain = 1, /* altered at runtime by PCB rev */ ++ .lis302dl_bitbang = __gta02_lis302dl_bitbang, ++ .lis302dl_bitbang_reg_read = gta02_lis302dl_bitbang_read_reg, ++ .lis302dl_bitbang_reg_write = gta02_lis302dl_bitbang_write_reg, ++ .lis302dl_suspend_io = gta02_lis302dl_suspend_io, ++}; ++ ++struct lis302dl_platform_data lis302_pdata_bottom = { ++ .name = "lis302-2 (bottom)", ++ .pin_chip_select= S3C2410_GPD13, ++ .pin_clk = S3C2410_GPG7, ++ .pin_mosi = S3C2410_GPG6, ++ .pin_miso = S3C2410_GPG5, ++ .interrupt = GTA02_IRQ_GSENSOR_2, ++ .open_drain = 1, /* altered at runtime by PCB rev */ ++ .lis302dl_bitbang = __gta02_lis302dl_bitbang, ++ .lis302dl_bitbang_reg_read = gta02_lis302dl_bitbang_read_reg, ++ .lis302dl_bitbang_reg_write = gta02_lis302dl_bitbang_write_reg, ++ .lis302dl_suspend_io = gta02_lis302dl_suspend_io, ++}; ++ ++ ++static struct platform_device s3c_device_spi_acc1 = { ++ .name = "lis302dl", ++ .id = 1, ++ .dev = { ++ .platform_data = &lis302_pdata_top, ++ }, ++}; ++ ++static struct platform_device s3c_device_spi_acc2 = { ++ .name = "lis302dl", ++ .id = 2, ++ .dev = { ++ .platform_data = &lis302_pdata_bottom, ++ }, ++}; ++ ++static struct resource gta02_led_resources[] = { ++ { ++ .name = "gta02-power:orange", ++ .start = GTA02_GPIO_PWR_LED1, ++ .end = GTA02_GPIO_PWR_LED1, ++ }, { ++ .name = "gta02-power:blue", ++ .start = GTA02_GPIO_PWR_LED2, ++ .end = GTA02_GPIO_PWR_LED2, ++ }, { ++ .name = "gta02-aux:red", ++ .start = GTA02_GPIO_AUX_LED, ++ .end = GTA02_GPIO_AUX_LED, ++ }, ++}; ++ ++struct platform_device gta02_led_dev = { ++ .name = "gta02-led", ++ .num_resources = ARRAY_SIZE(gta02_led_resources), ++ .resource = gta02_led_resources, ++}; ++ ++static struct resource gta02_button_resources[] = { ++ [0] = { ++ .start = GTA02_GPIO_AUX_KEY, ++ .end = GTA02_GPIO_AUX_KEY, ++ }, ++ [1] = { ++ .start = GTA02_GPIO_HOLD_KEY, ++ .end = GTA02_GPIO_HOLD_KEY, ++ }, ++ [2] = { ++ .start = GTA02_GPIO_JACK_INSERT, ++ .end = GTA02_GPIO_JACK_INSERT, ++ }, ++ [3] = { ++ .start = 0, ++ .end = 0, ++ }, ++ [4] = { ++ .start = 0, ++ .end = 0, ++ }, ++}; ++ ++static struct platform_device gta02_button_dev = { ++ .name = "neo1973-button", ++ .num_resources = ARRAY_SIZE(gta02_button_resources), ++ .resource = gta02_button_resources, ++}; ++ ++ ++static struct platform_device gta02_pm_usbhost_dev = { ++ .name = "neo1973-pm-host", ++}; ++ ++ ++/* USB */ ++static struct s3c2410_hcd_info gta02_usb_info = { ++ .port[0] = { ++ .flags = S3C_HCDFLG_USED, ++ }, ++ .port[1] = { ++ .flags = 0, ++ }, ++}; ++ ++static int glamo_irq_is_wired(void) ++{ ++ int rc; ++ int count = 0; ++ ++ /* ++ * GTA02 S-Media IRQs prior to A5 are broken due to a lack of ++ * a pullup on the INT# line. Check for the bad behaviour. ++ */ ++ s3c2410_gpio_setpin(S3C2410_GPG4, 0); ++ s3c2410_gpio_cfgpin(S3C2410_GPG4, S3C2410_GPG4_OUTP); ++ s3c2410_gpio_cfgpin(S3C2410_GPG4, S3C2410_GPG4_INP); ++ /* ++ * we force it low ourselves for a moment and resume being input. ++ * If there is a pullup, it won't stay low for long. But if the ++ * level converter is there as on < A5 revision, the weak keeper ++ * on the input of the LC will hold the line low indefinitiely ++ */ ++ do ++ rc = s3c2410_gpio_getpin(S3C2410_GPG4); ++ while ((!rc) && ((count++) < 10)); ++ if (rc) { /* it got pulled back up, it's good */ ++ printk(KERN_INFO "Detected S-Media IRQ# pullup, " ++ "enabling interrupt\n"); ++ return 0; ++ } else /* Gah we can't work with this level converter */ ++ printk(KERN_WARNING "** Detected bad IRQ# circuit found" ++ " on pre-A5 GTA02: S-Media interrupt disabled **\n"); ++ return -ENODEV; ++} ++ ++static int gta02_glamo_can_set_mmc_power(void) ++{ ++ switch (system_rev) { ++ case GTA02v3_SYSTEM_REV: ++ case GTA02v4_SYSTEM_REV: ++ case GTA02v5_SYSTEM_REV: ++ case GTA02v6_SYSTEM_REV: ++ return 1; ++ } ++ ++ return 0; ++} ++ ++/* Smedia Glamo 3362 */ ++ ++/* ++ * we crank down SD Card clock dynamically when GPS is powered ++ */ ++ ++static int gta02_glamo_mci_use_slow(void) ++{ ++ return neo1973_pm_gps_is_on(); ++} ++ ++static void gta02_glamo_external_reset(int level) ++{ ++ s3c2410_gpio_setpin(GTA02_GPIO_3D_RESET, level); ++ s3c2410_gpio_cfgpin(GTA02_GPIO_3D_RESET, S3C2410_GPIO_OUTPUT); ++} ++ ++static struct glamofb_platform_data gta02_glamo_pdata = { ++ .width = 43, ++ .height = 58, ++ /* 24.5MHz --> 40.816ns */ ++ .pixclock = 40816, ++ .left_margin = 8, ++ .right_margin = 16, ++ .upper_margin = 2, ++ .lower_margin = 16, ++ .hsync_len = 8, ++ .vsync_len = 2, ++ .fb_mem_size = 0x400000, /* glamo has 8 megs of SRAM. we use 4 */ ++ .xres = { ++ .min = 240, ++ .max = 640, ++ .defval = 480, ++ }, ++ .yres = { ++ .min = 320, ++ .max = 640, ++ .defval = 640, ++ }, ++ .bpp = { ++ .min = 16, ++ .max = 16, ++ .defval = 16, ++ }, ++ //.spi_info = &glamo_spi_cfg, ++ .spigpio_info = &glamo_spigpio_cfg, ++ ++ /* glamo MMC function platform data */ ++ .mmc_dev = >a02_mmc_dev, ++ .glamo_can_set_mci_power = gta02_glamo_can_set_mmc_power, ++ .glamo_mci_use_slow = gta02_glamo_mci_use_slow, ++ .glamo_irq_is_wired = glamo_irq_is_wired, ++ .glamo_external_reset = gta02_glamo_external_reset ++}; ++ ++static struct resource gta02_glamo_resources[] = { ++ [0] = { ++ .start = S3C2410_CS1, ++ .end = S3C2410_CS1 + 0x1000000 - 1, ++ .flags = IORESOURCE_MEM, ++ }, ++ [1] = { ++ .start = GTA02_IRQ_3D, ++ .end = GTA02_IRQ_3D, ++ .flags = IORESOURCE_IRQ, ++ }, ++ [2] = { ++ .start = GTA02v1_GPIO_3D_RESET, ++ .end = GTA02v1_GPIO_3D_RESET, ++ }, ++}; ++ ++static struct platform_device gta02_glamo_dev = { ++ .name = "glamo3362", ++ .num_resources = ARRAY_SIZE(gta02_glamo_resources), ++ .resource = gta02_glamo_resources, ++ .dev = { ++ .platform_data = >a02_glamo_pdata, ++ }, ++}; ++ ++static void mangle_glamo_res_by_system_rev(void) ++{ ++ switch (system_rev) { ++ case GTA02v1_SYSTEM_REV: ++ break; ++ default: ++ gta02_glamo_resources[2].start = GTA02_GPIO_3D_RESET; ++ gta02_glamo_resources[2].end = GTA02_GPIO_3D_RESET; ++ break; ++ } ++ ++ switch (system_rev) { ++ case GTA02v1_SYSTEM_REV: ++ case GTA02v2_SYSTEM_REV: ++ case GTA02v3_SYSTEM_REV: ++ /* case GTA02v4_SYSTEM_REV: - FIXME: handle this later */ ++ /* The hardware is missing a pull-up resistor and thus can't ++ * support the Smedia Glamo IRQ */ ++ gta02_glamo_resources[1].start = 0; ++ gta02_glamo_resources[1].end = 0; ++ break; ++ } ++} ++ ++static void __init gta02_map_io(void) ++{ ++ s3c24xx_init_io(gta02_iodesc, ARRAY_SIZE(gta02_iodesc)); ++ s3c24xx_init_clocks(12000000); ++ s3c24xx_init_uarts(gta02_uartcfgs, ARRAY_SIZE(gta02_uartcfgs)); ++} ++ ++static irqreturn_t gta02_modem_irq(int irq, void *param) ++{ ++ printk(KERN_DEBUG "modem wakeup interrupt\n"); ++ gta_gsm_interrupts++; ++ return IRQ_HANDLED; ++} ++ ++static irqreturn_t ar6000_wow_irq(int irq, void *param) ++{ ++ printk(KERN_DEBUG "ar6000_wow interrupt\n"); ++ return IRQ_HANDLED; ++} ++ ++/* ++ * hardware_ecc=1|0 ++ */ ++static char hardware_ecc_str[4] __initdata = ""; ++ ++static int __init hardware_ecc_setup(char *str) ++{ ++ if (str) ++ strlcpy(hardware_ecc_str, str, sizeof(hardware_ecc_str)); ++ return 1; ++} ++ ++__setup("hardware_ecc=", hardware_ecc_setup); ++ ++/* these are the guys that don't need to be children of PMU */ ++ ++static struct platform_device *gta02_devices[] __initdata = { ++ >a02_version_device, ++ &s3c_device_usb, ++ &s3c_device_wdt, ++ >a02_memconfig_device, ++ &s3c_device_sdi, ++ &s3c_device_usbgadget, ++ &s3c_device_nand, ++ >a02_nor_flash, ++ ++ &sc32440_fiq_device, ++ &s3c24xx_pwm_device, ++ >a02_led_dev, ++ >a02_pm_wlan_dev, /* not dependent on PMU */ ++ ++ &s3c_device_iis, ++ &s3c_device_i2c0, ++}; ++ ++/* these guys DO need to be children of PMU */ ++ ++static struct platform_device *gta02_devices_pmu_children[] = { ++ &s3c_device_ts, /* input 1 */ ++ >a02_pm_gsm_dev, ++ >a02_pm_usbhost_dev, ++ &s3c_device_spi_acc1, /* input 2 */ ++ &s3c_device_spi_acc2, /* input 3 */ ++ >a02_button_dev, /* input 4 */ ++ >a02_resume_reason_device, ++}; ++ ++static void gta02_pmu_regulator_registered(struct pcf50633 *pcf, int id) ++{ ++ struct platform_device *regulator, *pdev; ++ ++ regulator = pcf->pmic.pdev[id]; ++ ++ switch(id) { ++ case PCF50633_REGULATOR_LDO4: ++ pdev = >a01_pm_bt_dev; ++ break; ++ case PCF50633_REGULATOR_LDO5: ++ pdev = >a01_pm_gps_dev; ++ break; ++ case PCF50633_REGULATOR_HCLDO: ++ pdev = >a02_glamo_dev; ++ break; ++ default: ++ return; ++ } ++ ++ pdev->dev.parent = ®ulator->dev; ++ platform_device_register(pdev); ++} ++ ++/* this is called when pc50633 is probed, unfortunately quite late in the ++ * day since it is an I2C bus device. Here we can belatedly define some ++ * platform devices with the advantage that we can mark the pcf50633 as the ++ * parent. This makes them get suspended and resumed with their parent ++ * the pcf50633 still around. ++ */ ++ ++static void gta02_pmu_attach_child_devices(struct pcf50633 *pcf) ++{ ++ int n; ++ ++ for (n = 0; n < ARRAY_SIZE(gta02_devices_pmu_children); n++) ++ gta02_devices_pmu_children[n]->dev.parent = pcf->dev; ++ ++ mangle_glamo_res_by_system_rev(); ++ platform_add_devices(gta02_devices_pmu_children, ++ ARRAY_SIZE(gta02_devices_pmu_children)); ++} ++ ++ ++static void __init gta02_machine_init(void) ++{ ++ int rc; ++ ++ /* set the panic callback to make AUX blink fast */ ++ panic_blink = gta02_panic_blink; ++ ++ switch (system_rev) { ++ case GTA02v6_SYSTEM_REV: ++ /* we need push-pull interrupt from motion sensors */ ++ lis302_pdata_top.open_drain = 0; ++ lis302_pdata_bottom.open_drain = 0; ++ break; ++ default: ++ break; ++ } ++ ++ spin_lock_init(&motion_irq_lock); ++ INIT_DELAYED_WORK(>a02_charger_work, gta02_charger_worker); ++ ++ /* Glamo chip select optimization */ ++/* *((u32 *)(S3C2410_MEMREG(((1 + 1) << 2)))) = 0x1280; */ ++ ++ /* do not force soft ecc if we are asked to use hardware_ecc */ ++ if (hardware_ecc_str[0] == '1') ++ gta02_nand_info.software_ecc = 0; ++ ++ s3c_device_usb.dev.platform_data = >a02_usb_info; ++ s3c_device_nand.dev.platform_data = >a02_nand_info; ++ s3c_device_sdi.dev.platform_data = >a02_s3c_mmc_cfg; ++ ++ /* acc sensor chip selects */ ++ s3c2410_gpio_setpin(S3C2410_GPD12, 1); ++ s3c2410_gpio_cfgpin(S3C2410_GPD12, S3C2410_GPIO_OUTPUT); ++ s3c2410_gpio_setpin(S3C2410_GPD13, 1); ++ s3c2410_gpio_cfgpin(S3C2410_GPD13, S3C2410_GPIO_OUTPUT); ++ ++ s3c24xx_udc_set_platdata(>a02_udc_cfg); ++ s3c_i2c0_set_platdata(NULL); ++ set_s3c2410ts_info(>a02_ts_cfg); ++ ++ mangle_glamo_res_by_system_rev(); ++ ++ i2c_register_board_info(0, gta02_i2c_devs, ARRAY_SIZE(gta02_i2c_devs)); ++ ++ mangle_pmu_pdata_by_system_rev(); ++ ++ platform_add_devices(gta02_devices, ARRAY_SIZE(gta02_devices)); ++ ++ s3c_pm_init(); ++ ++ /* Make sure the modem can wake us up */ ++ set_irq_type(GTA02_IRQ_MODEM, IRQ_TYPE_EDGE_RISING); ++ rc = request_irq(GTA02_IRQ_MODEM, gta02_modem_irq, IRQF_DISABLED, ++ "modem", NULL); ++ if (rc < 0) ++ printk(KERN_ERR "GTA02: can't request GSM modem wakeup IRQ\n"); ++ enable_irq_wake(GTA02_IRQ_MODEM); ++ ++ /* Make sure the wifi module can wake us up*/ ++ set_irq_type(GTA02_IRQ_WLAN_GPIO1, IRQ_TYPE_EDGE_RISING); ++ rc = request_irq(GTA02_IRQ_WLAN_GPIO1, ar6000_wow_irq, IRQF_DISABLED, ++ "ar6000", NULL); ++ ++ if (rc < 0) ++ printk(KERN_ERR "GTA02: can't request ar6k wakeup IRQ\n"); ++ enable_irq_wake(GTA02_IRQ_WLAN_GPIO1); ++} ++ ++void DEBUG_LED(int n) ++{ ++// int *p = NULL; ++ switch (n) { ++ case 0: ++ neo1973_gpb_setpin(GTA02_GPIO_PWR_LED1, 1); ++ break; ++ case 1: ++ neo1973_gpb_setpin(GTA02_GPIO_PWR_LED2, 1); ++ break; ++ default: ++ neo1973_gpb_setpin(GTA02_GPIO_AUX_LED, 1); ++ break; ++ } ++// printk(KERN_ERR"die %d\n", *p); ++} ++EXPORT_SYMBOL_GPL(DEBUG_LED); ++ ++MACHINE_START(NEO1973_GTA02, "GTA02") ++ .phys_io = S3C2410_PA_UART, ++ .io_pg_offst = (((u32)S3C24XX_VA_UART) >> 18) & 0xfffc, ++ .boot_params = S3C2410_SDRAM_PA + 0x100, ++ .map_io = gta02_map_io, ++ .init_irq = s3c24xx_init_irq, ++ .init_machine = gta02_machine_init, ++ .timer = &s3c24xx_timer, ++MACHINE_END +Index: linux-2.6.28/arch/arm/mach-s3c2440/mach-nexcoder.c +=================================================================== +--- linux-2.6.28.orig/arch/arm/mach-s3c2440/mach-nexcoder.c 2008-12-25 00:26:37.000000000 +0100 ++++ linux-2.6.28/arch/arm/mach-s3c2440/mach-nexcoder.c 2009-01-02 00:01:56.000000000 +0100 +@@ -37,6 +37,7 @@ + //#include + #include + #include ++#include + + #include + #include +@@ -107,7 +108,7 @@ static struct platform_device *nexcoder_ + &s3c_device_usb, + &s3c_device_lcd, + &s3c_device_wdt, +- &s3c_device_i2c, ++ &s3c_device_i2c0, + &s3c_device_iis, + &s3c_device_rtc, + &s3c_device_camif, +@@ -142,6 +143,7 @@ static void __init nexcoder_map_io(void) + + static void __init nexcoder_init(void) + { ++ s3c_i2c0_set_platdata(NULL); + platform_add_devices(nexcoder_devices, ARRAY_SIZE(nexcoder_devices)); + }; + +Index: linux-2.6.28/arch/arm/mach-s3c2440/mach-osiris.c +=================================================================== +--- linux-2.6.28.orig/arch/arm/mach-s3c2440/mach-osiris.c 2008-12-25 00:26:37.000000000 +0100 ++++ linux-2.6.28/arch/arm/mach-s3c2440/mach-osiris.c 2009-01-02 00:01:56.000000000 +0100 +@@ -37,7 +37,8 @@ + #include + #include + #include +-#include ++#include ++#include + + #include + #include +@@ -335,7 +336,7 @@ static struct i2c_board_info osiris_i2c_ + /* Standard Osiris devices */ + + static struct platform_device *osiris_devices[] __initdata = { +- &s3c_device_i2c, ++ &s3c_device_i2c0, + &s3c_device_wdt, + &s3c_device_nand, + &osiris_pcmcia, +@@ -398,6 +399,8 @@ static void __init osiris_init(void) + sysdev_class_register(&osiris_pm_sysclass); + sysdev_register(&osiris_pm_sysdev); + ++ s3c_i2c0_set_platdata(NULL); ++ + i2c_register_board_info(0, osiris_i2c_devs, + ARRAY_SIZE(osiris_i2c_devs)); + +Index: linux-2.6.28/arch/arm/mach-s3c2440/mach-rx3715.c +=================================================================== +--- linux-2.6.28.orig/arch/arm/mach-s3c2440/mach-rx3715.c 2008-12-25 00:26:37.000000000 +0100 ++++ linux-2.6.28/arch/arm/mach-s3c2440/mach-rx3715.c 2009-01-02 00:01:56.000000000 +0100 +@@ -42,7 +42,7 @@ + #include + + #include +-#include ++#include + #include + + #include +@@ -179,7 +179,7 @@ static struct platform_device *rx3715_de + &s3c_device_usb, + &s3c_device_lcd, + &s3c_device_wdt, +- &s3c_device_i2c, ++ &s3c_device_i2c0, + &s3c_device_iis, + &s3c_device_nand, + }; +@@ -203,7 +203,7 @@ static void __init rx3715_init_machine(v + #ifdef CONFIG_PM_H1940 + memcpy(phys_to_virt(H1940_SUSPEND_RESUMEAT), h1940_pm_return, 1024); + #endif +- s3c2410_pm_init(); ++ s3c_pm_init(); + + s3c24xx_fb_set_platdata(&rx3715_fb_info); + platform_add_devices(rx3715_devices, ARRAY_SIZE(rx3715_devices)); +Index: linux-2.6.28/arch/arm/mach-s3c2440/mach-smdk2440.c +=================================================================== +--- linux-2.6.28.orig/arch/arm/mach-s3c2440/mach-smdk2440.c 2008-12-25 00:26:37.000000000 +0100 ++++ linux-2.6.28/arch/arm/mach-s3c2440/mach-smdk2440.c 2009-01-02 00:01:56.000000000 +0100 +@@ -37,6 +37,7 @@ + + #include + #include ++#include + + #include + #include +@@ -152,7 +153,7 @@ static struct platform_device *smdk2440_ + &s3c_device_usb, + &s3c_device_lcd, + &s3c_device_wdt, +- &s3c_device_i2c, ++ &s3c_device_i2c0, + &s3c_device_iis, + }; + +@@ -166,6 +167,7 @@ static void __init smdk2440_map_io(void) + static void __init smdk2440_machine_init(void) + { + s3c24xx_fb_set_platdata(&smdk2440_fb_info); ++ s3c_i2c0_set_platdata(NULL); + + platform_add_devices(smdk2440_devices, ARRAY_SIZE(smdk2440_devices)); + smdk_machine_init(); +Index: linux-2.6.28/arch/arm/mach-s3c2440/Makefile +=================================================================== +--- linux-2.6.28.orig/arch/arm/mach-s3c2440/Makefile 2008-12-25 00:26:37.000000000 +0100 ++++ linux-2.6.28/arch/arm/mach-s3c2440/Makefile 2009-01-02 00:01:56.000000000 +0100 +@@ -13,6 +13,7 @@ obj-$(CONFIG_CPU_S3C2440) += s3c2440.o d + obj-$(CONFIG_CPU_S3C2440) += irq.o + obj-$(CONFIG_CPU_S3C2440) += clock.o + obj-$(CONFIG_S3C2440_DMA) += dma.o ++obj-$(CONFIG_S3C2440_C_FIQ) += fiq_c_isr.o + + # Machine support + +@@ -22,3 +23,6 @@ obj-$(CONFIG_MACH_RX3715) += mach-rx3715 + obj-$(CONFIG_ARCH_S3C2440) += mach-smdk2440.o + obj-$(CONFIG_MACH_NEXCODER_2440) += mach-nexcoder.o + obj-$(CONFIG_MACH_AT2440EVB) += mach-at2440evb.o ++obj-$(CONFIG_MACH_HXD8) += mach-hxd8.o ++obj-$(CONFIG_MACH_NEO1973_GTA02) += mach-gta02.o ++ +Index: linux-2.6.28/arch/arm/mach-s3c2440/s3c2440.c +=================================================================== +--- linux-2.6.28.orig/arch/arm/mach-s3c2440/s3c2440.c 2008-12-25 00:26:37.000000000 +0100 ++++ linux-2.6.28/arch/arm/mach-s3c2440/s3c2440.c 2009-01-02 00:01:56.000000000 +0100 +@@ -46,6 +46,9 @@ int __init s3c2440_init(void) + s3c_device_wdt.resource[1].start = IRQ_S3C2440_WDT; + s3c_device_wdt.resource[1].end = IRQ_S3C2440_WDT; + ++ /* make sure SD/MMC driver can distinguish 2440 from 2410 */ ++ s3c_device_sdi.name = "s3c2440-sdi"; ++ + /* register our system device for everything else */ + + return sysdev_register(&s3c2440_sysdev); +Index: linux-2.6.28/arch/arm/mach-s3c2442/Kconfig +=================================================================== +--- linux-2.6.28.orig/arch/arm/mach-s3c2442/Kconfig 2008-12-25 00:26:37.000000000 +0100 ++++ linux-2.6.28/arch/arm/mach-s3c2442/Kconfig 2009-01-02 00:01:56.000000000 +0100 +@@ -6,10 +6,11 @@ + + config CPU_S3C2442 + bool +- depends on ARCH_S3C2410 ++ depends on CPU_S3C2440 + select S3C2410_CLOCK + select S3C2410_GPIO + select S3C2410_PM if PM ++ select S3C2440_DMA if S3C2410_DMA + select CPU_S3C244X + select CPU_LLSERIAL_S3C2440 + help +Index: linux-2.6.28/arch/arm/mach-s3c2442/s3c2442.c +=================================================================== +--- linux-2.6.28.orig/arch/arm/mach-s3c2442/s3c2442.c 2008-12-25 00:26:37.000000000 +0100 ++++ linux-2.6.28/arch/arm/mach-s3c2442/s3c2442.c 2009-01-02 00:01:56.000000000 +0100 +@@ -21,6 +21,7 @@ + + #include + #include ++#include + + static struct sys_device s3c2442_sysdev = { + .cls = &s3c2442_sysclass, +@@ -30,5 +31,8 @@ int __init s3c2442_init(void) + { + printk("S3C2442: Initialising architecture\n"); + ++ /* make sure SD/MMC driver can distinguish 2440 from 2410 */ ++ s3c_device_sdi.name = "s3c2440-sdi"; ++ + return sysdev_register(&s3c2442_sysdev); + } +Index: linux-2.6.28/arch/arm/mach-s3c2443/clock.c +=================================================================== +--- linux-2.6.28.orig/arch/arm/mach-s3c2443/clock.c 2008-12-25 00:26:37.000000000 +0100 ++++ linux-2.6.28/arch/arm/mach-s3c2443/clock.c 2009-01-02 00:01:56.000000000 +0100 +@@ -39,6 +39,8 @@ + + #include + ++#include ++ + #include + #include + #include +@@ -145,12 +147,6 @@ static unsigned long s3c2443_roundrate_c + + /* clock selections */ + +-/* CPU EXTCLK input */ +-static struct clk clk_ext = { +- .name = "ext", +- .id = -1, +-}; +- + static struct clk clk_mpllref = { + .name = "mpllref", + .parent = &clk_xtal, +@@ -165,14 +161,6 @@ static struct clk clk_mpll = { + }; + #endif + +-static struct clk clk_epllref; +- +-static struct clk clk_epll = { +- .name = "epll", +- .parent = &clk_epllref, +- .id = -1, +-}; +- + static struct clk clk_i2s_ext = { + .name = "i2s-ext", + .id = -1, +@@ -1011,22 +999,20 @@ static struct clk *clks[] __initdata = { + &clk_prediv, + }; + +-void __init s3c2443_init_clocks(int xtal) ++void __init_or_cpufreq s3c2443_setup_clocks(void) + { +- unsigned long epllcon = __raw_readl(S3C2443_EPLLCON); + unsigned long mpllcon = __raw_readl(S3C2443_MPLLCON); + unsigned long clkdiv0 = __raw_readl(S3C2443_CLKDIV0); ++ struct clk *xtal_clk; ++ unsigned long xtal; + unsigned long pll; + unsigned long fclk; + unsigned long hclk; + unsigned long pclk; +- struct clk *clkp; +- int ret; +- int ptr; + +- /* s3c2443 parents h and p clocks from prediv */ +- clk_h.parent = &clk_prediv; +- clk_p.parent = &clk_prediv; ++ xtal_clk = clk_get(NULL, "xtal"); ++ xtal = clk_get_rate(xtal_clk); ++ clk_put(xtal_clk); + + pll = s3c2443_get_mpll(mpllcon, xtal); + clk_msysclk.rate = pll; +@@ -1036,13 +1022,29 @@ void __init s3c2443_init_clocks(int xtal + hclk /= s3c2443_get_hdiv(clkdiv0); + pclk = hclk / ((clkdiv0 & S3C2443_CLKDIV0_HALF_PCLK) ? 2 : 1); + +- s3c24xx_setup_clocks(xtal, fclk, hclk, pclk); ++ s3c24xx_setup_clocks(fclk, hclk, pclk); + + printk("S3C2443: mpll %s %ld.%03ld MHz, cpu %ld.%03ld MHz, mem %ld.%03ld MHz, pclk %ld.%03ld MHz\n", + (mpllcon & S3C2443_PLLCON_OFF) ? "off":"on", + print_mhz(pll), print_mhz(fclk), + print_mhz(hclk), print_mhz(pclk)); + ++ s3c24xx_setup_clocks(fclk, hclk, pclk); ++} ++ ++void __init s3c2443_init_clocks(int xtal) ++{ ++ struct clk *clkp; ++ unsigned long epllcon = __raw_readl(S3C2443_EPLLCON); ++ int ret; ++ int ptr; ++ ++ /* s3c2443 parents h and p clocks from prediv */ ++ clk_h.parent = &clk_prediv; ++ clk_p.parent = &clk_prediv; ++ ++ s3c24xx_register_baseclocks(xtal); ++ s3c2443_setup_clocks(); + s3c2443_clk_initparents(); + + for (ptr = 0; ptr < ARRAY_SIZE(clks); ptr++) { +@@ -1056,7 +1058,7 @@ void __init s3c2443_init_clocks(int xtal + } + + clk_epll.rate = s3c2443_get_epll(epllcon, xtal); +- ++ clk_epll.parent = &clk_epllref; + clk_usb_bus.parent = &clk_usb_bus_host; + + /* ensure usb bus clock is within correct rate of 48MHz */ +@@ -1105,4 +1107,6 @@ void __init s3c2443_init_clocks(int xtal + + (clkp->enable)(clkp, 0); + } ++ ++ s3c_pwmclk_init(); + } +Index: linux-2.6.28/arch/arm/mach-s3c2443/dma.c +=================================================================== +--- linux-2.6.28.orig/arch/arm/mach-s3c2443/dma.c 2008-12-25 00:26:37.000000000 +0100 ++++ linux-2.6.28/arch/arm/mach-s3c2443/dma.c 2009-01-02 00:01:56.000000000 +0100 +@@ -26,12 +26,12 @@ + + #include + #include +-#include ++#include + #include + #include + #include + #include +-#include ++#include + + #define MAP(x) { \ + [0] = (x) | DMA_CH_VALID, \ +Index: linux-2.6.28/arch/arm/mach-s3c2443/Kconfig +=================================================================== +--- linux-2.6.28.orig/arch/arm/mach-s3c2443/Kconfig 2008-12-25 00:26:37.000000000 +0100 ++++ linux-2.6.28/arch/arm/mach-s3c2443/Kconfig 2009-01-02 00:01:56.000000000 +0100 +@@ -24,6 +24,7 @@ config MACH_SMDK2443 + bool "SMDK2443" + select CPU_S3C2443 + select MACH_SMDK ++ select S3C_DEV_HSMMC + help + Say Y here if you are using an SMDK2443 + +Index: linux-2.6.28/arch/arm/mach-s3c2443/mach-smdk2443.c +=================================================================== +--- linux-2.6.28.orig/arch/arm/mach-s3c2443/mach-smdk2443.c 2008-12-25 00:26:37.000000000 +0100 ++++ linux-2.6.28/arch/arm/mach-s3c2443/mach-smdk2443.c 2009-01-02 00:01:56.000000000 +0100 +@@ -37,6 +37,7 @@ + + #include + #include ++#include + + #include + #include +@@ -103,8 +104,8 @@ static struct s3c2410_uartcfg smdk2443_u + + static struct platform_device *smdk2443_devices[] __initdata = { + &s3c_device_wdt, +- &s3c_device_i2c, +- &s3c_device_hsmmc, ++ &s3c_device_i2c0, ++ &s3c_device_hsmmc0, + }; + + static void __init smdk2443_map_io(void) +@@ -116,6 +117,7 @@ static void __init smdk2443_map_io(void) + + static void __init smdk2443_machine_init(void) + { ++ s3c_i2c0_set_platdata(NULL); + platform_add_devices(smdk2443_devices, ARRAY_SIZE(smdk2443_devices)); + smdk_machine_init(); + } +Index: linux-2.6.28/arch/arm/mach-s3c2443/s3c2443.c +=================================================================== +--- linux-2.6.28.orig/arch/arm/mach-s3c2443/s3c2443.c 2008-12-25 00:26:37.000000000 +0100 ++++ linux-2.6.28/arch/arm/mach-s3c2443/s3c2443.c 2009-01-02 00:01:56.000000000 +0100 +@@ -81,10 +81,9 @@ void __init s3c2443_init_uarts(struct s3 + * machine specific initialisation. + */ + +-void __init s3c2443_map_io(struct map_desc *mach_desc, int mach_size) ++void __init s3c2443_map_io(void) + { + iotable_init(s3c2443_iodesc, ARRAY_SIZE(s3c2443_iodesc)); +- iotable_init(mach_desc, mach_size); + } + + /* need to register class before we actually register the device, and +Index: linux-2.6.28/arch/arm/mach-s3c24a0/include/mach/debug-macro.S +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-2.6.28/arch/arm/mach-s3c24a0/include/mach/debug-macro.S 2009-01-02 00:01:56.000000000 +0100 +@@ -0,0 +1,28 @@ ++/* arch/arm/mach-s3c2410/include/mach/debug-macro.S ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation. ++*/ ++ ++/* pull in the relevant register and map files. */ ++ ++#include ++#include ++ ++ .macro addruart, rx ++ mrc p15, 0, \rx, c1, c0 ++ tst \rx, #1 ++ ldreq \rx, = S3C24XX_PA_UART ++ ldrne \rx, = S3C24XX_VA_UART ++#if CONFIG_DEBUG_S3C_UART != 0 ++ add \rx, \rx, #(S3C2410_UART1_OFF * CONFIG_DEBUG_S3C_UART) ++#endif ++ .endm ++ ++/* include the reset of the code which will do the work, we're only ++ * compiling for a single cpu processor type so the default of s3c2440 ++ * will be fine with us. ++ */ ++ ++#include +Index: linux-2.6.28/arch/arm/mach-s3c24a0/include/mach/io.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-2.6.28/arch/arm/mach-s3c24a0/include/mach/io.h 2009-01-02 00:01:56.000000000 +0100 +@@ -0,0 +1,16 @@ ++/* arch/arm/mach-s3c24a0/include/mach/io.h ++ * ++ * Copyright 2008 Simtec Electronics ++ * Ben Dooks ++ * ++ * IO access and mapping routines for the S3C24A0 ++ */ ++ ++#ifndef __ASM_ARM_ARCH_IO_H ++#define __ASM_ARM_ARCH_IO_H ++ ++/* No current ISA/PCI bus support. */ ++#define __io(a) ((void __iomem *)(a)) ++#define __mem_pci(a) (a) ++ ++#endif +Index: linux-2.6.28/arch/arm/mach-s3c24a0/include/mach/irqs.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-2.6.28/arch/arm/mach-s3c24a0/include/mach/irqs.h 2009-01-02 00:01:56.000000000 +0100 +@@ -0,0 +1,117 @@ ++/* linux/arch/arm/mach-s3c24a0/include/mach/irqs.h ++ * ++ * Copyright (c) 2003-2005 Simtec Electronics ++ * Ben Dooks ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation. ++*/ ++ ++ ++#ifndef __ASM_ARCH_24A0_IRQS_H ++#define __ASM_ARCH_24A0_IRQS_H __FILE__ ++ ++#define IRQ_EINT0t2 S3C2410_IRQ(0) /* 16 */ ++/* for generic entry-macro.S */ ++#define IRQ_EINT0 IRQ_EINT0t2 ++ ++#define IRQ_EINT3t6 S3C2410_IRQ(1) ++#define IRQ_EINT7t10 S3C2410_IRQ(2) ++#define IRQ_EINT11t14 S3C2410_IRQ(3) ++#define IRQ_EINT15t18 S3C2410_IRQ(4) /* 20 */ ++#define IRQ_TICK S3C2410_IRQ(5) ++#define IRQ_DCTQ S3C2410_IRQ(6) ++#define IRQ_MC S3C2410_IRQ(7) ++#define IRQ_ME S3C2410_IRQ(8) /* 24 */ ++#define IRQ_KEYPAD S3C2410_IRQ(9) ++#define IRQ_TIMER0 S3C2410_IRQ(10) ++#define IRQ_TIMER1 S3C2410_IRQ(11) ++#define IRQ_TIMER2 S3C2410_IRQ(12) ++#define IRQ_TIMER3_4 S3C2410_IRQ(13) ++#define IRQ_OS_TIMER IRQ_TIMER3_4 ++#define IRQ_LCD S3C2410_IRQ(14) ++#define IRQ_CAM_C S3C2410_IRQ(15) ++#define IRQ_WDT_BATFLT S3C2410_IRQ(16) /* 32 */ ++#define IRQ_UART0 S3C2410_IRQ(17) ++#define IRQ_CAM_P S3C2410_IRQ(18) ++#define IRQ_MODEM S3C2410_IRQ(19) ++#define IRQ_DMA S3C2410_IRQ(20) ++#define IRQ_SDI S3C2410_IRQ(21) ++#define IRQ_SPI0 S3C2410_IRQ(22) ++#define IRQ_UART1 S3C2410_IRQ(23) ++#define IRQ_AC97_NFLASH S3C2410_IRQ(24) /* 40 */ ++#define IRQ_USBD S3C2410_IRQ(25) ++#define IRQ_USBH S3C2410_IRQ(26) ++#define IRQ_IIC S3C2410_IRQ(27) ++#define IRQ_IRDA_MSTICK S3C2410_IRQ(28) /* 44 */ ++#define IRQ_VLX_SPI1 S3C2410_IRQ(29) ++#define IRQ_RTC S3C2410_IRQ(30) /* 46 */ ++#define IRQ_ADC_PEN S3C2410_IRQ(31) ++ ++/* interrupts generated from the external interrupts sources */ ++#define IRQ_EINT00 S3C2410_IRQ(32) /* 48 */ ++#define IRQ_EINT1 S3C2410_IRQ(33) ++#define IRQ_EINT2 S3C2410_IRQ(34) ++#define IRQ_EINT3 S3C2410_IRQ(35) ++#define IRQ_EINT4 S3C2410_IRQ(36) ++#define IRQ_EINT5 S3C2410_IRQ(37) ++#define IRQ_EINT6 S3C2410_IRQ(38) ++#define IRQ_EINT7 S3C2410_IRQ(39) ++#define IRQ_EINT8 S3C2410_IRQ(40) ++#define IRQ_EINT9 S3C2410_IRQ(41) ++#define IRQ_EINT10 S3C2410_IRQ(42) ++#define IRQ_EINT11 S3C2410_IRQ(43) ++#define IRQ_EINT12 S3C2410_IRQ(44) ++#define IRQ_EINT13 S3C2410_IRQ(45) ++#define IRQ_EINT14 S3C2410_IRQ(46) ++#define IRQ_EINT15 S3C2410_IRQ(47) ++#define IRQ_EINT16 S3C2410_IRQ(48) ++#define IRQ_EINT17 S3C2410_IRQ(49) ++#define IRQ_EINT18 S3C2410_IRQ(50) ++ ++#define IRQ_EINT_BIT(x) ((x) - IRQ_EINT00) ++ ++/* SUB IRQS */ ++#define IRQ_S3CUART_RX0 S3C2410_IRQ(51) /* 67 */ ++#define IRQ_S3CUART_TX0 S3C2410_IRQ(52) ++#define IRQ_S3CUART_ERR0 S3C2410_IRQ(53) ++ ++#define IRQ_S3CUART_RX1 S3C2410_IRQ(54) ++#define IRQ_S3CUART_TX1 S3C2410_IRQ(55) ++#define IRQ_S3CUART_ERR1 S3C2410_IRQ(56) ++ ++#define IRQ_S3CUART_RX2 (0x0) ++#define IRQ_S3CUART_TX2 (0x0) ++#define IRQ_S3CUART_ERR2 (0x0) ++ ++ ++#define IRQ_IRDA S3C2410_IRQ(57) ++#define IRQ_MSTICK S3C2410_IRQ(58) ++#define IRQ_RESERVED0 S3C2410_IRQ(59) ++#define IRQ_RESERVED1 S3C2410_IRQ(60) ++#define IRQ_RESERVED2 S3C2410_IRQ(61) ++#define IRQ_TIMER3 S3C2410_IRQ(62) ++#define IRQ_TIMER4 S3C2410_IRQ(63) ++#define IRQ_WDT S3C2410_IRQ(64) ++#define IRQ_BATFLT S3C2410_IRQ(65) ++#define IRQ_POST S3C2410_IRQ(66) ++#define IRQ_DISP_FIFO S3C2410_IRQ(67) ++#define IRQ_PENUP S3C2410_IRQ(68) ++#define IRQ_PENDN S3C2410_IRQ(69) ++#define IRQ_ADC S3C2410_IRQ(70) ++#define IRQ_DISP_FRAME S3C2410_IRQ(71) ++#define IRQ_NFLASH S3C2410_IRQ(72) ++#define IRQ_AC97 S3C2410_IRQ(73) ++#define IRQ_SPI1 S3C2410_IRQ(74) ++#define IRQ_VLX S3C2410_IRQ(75) ++#define IRQ_DMA0 S3C2410_IRQ(76) ++#define IRQ_DMA1 S3C2410_IRQ(77) ++#define IRQ_DMA2 S3C2410_IRQ(78) ++#define IRQ_DMA3 S3C2410_IRQ(79) ++ ++#define IRQ_TC (0x0) ++ ++#define NR_IRQS (IRQ_DMA3+1) ++ ++#endif /* __ASM_ARCH_24A0_IRQS_H */ +Index: linux-2.6.28/arch/arm/mach-s3c24a0/include/mach/map.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-2.6.28/arch/arm/mach-s3c24a0/include/mach/map.h 2009-01-02 00:01:56.000000000 +0100 +@@ -0,0 +1,85 @@ ++/* linux/arch/arm/mach-s3c24a0/include/mach/map.h ++ * ++ * Copyright 2003,2007 Simtec Electronics ++ * http://armlinux.simtec.co.uk/ ++ * Ben Dooks ++ * ++ * S3C24A0 - Memory map definitions ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation. ++*/ ++ ++#ifndef __ASM_ARCH_24A0_MAP_H ++#define __ASM_ARCH_24A0_MAP_H __FILE__ ++ ++#include ++#include ++ ++#define S3C24A0_PA_IO_BASE (0x40000000) ++#define S3C24A0_PA_CLKPWR (0x40000000) ++#define S3C24A0_PA_IRQ (0x40200000) ++#define S3C24A0_PA_DMA (0x40400000) ++#define S3C24A0_PA_MEMCTRL (0x40C00000) ++#define S3C24A0_PA_NAND (0x40C00000) ++#define S3C24A0_PA_SROM (0x40C20000) ++#define S3C24A0_PA_SDRAM (0x40C40000) ++#define S3C24A0_PA_BUSM (0x40CE0000) ++#define S3C24A0_PA_USBHOST (0x41000000) ++#define S3C24A0_PA_MODEMIF (0x41180000) ++#define S3C24A0_PA_IRDA (0x41800000) ++#define S3C24A0_PA_TIMER (0x44000000) ++#define S3C24A0_PA_WATCHDOG (0x44100000) ++#define S3C24A0_PA_RTC (0x44200000) ++#define S3C24A0_PA_UART (0x44400000) ++#define S3C24A0_PA_UART0 (S3C24A0_PA_UART) ++#define S3C24A0_PA_UART1 (S3C24A0_PA_UART + 0x4000) ++#define S3C24A0_PA_SPI (0x44500000) ++#define S3C24A0_PA_IIC (0x44600000) ++#define S3C24A0_PA_IIS (0x44700000) ++#define S3C24A0_PA_GPIO (0x44800000) ++#define S3C24A0_PA_KEYIF (0x44900000) ++#define S3C24A0_PA_USBDEV (0x44A00000) ++#define S3C24A0_PA_AC97 (0x45000000) ++#define S3C24A0_PA_ADC (0x45800000) ++#define S3C24A0_PA_SDI (0x46000000) ++#define S3C24A0_PA_MS (0x46100000) ++#define S3C24A0_PA_LCD (0x4A000000) ++#define S3C24A0_PA_VPOST (0x4A100000) ++ ++/* physical addresses of all the chip-select areas */ ++ ++#define S3C24A0_CS0 (0x00000000) ++#define S3C24A0_CS1 (0x04000000) ++#define S3C24A0_CS2 (0x08000000) ++#define S3C24A0_CS3 (0x0C000000) ++#define S3C24A0_CS4 (0x10000000) ++#define S3C24A0_CS5 (0x40000000) ++ ++#define S3C24A0_SDRAM_PA (S3C24A0_CS4) ++ ++/* Use a single interface for common resources between S3C24XX cpus */ ++ ++#define S3C24XX_PA_IRQ S3C24A0_PA_IRQ ++#define S3C24XX_PA_MEMCTRL S3C24A0_PA_MEMCTRL ++#define S3C24XX_PA_USBHOST S3C24A0_PA_USBHOST ++#define S3C24XX_PA_DMA S3C24A0_PA_DMA ++#define S3C24XX_PA_CLKPWR S3C24A0_PA_CLKPWR ++#define S3C24XX_PA_LCD S3C24A0_PA_LCD ++#define S3C24XX_PA_UART S3C24A0_PA_UART ++#define S3C24XX_PA_TIMER S3C24A0_PA_TIMER ++#define S3C24XX_PA_USBDEV S3C24A0_PA_USBDEV ++#define S3C24XX_PA_WATCHDOG S3C24A0_PA_WATCHDOG ++#define S3C24XX_PA_IIS S3C24A0_PA_IIS ++#define S3C24XX_PA_GPIO S3C24A0_PA_GPIO ++#define S3C24XX_PA_RTC S3C24A0_PA_RTC ++#define S3C24XX_PA_ADC S3C24A0_PA_ADC ++#define S3C24XX_PA_SPI S3C24A0_PA_SPI ++#define S3C24XX_PA_SDI S3C24A0_PA_SDI ++#define S3C24XX_PA_NAND S3C24A0_PA_NAND ++ ++#define S3C_PA_UART S3C24A0_PA_UART ++#define S3C_PA_IIC S3C24A0_PA_IIC ++ ++#endif /* __ASM_ARCH_24A0_MAP_H */ +Index: linux-2.6.28/arch/arm/mach-s3c24a0/include/mach/memory.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-2.6.28/arch/arm/mach-s3c24a0/include/mach/memory.h 2009-01-02 00:01:56.000000000 +0100 +@@ -0,0 +1,19 @@ ++/* linux/arch/arm/mach-s3c24a0/include/mach/memory.h ++ * from linux/include/asm-arm/arch-rpc/memory.h ++ * ++ * Copyright (C) 1996,1997,1998 Russell King. ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation. ++*/ ++ ++#ifndef __ASM_ARCH_24A0_MEMORY_H ++#define __ASM_ARCH_24A0_MEMORY_H __FILE__ ++ ++#define PHYS_OFFSET UL(0x10000000) ++ ++#define __virt_to_bus(x) __virt_to_phys(x) ++#define __bus_to_virt(x) __phys_to_virt(x) ++ ++#endif +Index: linux-2.6.28/arch/arm/mach-s3c24a0/include/mach/regs-clock.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-2.6.28/arch/arm/mach-s3c24a0/include/mach/regs-clock.h 2009-01-02 00:01:56.000000000 +0100 +@@ -0,0 +1,88 @@ ++/* linux/arch/arm/mach-s3c24a0/include/mach/regs-clock.h ++ * ++ * Copyright (c) 2003,2004,2005,2006 Simtec Electronics ++ * http://armlinux.simtec.co.uk/ ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation. ++ * ++ * S3C24A0 clock register definitions ++*/ ++ ++#ifndef __ASM_ARCH_24A0_REGS_CLOCK_H ++#define __ASM_ARCH_24A0_REGS_CLOCK_H __FILE__ ++ ++#define S3C24A0_MPLLCON S3C2410_CLKREG(0x10) ++#define S3C24A0_UPLLCON S3C2410_CLKREG(0x14) ++#define S3C24A0_CLKCON S3C2410_CLKREG(0x20) ++#define S3C24A0_CLKSRC S3C2410_CLKREG(0x24) ++#define S3C24A0_CLKDIVN S3C2410_CLKREG(0x28) ++ ++/* CLKCON register bits */ ++ ++#define S3C24A0_CLKCON_VLX (1<<29) ++#define S3C24A0_CLKCON_VPOST (1<<28) ++#define S3C24A0_CLKCON_WDT (1<<27) /* reserved */ ++#define S3C24A0_CLKCON_MPEGDCTQ (1<<26) ++#define S3C24A0_CLKCON_VPOSTIF (1<<25) ++#define S3C24A0_CLKCON_MPEG4IF (1<<24) ++#define S3C24A0_CLKCON_CAM_UPLL (1<<23) ++#define S3C24A0_CLKCON_LCDC (1<<22) ++#define S3C24A0_CLKCON_CAM_HCLK (1<<21) ++#define S3C24A0_CLKCON_MPEG4 (1<<20) ++#define S3C24A0_CLKCON_KEYPAD (1<<19) ++#define S3C24A0_CLKCON_ADC (1<<18) ++#define S3C24A0_CLKCON_SDI (1<<17) ++#define S3C24A0_CLKCON_MS (1<<16) /* memory stick */ ++#define S3C24A0_CLKCON_USBD (1<<15) ++#define S3C24A0_CLKCON_GPIO (1<<14) ++#define S3C24A0_CLKCON_IIS (1<<13) ++#define S3C24A0_CLKCON_IIC (1<<12) ++#define S3C24A0_CLKCON_SPI (1<<11) ++#define S3C24A0_CLKCON_UART1 (1<<10) ++#define S3C24A0_CLKCON_UART0 (1<<9) ++#define S3C24A0_CLKCON_PWMT (1<<8) ++#define S3C24A0_CLKCON_USBH (1<<7) ++#define S3C24A0_CLKCON_AC97 (1<<6) ++#define S3C24A0_CLKCON_IrDA (1<<4) ++#define S3C24A0_CLKCON_IDLE (1<<2) ++#define S3C24A0_CLKCON_MON (1<<1) ++#define S3C24A0_CLKCON_STOP (1<<0) ++ ++/* CLKSRC register bits */ ++ ++#define S3C24A0_CLKSRC_OSC (1<<8) /* CLKSRC */ ++#define S3C24A0_CLKSRC_UPLL (1<<7) ++#define S3C24A0_CLKSRC_MPLL (1<<5) ++#define S3C24A0_CLKSRC_EXT (1<<4) ++ ++/* Use a single interface with the common code, for s3c24xx */ ++ ++#define S3C2410_MPLLCON S3C24A0_MPLLCON ++#define S3C2410_UPLLCON S3C24A0_UPLLCON ++#define S3C2410_CLKCON S3C24A0_CLKCON ++#define S3C2410_CLKSLOW S3C24A0_CLKSRC ++#define S3C2410_CLKDIVN S3C24A0_CLKDIVN ++ ++#define S3C2410_CLKCON_IDLE S3C24A0_CLKCON_IDLE ++#define S3C2410_CLKCON_POWER S3C24A0_CLKCON_STOP ++#define S3C2410_CLKCON_LCDC S3C24A0_CLKCON_LCDC ++#define S3C2410_CLKCON_USBH S3C24A0_CLKCON_USBH ++#define S3C2410_CLKCON_USBD S3C24A0_CLKCON_USBD ++#define S3C2410_CLKCON_PWMT S3C24A0_CLKCON_PWMT ++#define S3C2410_CLKCON_SDI S3C24A0_CLKCON_SDI ++#define S3C2410_CLKCON_UART0 S3C24A0_CLKCON_UART0 ++#define S3C2410_CLKCON_UART1 S3C24A0_CLKCON_UART1 ++#define S3C2410_CLKCON_GPIO S3C24A0_CLKCON_GPIO ++#define S3C2410_CLKCON_ADC S3C24A0_CLKCON_ADC ++#define S3C2410_CLKCON_IIC S3C24A0_CLKCON_IIC ++#define S3C2410_CLKCON_IIS S3C24A0_CLKCON_IIS ++#define S3C2410_CLKCON_SPI S3C24A0_CLKCON_SPI ++ ++#define S3C2410_CLKSLOW_UCLK_OFF S3C24A0_CLKSRC_UPLL ++#define S3C2410_CLKSLOW_MPLL_OFF S3C24A0_CLKSRC_MPLL ++#define S3C2410_CLKSLOW_SLOW (0xFF) ++#define S3C2410_CLKSLOW_GET_SLOWVAL(x) (0x1) ++ ++#endif /* __ASM_ARCH_24A0_REGS_CLOCK_H */ +Index: linux-2.6.28/arch/arm/mach-s3c24a0/include/mach/regs-irq.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-2.6.28/arch/arm/mach-s3c24a0/include/mach/regs-irq.h 2009-01-02 00:01:56.000000000 +0100 +@@ -0,0 +1,25 @@ ++/* linux/arch/arm/mach-s3c24a0/include/mach/regs-irq.h ++ * ++ * Copyright (c) 2003 Simtec Electronics ++ * http://www.simtec.co.uk/products/SWLINUX/ ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation. ++*/ ++ ++ ++#ifndef ___ASM_ARCH_24A0_REGS_IRQ_H ++#define ___ASM_ARCH_24A0_REGS_IRQ_H __FILE__ ++ ++ ++#define S3C2410_EINTMASK S3C2410_EINTREG(0x034) ++#define S3C2410_EINTPEND S3C2410_EINTREG(0X038) ++ ++#define S3C24XX_EINTMASK S3C24XX_EINTREG(0x034) ++#define S3C24XX_EINTPEND S3C24XX_EINTREG(0X038) ++ ++#endif /* __ASM_ARCH_24A0_REGS_IRQ_H */ ++ ++ ++ +Index: linux-2.6.28/arch/arm/mach-s3c24a0/include/mach/system.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-2.6.28/arch/arm/mach-s3c24a0/include/mach/system.h 2009-01-02 00:01:56.000000000 +0100 +@@ -0,0 +1,25 @@ ++/* linux/arch/arm/mach-s3c24a0/include/mach/system.h ++ * ++ * Copyright 2008 Simtec Electronics ++ * Ben Dooks ++ * ++ * S3C24A0 - System function defines and includes ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation. ++*/ ++ ++#include ++#include ++ ++#include ++ ++static void arch_idle(void) ++{ ++ /* currently no specific idle support. */ ++} ++ ++void (*s3c24xx_reset_hook)(void); ++ ++#include +Index: linux-2.6.28/arch/arm/mach-s3c24a0/include/mach/tick.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-2.6.28/arch/arm/mach-s3c24a0/include/mach/tick.h 2009-01-02 00:01:56.000000000 +0100 +@@ -0,0 +1,15 @@ ++/* linux/arch/arm/mach-s3c24a0/include/mach/tick.h ++ * ++ * Copyright 2008 Simtec Electronics ++ * Ben Dooks ++ * http://armlinux.simtec.co.uk/ ++ * ++ * S3C24A0 - timer tick support ++ */ ++ ++#define SUBSRC_TIMER4 (1 << (IRQ_TIMER4 - IRQ_S3CUART_RX0)) ++ ++static inline int s3c24xx_ostimer_pending(void) ++{ ++ return __raw_readl(S3C2410_SUBSRCPND) & SUBSRC_TIMER4; ++} +Index: linux-2.6.28/arch/arm/mach-s3c24a0/include/mach/timex.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-2.6.28/arch/arm/mach-s3c24a0/include/mach/timex.h 2009-01-02 00:01:56.000000000 +0100 +@@ -0,0 +1,18 @@ ++/* linux/arch/arm/mach-s3c24a0/include/mach/timex.h ++ * ++ * Copyright (c) 2008 Simtec Electronics ++ * Ben Dooks ++ * ++ * S3C2410 - time parameters ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation. ++*/ ++ ++#ifndef __ASM_ARCH_TIMEX_H ++#define __ASM_ARCH_TIMEX_H ++ ++#define CLOCK_TICK_RATE 12000000 ++ ++#endif /* __ASM_ARCH_TIMEX_H */ +Index: linux-2.6.28/arch/arm/mach-s3c24a0/include/mach/vmalloc.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-2.6.28/arch/arm/mach-s3c24a0/include/mach/vmalloc.h 2009-01-02 00:01:56.000000000 +0100 +@@ -0,0 +1,17 @@ ++/* linux/include/asm-arm/arch-s3c24ao/vmalloc.h ++ * ++ * Copyright 2008 Simtec Electronics ++ ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation. ++ * ++ * S3C24A0 vmalloc definition ++*/ ++ ++#ifndef __ASM_ARCH_VMALLOC_H ++#define __ASM_ARCH_VMALLOC_H ++ ++#define VMALLOC_END (0xE0000000) ++ ++#endif /* __ASM_ARCH_VMALLOC_H */ +Index: linux-2.6.28/arch/arm/mach-s3c6400/include/mach/debug-macro.S +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-2.6.28/arch/arm/mach-s3c6400/include/mach/debug-macro.S 2009-01-02 00:01:56.000000000 +0100 +@@ -0,0 +1,39 @@ ++/* arch/arm/mach-s3c6400/include/mach/debug-macro.S ++ * ++ * Copyright 2008 Openmoko, Inc. ++ * Copyright 2008 Simtec Electronics ++ * http://armlinux.simtec.co.uk/ ++ * Ben Dooks ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation. ++*/ ++ ++/* pull in the relevant register and map files. */ ++ ++#include ++#include ++ ++ /* note, for the boot process to work we have to keep the UART ++ * virtual address aligned to an 1MiB boundary for the L1 ++ * mapping the head code makes. We keep the UART virtual address ++ * aligned and add in the offset when we load the value here. ++ */ ++ ++ .macro addruart, rx ++ mrc p15, 0, \rx, c1, c0 ++ tst \rx, #1 ++ ldreq \rx, = S3C_PA_UART ++ ldrne \rx, = (S3C_VA_UART + S3C_PA_UART & 0xfffff) ++#if CONFIG_DEBUG_S3C_UART != 0 ++ add \rx, \rx, #(0x400 * CONFIG_DEBUG_S3C_UART) ++#endif ++ .endm ++ ++/* include the reset of the code which will do the work, we're only ++ * compiling for a single cpu processor type so the default of s3c2440 ++ * will be fine with us. ++ */ ++ ++#include +Index: linux-2.6.28/arch/arm/mach-s3c6400/include/mach/dma.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-2.6.28/arch/arm/mach-s3c6400/include/mach/dma.h 2009-01-02 00:01:56.000000000 +0100 +@@ -0,0 +1,16 @@ ++/* linux/arch/arm/mach-s3c6400/include/mach/dma.h ++ * ++ * Copyright 2008 Openmoko, Inc. ++ * Copyright 2008 Simtec Electronics ++ * Ben Dooks ++ * http://armlinux.simtec.co.uk/ ++ * ++ * S3C6400 - DMA support ++ */ ++ ++#ifndef __ASM_ARCH_DMA_H ++#define __ASM_ARCH_DMA_H __FILE__ ++ ++/* currently nothing here, placeholder */ ++ ++#endif /* __ASM_ARCH_IRQ_H */ +Index: linux-2.6.28/arch/arm/mach-s3c6400/include/mach/entry-macro.S +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-2.6.28/arch/arm/mach-s3c6400/include/mach/entry-macro.S 2009-01-02 00:01:56.000000000 +0100 +@@ -0,0 +1,44 @@ ++/* arch/arm/mach-s3c6400/include/mach/entry-macro.S ++ * ++ * Copyright 2008 Openmoko, Inc. ++ * Copyright 2008 Simtec Electronics ++ * http://armlinux.simtec.co.uk/ ++ * Ben Dooks ++ * ++ * Low-level IRQ helper macros for the Samsung S3C64XX series ++ * ++ * This file is licensed under the terms of the GNU General Public ++ * License version 2. This program is licensed "as is" without any ++ * warranty of any kind, whether express or implied. ++*/ ++ ++#include ++#include ++#include ++ ++ .macro disable_fiq ++ .endm ++ ++ .macro get_irqnr_preamble, base, tmp ++ ldr \base, =S3C_VA_VIC0 ++ .endm ++ ++ .macro arch_ret_to_user, tmp1, tmp2 ++ .endm ++ ++ .macro get_irqnr_and_base, irqnr, irqstat, base, tmp ++ ++ @ check the vic0 ++ mov \irqnr, # S3C_IRQ_OFFSET + 31 ++ ldr \irqstat, [ \base, # VIC_IRQ_STATUS ] ++ teq \irqstat, #0 ++ ++ @ otherwise try vic1 ++ addeq \tmp, \base, #(S3C_VA_VIC1 - S3C_VA_VIC0) ++ addeq \irqnr, \irqnr, #32 ++ ldreq \irqstat, [ \tmp, # VIC_IRQ_STATUS ] ++ teqeq \irqstat, #0 ++ ++ clzne \irqstat, \irqstat ++ subne \irqnr, \irqnr, \irqstat ++ .endm +Index: linux-2.6.28/arch/arm/mach-s3c6400/include/mach/gpio-core.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-2.6.28/arch/arm/mach-s3c6400/include/mach/gpio-core.h 2009-01-02 00:01:56.000000000 +0100 +@@ -0,0 +1,21 @@ ++/* arch/arm/mach-s3c6400/include/mach/gpio-core.h ++ * ++ * Copyright 2008 Openmoko, Inc. ++ * Copyright 2008 Simtec Electronics ++ * Ben Dooks ++ * http://armlinux.simtec.co.uk/ ++ * ++ * S3C64XX - GPIO core support ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation. ++*/ ++ ++#ifndef __ASM_ARCH_GPIO_CORE_H ++#define __ASM_ARCH_GPIO_CORE_H __FILE__ ++ ++/* currently we just include the platform support */ ++#include ++ ++#endif /* __ASM_ARCH_GPIO_CORE_H */ +Index: linux-2.6.28/arch/arm/mach-s3c6400/include/mach/gpio.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-2.6.28/arch/arm/mach-s3c6400/include/mach/gpio.h 2009-01-02 00:01:56.000000000 +0100 +@@ -0,0 +1,96 @@ ++/* arch/arm/mach-s3c6400/include/mach/gpio.h ++ * ++ * Copyright 2008 Openmoko, Inc. ++ * Copyright 2008 Simtec Electronics ++ * http://armlinux.simtec.co.uk/ ++ * Ben Dooks ++ * ++ * S3C6400 - GPIO lib support ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation. ++*/ ++ ++#define gpio_get_value __gpio_get_value ++#define gpio_set_value __gpio_set_value ++#define gpio_cansleep __gpio_cansleep ++#define gpio_to_irq __gpio_to_irq ++ ++/* GPIO bank sizes */ ++#define S3C64XX_GPIO_A_NR (8) ++#define S3C64XX_GPIO_B_NR (7) ++#define S3C64XX_GPIO_C_NR (8) ++#define S3C64XX_GPIO_D_NR (5) ++#define S3C64XX_GPIO_E_NR (5) ++#define S3C64XX_GPIO_F_NR (16) ++#define S3C64XX_GPIO_G_NR (7) ++#define S3C64XX_GPIO_H_NR (10) ++#define S3C64XX_GPIO_I_NR (16) ++#define S3C64XX_GPIO_J_NR (12) ++#define S3C64XX_GPIO_K_NR (16) ++#define S3C64XX_GPIO_L_NR (15) ++#define S3C64XX_GPIO_M_NR (6) ++#define S3C64XX_GPIO_N_NR (16) ++#define S3C64XX_GPIO_O_NR (16) ++#define S3C64XX_GPIO_P_NR (15) ++#define S3C64XX_GPIO_Q_NR (9) ++ ++/* GPIO bank numbes */ ++ ++/* CONFIG_S3C_GPIO_SPACE allows the user to select extra ++ * space for debugging purposes so that any accidental ++ * change from one gpio bank to another can be caught. ++*/ ++ ++#define S3C64XX_GPIO_NEXT(__gpio) \ ++ ((__gpio##_START) + (__gpio##_NR) + CONFIG_S3C_GPIO_SPACE + 1) ++ ++enum s3c_gpio_number { ++ S3C64XX_GPIO_A_START = 0, ++ S3C64XX_GPIO_B_START = S3C64XX_GPIO_NEXT(S3C64XX_GPIO_A), ++ S3C64XX_GPIO_C_START = S3C64XX_GPIO_NEXT(S3C64XX_GPIO_B), ++ S3C64XX_GPIO_D_START = S3C64XX_GPIO_NEXT(S3C64XX_GPIO_C), ++ S3C64XX_GPIO_E_START = S3C64XX_GPIO_NEXT(S3C64XX_GPIO_D), ++ S3C64XX_GPIO_F_START = S3C64XX_GPIO_NEXT(S3C64XX_GPIO_E), ++ S3C64XX_GPIO_G_START = S3C64XX_GPIO_NEXT(S3C64XX_GPIO_F), ++ S3C64XX_GPIO_H_START = S3C64XX_GPIO_NEXT(S3C64XX_GPIO_G), ++ S3C64XX_GPIO_I_START = S3C64XX_GPIO_NEXT(S3C64XX_GPIO_H), ++ S3C64XX_GPIO_J_START = S3C64XX_GPIO_NEXT(S3C64XX_GPIO_I), ++ S3C64XX_GPIO_K_START = S3C64XX_GPIO_NEXT(S3C64XX_GPIO_J), ++ S3C64XX_GPIO_L_START = S3C64XX_GPIO_NEXT(S3C64XX_GPIO_K), ++ S3C64XX_GPIO_M_START = S3C64XX_GPIO_NEXT(S3C64XX_GPIO_L), ++ S3C64XX_GPIO_N_START = S3C64XX_GPIO_NEXT(S3C64XX_GPIO_M), ++ S3C64XX_GPIO_O_START = S3C64XX_GPIO_NEXT(S3C64XX_GPIO_N), ++ S3C64XX_GPIO_P_START = S3C64XX_GPIO_NEXT(S3C64XX_GPIO_O), ++ S3C64XX_GPIO_Q_START = S3C64XX_GPIO_NEXT(S3C64XX_GPIO_P), ++}; ++ ++/* S3C64XX GPIO number definitions. */ ++ ++#define S3C64XX_GPA(_nr) (S3C64XX_GPIO_A_START + (_nr)) ++#define S3C64XX_GPB(_nr) (S3C64XX_GPIO_B_START + (_nr)) ++#define S3C64XX_GPC(_nr) (S3C64XX_GPIO_C_START + (_nr)) ++#define S3C64XX_GPD(_nr) (S3C64XX_GPIO_D_START + (_nr)) ++#define S3C64XX_GPE(_nr) (S3C64XX_GPIO_E_START + (_nr)) ++#define S3C64XX_GPF(_nr) (S3C64XX_GPIO_F_START + (_nr)) ++#define S3C64XX_GPG(_nr) (S3C64XX_GPIO_G_START + (_nr)) ++#define S3C64XX_GPH(_nr) (S3C64XX_GPIO_H_START + (_nr)) ++#define S3C64XX_GPI(_nr) (S3C64XX_GPIO_I_START + (_nr)) ++#define S3C64XX_GPJ(_nr) (S3C64XX_GPIO_J_START + (_nr)) ++#define S3C64XX_GPK(_nr) (S3C64XX_GPIO_K_START + (_nr)) ++#define S3C64XX_GPL(_nr) (S3C64XX_GPIO_L_START + (_nr)) ++#define S3C64XX_GPM(_nr) (S3C64XX_GPIO_M_START + (_nr)) ++#define S3C64XX_GPN(_nr) (S3C64XX_GPIO_N_START + (_nr)) ++#define S3C64XX_GPO(_nr) (S3C64XX_GPIO_O_START + (_nr)) ++#define S3C64XX_GPP(_nr) (S3C64XX_GPIO_P_START + (_nr)) ++#define S3C64XX_GPQ(_nr) (S3C64XX_GPIO_Q_START + (_nr)) ++ ++/* the end of the S3C64XX specific gpios */ ++#define S3C64XX_GPIO_END (S3C64XX_GPQ(S3C64XX_GPIO_Q_NR) + 1) ++#define S3C_GPIO_END S3C64XX_GPIO_END ++ ++/* define the number of gpios we need to the one after the GPQ() range */ ++#define ARCH_NR_GPIOS (S3C64XX_GPQ(S3C64XX_GPIO_Q_NR) + 1) ++ ++#include +Index: linux-2.6.28/arch/arm/mach-s3c6400/include/mach/hardware.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-2.6.28/arch/arm/mach-s3c6400/include/mach/hardware.h 2009-01-02 00:01:56.000000000 +0100 +@@ -0,0 +1,16 @@ ++/* linux/arch/arm/mach-s3c6400/include/mach/hardware.h ++ * ++ * Copyright 2008 Openmoko, Inc. ++ * Copyright 2008 Simtec Electronics ++ * Ben Dooks ++ * http://armlinux.simtec.co.uk/ ++ * ++ * S3C6400 - Hardware support ++ */ ++ ++#ifndef __ASM_ARCH_HARDWARE_H ++#define __ASM_ARCH_HARDWARE_H __FILE__ ++ ++/* currently nothing here, placeholder */ ++ ++#endif /* __ASM_ARCH_IRQ_H */ +Index: linux-2.6.28/arch/arm/mach-s3c6400/include/mach/irqs.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-2.6.28/arch/arm/mach-s3c6400/include/mach/irqs.h 2009-01-02 00:01:56.000000000 +0100 +@@ -0,0 +1,20 @@ ++/* linux/arch/arm/mach-s3c6400/include/mach/irqs.h ++ * ++ * Copyright 2008 Openmoko, Inc. ++ * Copyright 2008 Simtec Electronics ++ * Ben Dooks ++ * http://armlinux.simtec.co.uk/ ++ * ++ * S3C6400 - IRQ definitions ++ */ ++ ++#ifndef __ASM_ARCH_IRQS_H ++#define __ASM_ARCH_IRQS_H __FILE__ ++ ++#ifndef __ASM_ARM_IRQ_H ++#error "Do not include this directly, instead #include " ++#endif ++ ++#include ++ ++#endif /* __ASM_ARCH_IRQ_H */ +Index: linux-2.6.28/arch/arm/mach-s3c6400/include/mach/map.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-2.6.28/arch/arm/mach-s3c6400/include/mach/map.h 2009-01-02 00:01:56.000000000 +0100 +@@ -0,0 +1,71 @@ ++/* linux/arch/arm/mach-s3c6400/include/mach/map.h ++ * ++ * Copyright 2008 Openmoko, Inc. ++ * Copyright 2008 Simtec Electronics ++ * http://armlinux.simtec.co.uk/ ++ * Ben Dooks ++ * ++ * S3C64XX - Memory map definitions ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation. ++*/ ++ ++#ifndef __ASM_ARCH_MAP_H ++#define __ASM_ARCH_MAP_H __FILE__ ++ ++#include ++ ++/* HSMMC units */ ++#define S3C64XX_PA_HSMMC(x) (0x7C200000 + ((x) * 0x100000)) ++#define S3C64XX_PA_HSMMC0 S3C64XX_PA_HSMMC(0) ++#define S3C64XX_PA_HSMMC1 S3C64XX_PA_HSMMC(1) ++#define S3C64XX_PA_HSMMC2 S3C64XX_PA_HSMMC(2) ++ ++#define S3C_PA_UART (0x7F005000) ++#define S3C_PA_UART0 (S3C_PA_UART + 0x00) ++#define S3C_PA_UART1 (S3C_PA_UART + 0x400) ++#define S3C_PA_UART2 (S3C_PA_UART + 0x800) ++#define S3C_PA_UART3 (S3C_PA_UART + 0xC00) ++#define S3C_UART_OFFSET (0x400) ++ ++/* See notes on UART VA mapping in debug-macro.S */ ++#define S3C_VA_UARTx(x) (S3C_VA_UART + (S3C_PA_UART & 0xfffff) + ((x) * S3C_UART_OFFSET)) ++ ++#define S3C_VA_UART0 S3C_VA_UARTx(0) ++#define S3C_VA_UART1 S3C_VA_UARTx(1) ++#define S3C_VA_UART2 S3C_VA_UARTx(2) ++#define S3C_VA_UART3 S3C_VA_UARTx(3) ++ ++#define S3C64XX_PA_FB (0x77100000) ++#define S3C64XX_PA_SYSCON (0x7E00F000) ++#define S3C64XX_PA_TIMER (0x7F006000) ++#define S3C64XX_PA_IIC0 (0x7F004000) ++#define S3C64XX_PA_IIC1 (0x7F00F000) ++ ++#define S3C64XX_PA_GPIO (0x7F008000) ++#define S3C64XX_VA_GPIO S3C_ADDR(0x00500000) ++#define S3C64XX_SZ_GPIO SZ_4K ++ ++#define S3C64XX_PA_SDRAM (0x50000000) ++#define S3C64XX_PA_VIC0 (0x71200000) ++#define S3C64XX_PA_VIC1 (0x71300000) ++ ++#define S3C64XX_PA_MODEM (0x74108000) ++#define S3C64XX_VA_MODEM S3C_ADDR(0x00600000) ++ ++/* place VICs close together */ ++#define S3C_VA_VIC0 (S3C_VA_IRQ + 0x00) ++#define S3C_VA_VIC1 (S3C_VA_IRQ + 0x10000) ++ ++/* compatibiltiy defines. */ ++#define S3C_PA_TIMER S3C64XX_PA_TIMER ++#define S3C_PA_HSMMC0 S3C64XX_PA_HSMMC0 ++#define S3C_PA_HSMMC1 S3C64XX_PA_HSMMC1 ++#define S3C_PA_HSMMC2 S3C64XX_PA_HSMMC2 ++#define S3C_PA_IIC S3C64XX_PA_IIC0 ++#define S3C_PA_IIC1 S3C64XX_PA_IIC1 ++#define S3C_PA_FB S3C64XX_PA_FB ++ ++#endif /* __ASM_ARCH_6400_MAP_H */ +Index: linux-2.6.28/arch/arm/mach-s3c6400/include/mach/memory.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-2.6.28/arch/arm/mach-s3c6400/include/mach/memory.h 2009-01-02 00:01:56.000000000 +0100 +@@ -0,0 +1,21 @@ ++/* arch/arm/mach-s3c6400/include/mach/memory.h ++ * ++ * Copyright 2008 Openmoko, Inc. ++ * Copyright 2008 Simtec Electronics ++ * Ben Dooks ++ * http://armlinux.simtec.co.uk/ ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation. ++*/ ++ ++#ifndef __ASM_ARCH_MEMORY_H ++#define __ASM_ARCH_MEMORY_H ++ ++#define PHYS_OFFSET UL(0x50000000) ++ ++#define __virt_to_bus(x) __virt_to_phys(x) ++#define __bus_to_virt(x) __phys_to_virt(x) ++ ++#endif +Index: linux-2.6.28/arch/arm/mach-s3c6400/include/mach/pwm-clock.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-2.6.28/arch/arm/mach-s3c6400/include/mach/pwm-clock.h 2009-01-02 00:01:56.000000000 +0100 +@@ -0,0 +1,56 @@ ++/* linux/arch/arm/mach-s3c6400/include/mach/pwm-clock.h ++ * ++ * Copyright 2008 Openmoko, Inc. ++ * Copyright 2008 Simtec Electronics ++ * Ben Dooks ++ * http://armlinux.simtec.co.uk/ ++ * ++ * S3C64xx - pwm clock and timer support ++ */ ++ ++/** ++ * pwm_cfg_src_is_tclk() - return whether the given mux config is a tclk ++ * @tcfg: The timer TCFG1 register bits shifted down to 0. ++ * ++ * Return true if the given configuration from TCFG1 is a TCLK instead ++ * any of the TDIV clocks. ++ */ ++static inline int pwm_cfg_src_is_tclk(unsigned long tcfg) ++{ ++ return tcfg >= S3C64XX_TCFG1_MUX_TCLK; ++} ++ ++/** ++ * tcfg_to_divisor() - convert tcfg1 setting to a divisor ++ * @tcfg1: The tcfg1 setting, shifted down. ++ * ++ * Get the divisor value for the given tcfg1 setting. We assume the ++ * caller has already checked to see if this is not a TCLK source. ++ */ ++static inline unsigned long tcfg_to_divisor(unsigned long tcfg1) ++{ ++ return 1 << tcfg1; ++} ++ ++/** ++ * pwm_tdiv_has_div1() - does the tdiv setting have a /1 ++ * ++ * Return true if we have a /1 in the tdiv setting. ++ */ ++static inline unsigned int pwm_tdiv_has_div1(void) ++{ ++ return 1; ++} ++ ++/** ++ * pwm_tdiv_div_bits() - calculate TCFG1 divisor value. ++ * @div: The divisor to calculate the bit information for. ++ * ++ * Turn a divisor into the necessary bit field for TCFG1. ++ */ ++static inline unsigned long pwm_tdiv_div_bits(unsigned int div) ++{ ++ return ilog2(div); ++} ++ ++#define S3C_TCFG1_MUX_TCLK S3C64XX_TCFG1_MUX_TCLK +Index: linux-2.6.28/arch/arm/mach-s3c6400/include/mach/regs-clock.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-2.6.28/arch/arm/mach-s3c6400/include/mach/regs-clock.h 2009-01-02 00:01:56.000000000 +0100 +@@ -0,0 +1,16 @@ ++/* linux/arch/arm/mach-s3c6400/include/mach/regs-clock.h ++ * ++ * Copyright 2008 Openmoko, Inc. ++ * Copyright 2008 Simtec Electronics ++ * http://armlinux.simtec.co.uk/ ++ * Ben Dooks ++ * ++ * S3C64XX - clock register compatibility with s3c24xx ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation. ++*/ ++ ++#include ++ +Index: linux-2.6.28/arch/arm/mach-s3c6400/include/mach/regs-fb.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-2.6.28/arch/arm/mach-s3c6400/include/mach/regs-fb.h 2009-01-02 00:01:56.000000000 +0100 +@@ -0,0 +1,259 @@ ++/* arch/arm/mach-s3c6400/include/mach/regs-fb.h ++ * ++ * Copyright 2008 Openmoko, Inc. ++ * Copyright 2008 Simtec Electronics ++ * http://armlinux.simtec.co.uk/ ++ * Ben Dooks ++ * ++ * S3C64XX - new-style framebuffer register definitions ++ * ++ * This is the register set for the new style framebuffer interface ++ * found from the S3C2443 onwards and specifically the S3C64XX series ++ * S3C6400 and S3C6410. ++ * ++ * The file contains the cpu specific items which change between whichever ++ * architecture is selected. See for the core definitions ++ * that are the same. ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation. ++*/ ++ ++/* include the core definitions here, in case we really do need to ++ * override them at a later date. ++*/ ++ ++#include ++ ++#define S3C_FB_MAX_WIN (5) /* number of hardware windows available. */ ++#define VIDCON1_FSTATUS_EVEN (1 << 15) ++ ++/* Video timing controls */ ++#define VIDTCON0 (0x10) ++#define VIDTCON1 (0x14) ++#define VIDTCON2 (0x18) ++ ++/* Window position controls */ ++ ++#define WINCON(_win) (0x20 + ((_win) * 4)) ++ ++/* OSD1 and OSD4 do not have register D */ ++ ++#define VIDOSD_A(_win) (0x40 + ((_win) * 16)) ++#define VIDOSD_B(_win) (0x44 + ((_win) * 16)) ++#define VIDOSD_C(_win) (0x48 + ((_win) * 16)) ++#define VIDOSD_D(_win) (0x4C + ((_win) * 16)) ++ ++/* Video buffer addresses */ ++ ++#define VIDW_BUF_START(_buff) (0xA0 + ((_buff) * 8)) ++#define VIDW_BUF_START1(_buff) (0xA4 + ((_buff) * 8)) ++#define VIDW_BUF_END(_buff) (0xD0 + ((_buff) * 8)) ++#define VIDW_BUF_END1(_buff) (0xD4 + ((_buff) * 8)) ++#define VIDW_BUF_SIZE(_buff) (0x100 + ((_buff) * 4)) ++ ++#define VIDINTCON0 (0x130) ++ ++#define WxKEYCONy(_win, _con) ((0x140 + ((_win) * 8)) + ((_con) * 4)) ++ ++/* WINCONx */ ++ ++#define WINCONx_CSCWIDTH_MASK (0x3 << 26) ++#define WINCONx_CSCWIDTH_SHIFT (26) ++#define WINCONx_CSCWIDTH_WIDE (0x0 << 26) ++#define WINCONx_CSCWIDTH_NARROW (0x3 << 26) ++ ++#define WINCONx_ENLOCAL (1 << 22) ++#define WINCONx_BUFSTATUS (1 << 21) ++#define WINCONx_BUFSEL (1 << 20) ++#define WINCONx_BUFAUTOEN (1 << 19) ++#define WINCONx_YCbCr (1 << 13) ++ ++#define WINCON1_LOCALSEL_CAMIF (1 << 23) ++ ++#define WINCON2_LOCALSEL_CAMIF (1 << 23) ++#define WINCON2_BLD_PIX (1 << 6) ++ ++#define WINCON2_ALPHA_SEL (1 << 1) ++#define WINCON2_BPPMODE_MASK (0xf << 2) ++#define WINCON2_BPPMODE_SHIFT (2) ++#define WINCON2_BPPMODE_1BPP (0x0 << 2) ++#define WINCON2_BPPMODE_2BPP (0x1 << 2) ++#define WINCON2_BPPMODE_4BPP (0x2 << 2) ++#define WINCON2_BPPMODE_8BPP_1232 (0x4 << 2) ++#define WINCON2_BPPMODE_16BPP_565 (0x5 << 2) ++#define WINCON2_BPPMODE_16BPP_A1555 (0x6 << 2) ++#define WINCON2_BPPMODE_16BPP_I1555 (0x7 << 2) ++#define WINCON2_BPPMODE_18BPP_666 (0x8 << 2) ++#define WINCON2_BPPMODE_18BPP_A1665 (0x9 << 2) ++#define WINCON2_BPPMODE_19BPP_A1666 (0xa << 2) ++#define WINCON2_BPPMODE_24BPP_888 (0xb << 2) ++#define WINCON2_BPPMODE_24BPP_A1887 (0xc << 2) ++#define WINCON2_BPPMODE_25BPP_A1888 (0xd << 2) ++#define WINCON2_BPPMODE_28BPP_A4888 (0xd << 2) ++ ++#define WINCON3_BLD_PIX (1 << 6) ++ ++#define WINCON3_ALPHA_SEL (1 << 1) ++#define WINCON3_BPPMODE_MASK (0xf << 2) ++#define WINCON3_BPPMODE_SHIFT (2) ++#define WINCON3_BPPMODE_1BPP (0x0 << 2) ++#define WINCON3_BPPMODE_2BPP (0x1 << 2) ++#define WINCON3_BPPMODE_4BPP (0x2 << 2) ++#define WINCON3_BPPMODE_16BPP_565 (0x5 << 2) ++#define WINCON3_BPPMODE_16BPP_A1555 (0x6 << 2) ++#define WINCON3_BPPMODE_16BPP_I1555 (0x7 << 2) ++#define WINCON3_BPPMODE_18BPP_666 (0x8 << 2) ++#define WINCON3_BPPMODE_18BPP_A1665 (0x9 << 2) ++#define WINCON3_BPPMODE_19BPP_A1666 (0xa << 2) ++#define WINCON3_BPPMODE_24BPP_888 (0xb << 2) ++#define WINCON3_BPPMODE_24BPP_A1887 (0xc << 2) ++#define WINCON3_BPPMODE_25BPP_A1888 (0xd << 2) ++#define WINCON3_BPPMODE_28BPP_A4888 (0xd << 2) ++ ++#define VIDINTCON0_FIFIOSEL_WINDOW2 (0x10 << 5) ++#define VIDINTCON0_FIFIOSEL_WINDOW3 (0x20 << 5) ++#define VIDINTCON0_FIFIOSEL_WINDOW4 (0x40 << 5) ++ ++#define DITHMODE (0x170) ++#define WINxMAP(_win) (0x180 + ((_win) * 4)) ++ ++ ++#define DITHMODE_R_POS_MASK (0x3 << 5) ++#define DITHMODE_R_POS_SHIFT (5) ++#define DITHMODE_R_POS_8BIT (0x0 << 5) ++#define DITHMODE_R_POS_6BIT (0x1 << 5) ++#define DITHMODE_R_POS_5BIT (0x2 << 5) ++ ++#define DITHMODE_G_POS_MASK (0x3 << 3) ++#define DITHMODE_G_POS_SHIFT (3) ++#define DITHMODE_G_POS_8BIT (0x0 << 3) ++#define DITHMODE_G_POS_6BIT (0x1 << 3) ++#define DITHMODE_G_POS_5BIT (0x2 << 3) ++ ++#define DITHMODE_B_POS_MASK (0x3 << 1) ++#define DITHMODE_B_POS_SHIFT (1) ++#define DITHMODE_B_POS_8BIT (0x0 << 1) ++#define DITHMODE_B_POS_6BIT (0x1 << 1) ++#define DITHMODE_B_POS_5BIT (0x2 << 1) ++ ++#define DITHMODE_DITH_EN (1 << 0) ++ ++#define WPALCON (0x1A0) ++ ++#define WPALCON_W4PAL_16BPP_A555 (1 << 8) ++#define WPALCON_W3PAL_16BPP_A555 (1 << 7) ++#define WPALCON_W2PAL_16BPP_A555 (1 << 6) ++ ++/* Palette registers */ ++ ++#define WIN2_PAL(_entry) (0x300 + ((_entry) * 2)) ++#define WIN3_PAL(_entry) (0x320 + ((_entry) * 2)) ++#define WIN4_PAL(_entry) (0x340 + ((_entry) * 2)) ++#define WIN0_PAL(_entry) (0x400 + ((_entry) * 4)) ++#define WIN1_PAL(_entry) (0x800 + ((_entry) * 4)) ++ ++/* system specific implementation code for palette sizes, and other ++ * information that changes depending on which architecture is being ++ * compiled. ++*/ ++ ++/* return true if window _win has OSD register D */ ++#define s3c_fb_has_osd_d(_win) ((_win) != 4 && (_win) != 0) ++ ++static inline unsigned int s3c_fb_win_pal_size(unsigned int win) ++{ ++ if (win < 2) ++ return 256; ++ if (win < 4) ++ return 16; ++ if (win == 4) ++ return 4; ++ ++ BUG(); /* shouldn't get here */ ++} ++ ++static inline int s3c_fb_validate_win_bpp(unsigned int win, unsigned int bpp) ++{ ++ /* all windows can do 1/2 bpp */ ++ ++ if ((bpp == 25 || bpp == 19) && win == 0) ++ return 0; /* win 0 does not have 19 or 25bpp modes */ ++ ++ if (bpp == 4 && win == 4) ++ return 0; ++ ++ if (bpp == 8 && (win >= 3)) ++ return 0; /* win 3/4 cannot do 8bpp in any mode */ ++ ++ return 1; ++} ++ ++static inline unsigned int s3c_fb_pal_reg(unsigned int window, int reg) ++{ ++ switch (window) { ++ case 0: return WIN0_PAL(reg); ++ case 1: return WIN1_PAL(reg); ++ case 2: return WIN2_PAL(reg); ++ case 3: return WIN3_PAL(reg); ++ case 4: return WIN4_PAL(reg); ++ } ++ ++ BUG(); ++} ++ ++static inline int s3c_fb_pal_is16(unsigned int window) ++{ ++ return window > 1; ++} ++ ++struct s3c_fb_palette { ++ struct fb_bitfield r; ++ struct fb_bitfield g; ++ struct fb_bitfield b; ++ struct fb_bitfield a; ++}; ++ ++static inline void s3c_fb_init_palette(unsigned int window, ++ struct s3c_fb_palette *palette) ++{ ++ if (window < 2) { ++ /* Windows 0/1 are 8/8/8 or A/8/8/8 */ ++ palette->r.offset = 16; ++ palette->r.length = 8; ++ palette->g.offset = 8; ++ palette->g.length = 8; ++ palette->b.offset = 0; ++ palette->b.length = 8; ++ } else { ++ /* currently we assume RGB 5/6/5 */ ++ palette->r.offset = 11; ++ palette->r.length = 5; ++ palette->g.offset = 5; ++ palette->g.length = 6; ++ palette->b.offset = 0; ++ palette->b.length = 5; ++ } ++} ++ ++/* Notes on per-window bpp settings ++ * ++ * Value Win0 Win1 Win2 Win3 Win 4 ++ * 0000 1(P) 1(P) 1(P) 1(P) 1(P) ++ * 0001 2(P) 2(P) 2(P) 2(P) 2(P) ++ * 0010 4(P) 4(P) 4(P) 4(P) -none- ++ * 0011 8(P) 8(P) -none- -none- -none- ++ * 0100 -none- 8(A232) 8(A232) -none- -none- ++ * 0101 16(565) 16(565) 16(565) 16(565) 16(565) ++ * 0110 -none- 16(A555) 16(A555) 16(A555) 16(A555) ++ * 0111 16(I555) 16(I565) 16(I555) 16(I555) 16(I555) ++ * 1000 18(666) 18(666) 18(666) 18(666) 18(666) ++ * 1001 -none- 18(A665) 18(A665) 18(A665) 16(A665) ++ * 1010 -none- 19(A666) 19(A666) 19(A666) 19(A666) ++ * 1011 24(888) 24(888) 24(888) 24(888) 24(888) ++ * 1100 -none- 24(A887) 24(A887) 24(A887) 24(A887) ++ * 1101 -none- 25(A888) 25(A888) 25(A888) 25(A888) ++ * 1110 -none- -none- -none- -none- -none- ++ * 1111 -none- -none- -none- -none- -none- ++*/ +Index: linux-2.6.28/arch/arm/mach-s3c6400/include/mach/regs-irq.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-2.6.28/arch/arm/mach-s3c6400/include/mach/regs-irq.h 2009-01-02 00:01:56.000000000 +0100 +@@ -0,0 +1,20 @@ ++/* linux/arch/arm/mach-s3c6400/include/mach/regs-irq.h ++ * ++ * Copyright 2008 Openmoko, Inc. ++ * Copyright 2008 Simtec Electronics ++ * http://armlinux.simtec.co.uk/ ++ * Ben Dooks ++ * ++ * S3C64XX - IRQ register definitions ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation. ++*/ ++ ++#ifndef __ASM_ARCH_REGS_IRQ_H ++#define __ASM_ARCH_REGS_IRQ_H __FILE__ ++ ++#include ++ ++#endif /* __ASM_ARCH_6400_REGS_IRQ_H */ +Index: linux-2.6.28/arch/arm/mach-s3c6400/include/mach/system.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-2.6.28/arch/arm/mach-s3c6400/include/mach/system.h 2009-01-02 00:01:56.000000000 +0100 +@@ -0,0 +1,44 @@ ++/* linux/arch/arm/mach-s3c6400/include/mach/system.h ++ * ++ * Copyright 2008 Openmoko, Inc. ++ * Copyright 2008 Simtec Electronics ++ * Ben Dooks ++ * http://armlinux.simtec.co.uk/ ++ * ++ * S3C6400 - system implementation ++ */ ++ ++#ifndef __ASM_ARCH_SYSTEM_H ++#define __ASM_ARCH_SYSTEM_H __FILE__ ++ ++#include ++#include ++ ++#include ++#include ++ ++static void arch_idle(void) ++{ ++ unsigned long flags; ++ u32 mode; ++ ++ /* ensure that if we execute the cpu idle sequence that we ++ * go into idle mode instead of powering off. */ ++ ++ local_irq_save(flags); ++ mode = __raw_readl(S3C64XX_PWR_CFG); ++ mode &= ~S3C64XX_PWRCFG_CFG_WFI_MASK; ++ mode |= S3C64XX_PWRCFG_CFG_WFI_IDLE; ++ __raw_writel(mode, S3C64XX_PWR_CFG); ++ ++ local_irq_restore(flags); ++ ++ cpu_do_idle(); ++} ++ ++static void arch_reset(char mode) ++{ ++ /* nothing here yet */ ++} ++ ++#endif /* __ASM_ARCH_IRQ_H */ +Index: linux-2.6.28/arch/arm/mach-s3c6400/include/mach/tick.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-2.6.28/arch/arm/mach-s3c6400/include/mach/tick.h 2009-01-02 00:01:56.000000000 +0100 +@@ -0,0 +1,29 @@ ++/* linux/arch/arm/mach-s3c6400/include/mach/tick.h ++ * ++ * Copyright 2008 Openmoko, Inc. ++ * Copyright 2008 Simtec Electronics ++ * http://armlinux.simtec.co.uk/ ++ * Ben Dooks ++ * ++ * S3C64XX - Timer tick support definitions ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation. ++*/ ++ ++#ifndef __ASM_ARCH_TICK_H ++#define __ASM_ARCH_TICK_H __FILE__ ++ ++/* note, the timer interrutps turn up in 2 places, the vic and then ++ * the timer block. We take the VIC as the base at the moment. ++ */ ++static inline u32 s3c24xx_ostimer_pending(void) ++{ ++ u32 pend = __raw_readl(S3C_VA_VIC0 + VIC_RAW_STATUS); ++ return pend & 1 << (IRQ_TIMER4_VIC - S3C64XX_IRQ_VIC0(0)); ++} ++ ++#define TICK_MAX (0xffffffff) ++ ++#endif /* __ASM_ARCH_6400_TICK_H */ +Index: linux-2.6.28/arch/arm/mach-s3c6400/include/mach/uncompress.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-2.6.28/arch/arm/mach-s3c6400/include/mach/uncompress.h 2009-01-02 00:01:56.000000000 +0100 +@@ -0,0 +1,28 @@ ++/* arch/arm/mach-s3c6400/include/mach/uncompress.h ++ * ++ * Copyright 2008 Openmoko, Inc. ++ * Copyright 2008 Simtec Electronics ++ * http://armlinux.simtec.co.uk/ ++ * Ben Dooks ++ * ++ * S3C6400 - uncompress code ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation. ++*/ ++ ++#ifndef __ASM_ARCH_UNCOMPRESS_H ++#define __ASM_ARCH_UNCOMPRESS_H ++ ++#include ++#include ++ ++static void arch_detect_cpu(void) ++{ ++ /* we do not need to do any cpu detection here at the moment. */ ++ fifo_mask = S3C2440_UFSTAT_TXMASK; ++ fifo_max = 63 << S3C2440_UFSTAT_TXSHIFT; ++} ++ ++#endif /* __ASM_ARCH_UNCOMPRESS_H */ +Index: linux-2.6.28/arch/arm/mach-s3c6400/Kconfig +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-2.6.28/arch/arm/mach-s3c6400/Kconfig 2009-01-02 00:01:56.000000000 +0100 +@@ -0,0 +1,8 @@ ++# arch/arm/mach-s3c6400/Kconfig ++# ++# Copyright 2008 Openmoko, Inc. ++# Simtec Electronics, Ben Dooks ++# ++# Licensed under GPLv2 ++ ++# Currently nothing here, this will be added later +Index: linux-2.6.28/arch/arm/mach-s3c6400/Makefile +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-2.6.28/arch/arm/mach-s3c6400/Makefile 2009-01-02 00:01:56.000000000 +0100 +@@ -0,0 +1,15 @@ ++# arch/arm/mach-s3c6400/Makefile ++# ++# Copyright 2008 Openmoko, Inc. ++# Copyright 2008 Simtec Electronics ++# ++# Licensed under GPLv2 ++ ++obj-y := ++obj-m := ++obj-n := ++obj- := ++ ++# Core support for S3C6400 system ++ ++obj-n += blank.o +Index: linux-2.6.28/arch/arm/mach-s3c6400/Makefile.boot +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-2.6.28/arch/arm/mach-s3c6400/Makefile.boot 2009-01-02 00:01:56.000000000 +0100 +@@ -0,0 +1,2 @@ ++ zreladdr-y := 0x50008000 ++params_phys-y := 0x50000100 +Index: linux-2.6.28/arch/arm/mach-s3c6410/cpu.c +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-2.6.28/arch/arm/mach-s3c6410/cpu.c 2009-01-02 00:01:56.000000000 +0100 +@@ -0,0 +1,101 @@ ++/* linux/arch/arm/mach-s3c6410/cpu.c ++ * ++ * Copyright 2008 Simtec Electronics ++ * Copyright 2008 Simtec Electronics ++ * Ben Dooks ++ * http://armlinux.simtec.co.uk/ ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation. ++*/ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include ++#include ++#include ++ ++#include ++#include ++ ++#include ++#include ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++/* Initial IO mappings */ ++ ++static struct map_desc s3c6410_iodesc[] __initdata = { ++}; ++ ++/* s3c6410_map_io ++ * ++ * register the standard cpu IO areas ++*/ ++ ++void __init s3c6410_map_io(void) ++{ ++ iotable_init(s3c6410_iodesc, ARRAY_SIZE(s3c6410_iodesc)); ++ ++ /* initialise device information early */ ++ s3c6410_default_sdhci0(); ++ s3c6410_default_sdhci1(); ++ ++ /* the i2c devices are directly compatible with s3c2440 */ ++ s3c_i2c0_setname("s3c2440-i2c"); ++ s3c_i2c1_setname("s3c2440-i2c"); ++} ++ ++void __init s3c6410_init_clocks(int xtal) ++{ ++ printk(KERN_DEBUG "%s: initialising clocks\n", __func__); ++ s3c24xx_register_baseclocks(xtal); ++ s3c64xx_register_clocks(); ++ s3c6400_register_clocks(); ++ s3c6400_setup_clocks(); ++} ++ ++void __init s3c6410_init_irq(void) ++{ ++ /* VIC0 is missing IRQ7, VIC1 is fully populated. */ ++ s3c64xx_init_irq(~0 & ~(1 << 7), ~0); ++} ++ ++struct sysdev_class s3c6410_sysclass = { ++ .name = "s3c6410-core", ++}; ++ ++static struct sys_device s3c6410_sysdev = { ++ .cls = &s3c6410_sysclass, ++}; ++ ++static int __init s3c6410_core_init(void) ++{ ++ return sysdev_class_register(&s3c6410_sysclass); ++} ++ ++core_initcall(s3c6410_core_init); ++ ++int __init s3c6410_init(void) ++{ ++ printk("S3C6410: Initialising architecture\n"); ++ ++ return sysdev_register(&s3c6410_sysdev); ++} +Index: linux-2.6.28/arch/arm/mach-s3c6410/include/mach/om-gta03.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-2.6.28/arch/arm/mach-s3c6410/include/mach/om-gta03.h 2009-01-02 00:01:56.000000000 +0100 +@@ -0,0 +1,91 @@ ++/* ++ * GTA03 GPIO Mappings ++ * ++ * (C) 2008 by Openmoko Inc. ++ * Author: Andy Green ++ * All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation ++ * ++ */ ++ ++#ifndef _OM_GTA03_H ++#define _OM_GTA03_H ++ ++#include ++#include ++#include ++ ++extern struct pcf50633_platform_data om_gta03_pcf_pdata; ++ ++/* ATAG_REVISION from bootloader */ ++#define GTA03v1_SYSTEM_REV 0x00000001 ++ ++#define GTA03_GPIO_VIBRATOR_ON S3C64XX_GPF(13) ++#define GTA03_GPIO_CLKOUT S3C64XX_GPF(14) ++ ++#define GTA03_GPIO_ACCEL_MISO S3C64XX_GPC(0) ++#define GTA03_GPIO_ACCEL_CLK S3C64XX_GPC(1) ++#define GTA03_GPIO_ACCEL_MOSI S3C64XX_GPC(2) ++ ++#define GTA03_GPIO_LCM_MISO S3C64XX_GPC(4) ++#define GTA03_GPIO_LCM_CLK S3C64XX_GPC(5) ++#define GTA03_GPIO_LCM_MOSI S3C64XX_GPC(6) ++#define GTA03_GPIO_LCM_CS S3C64XX_GPC(7) ++ ++#define GTA03_GPIO_BTPCM_SHARED_SCLK S3C64XX_GPE(0) ++#define GTA03_GPIO_BTPCM_SHARED_EXTCLK S3C64XX_GPE(1) ++#define GTA03_GPIO_BTPCM_SHARED_FSYNC S3C64XX_GPE(2) ++#define GTA03_GPIO_BTPCM_SHARED_SIN S3C64XX_GPE(3) ++#define GTA03_GPIO_BTPCM_SHARED_SOUT S3C64XX_GPE(4) ++ ++#define GTA03_GPIO_WLAN_RESET S3C64XX_GPH(6) ++#define GTA03_GPIO_HDQ S3C64XX_GPH(7) ++#define GTA03_GPIO_WLAN_PWRDN S3C64XX_GPH(8) ++ ++#define GTA03_GPIO_VERSION2 S3C64XX_GPI(0) ++#define GTA03_GPIO_VERSION1 S3C64XX_GPI(1) ++#define GTA03_GPIO_VERSION0 S3C64XX_GPI(8) ++ ++#define GTA03_GPIO_NWLAN_POWER S3C64XX_GPK(0) ++#define GTA03_GPIO_MODEN_ON S3C64XX_GPK(2) ++ ++#define GTA03_GPIO_TP_RESET S3C64XX_GPM(0) ++#define GTA03_GPIO_GPS_LNA_EN S3C64XX_GPM(2) ++ ++#define GTA03_GPIO_USB_FLT S3C64XX_GPM(4) ++#define GTA03_GPIO_USB_OC S3C64XX_GPM(5) ++ ++#define GTA03_GPIO_ACCEL_INT1 S3C64XX_GPN(0) ++#define GTA03_GPIO_KEY_MINUS S3C64XX_GPN(1) ++#define GTA03_GPIO_KEY_PLUS S3C64XX_GPN(2) ++#define GTA03_GPIO_PWR_IND S3C64XX_GPN(3) ++#define GTA03_GPIO_PWR_IRQ S3C64XX_GPN(4) ++#define GTA03_GPIO_TOUCH S3C64XX_GPN(5) ++#define GTA03_GPIO_JACK_INSERT S3C64XX_GPN(6) ++#define GTA03_GPIO_GPS_INT S3C64XX_GPN(7) ++#define GTA03_GPIO_HOLD S3C64XX_GPN(8) ++#define GTA03_GPIO_WLAN_WAKEUP S3C64XX_GPN(9) ++#define GTA03_GPIO_ACCEL_INT2 S3C64XX_GPN(10) ++#define GTA03_GPIO_IO1 S3C64XX_GPN(11) ++#define GTA03_GPIO_NONKEYWAKE S3C64XX_GPN(12) ++ ++#define GTA03_GPIO_N_MODEM_RESET S3C64XX_GPO(1) ++ ++#define GTA03_IRQ_GSENSOR_1 S3C_EINT(0) ++#define GTA03_IRQ_KEY_MINUS S3C_EINT(1) ++#define GTA03_IRQ_KEY_PLUS S3C_EINT(2) ++#define GTA03_IRQ_PWR_IND S3C_EINT(3) ++#define GTA03_IRQ_PMU S3C_EINT(4) ++#define GTA03_IRQ_TOUCH S3C_EINT(5) ++#define GTA03_IRQ_JACK_INSERT S3C_EINT(6) ++#define GTA03_IRQ_GPS_INT S3C_EINT(7) ++#define GTA03_IRQ_NHOLD S3C_EINT(8) ++#define GTA03_IRQ_WLAN_WAKEUP S3C_EINT(9) ++#define GTA03_IRQ_GSENSOR_2 S3C_EINT(10) ++#define GTA03_IRQ_IO1 S3C_EINT(11) ++#define GTA03_IRQ_NONKEYWAKE S3C_EINT(12) ++ ++#endif /* _OM_GTA03_H */ +Index: linux-2.6.28/arch/arm/mach-s3c6410/Kconfig +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-2.6.28/arch/arm/mach-s3c6410/Kconfig 2009-01-02 00:01:56.000000000 +0100 +@@ -0,0 +1,80 @@ ++# arch/arm/mach-s3c6410/Kconfig ++# ++# Copyright 2008 Openmoko, Inc. ++# Copyright 2008 Simtec Electronics ++# ++# Licensed under GPLv2 ++ ++# Configuration options for the S3C6410 CPU ++ ++config CPU_S3C6410 ++ bool ++ select CPU_S3C6400_INIT ++ select CPU_S3C6400_CLOCK ++ help ++ Enable S3C6410 CPU support ++ ++config S3C6410_SETUP_SDHCI ++ bool ++ help ++ Internal helper functions for S3C6410 based SDHCI systems ++ ++config MACH_SMDK6410 ++ bool "SMDK6410" ++ select CPU_S3C6410 ++ select S3C_DEV_HSMMC ++ select S3C_DEV_HSMMC1 ++ select S3C_DEV_I2C1 ++ select S3C_DEV_FB ++ select S3C6410_SETUP_SDHCI ++ select S3C64XX_SETUP_I2C1 ++ select S3C64XX_SETUP_FB_24BPP ++ help ++ Machine support for the Samsung SMDK6410 ++ ++# At least some of the SMDK6410s were shipped with the card detect ++# for the MMC/SD slots connected to the same input. This means that ++# either the boards need to be altered to have channel0 to an alternate ++# configuration or that only one slot can be used. ++ ++choice ++ prompt "SMDK6410 MMC/SD slot setup" ++ depends on MACH_SMDK6410 ++ ++config SMDK6410_SD_CH0 ++ bool "Use channel 0 only" ++ depends on MACH_SMDK6410 ++ help ++ Select CON7 (channel 0) as the MMC/SD slot, as ++ at least some SMDK6410 boards come with the ++ resistors fitted so that the card detects for ++ channels 0 and 1 are the same. ++ ++config SMDK6410_SD_CH1 ++ bool "Use channel 1 only" ++ depends on MACH_SMDK6410 ++ help ++ Select CON6 (channel 1) as the MMC/SD slot, as ++ at least some SMDK6410 boards come with the ++ resistors fitted so that the card detects for ++ channels 0 and 1 are the same. ++ ++endchoice ++ ++config MACH_OPENMOKO_GTA03 ++ bool "Openmoko GTA03 Phone" ++ select CPU_S3C6410 ++ select S3C_DEV_HSMMC ++ select S3C_DEV_HSMMC1 ++ select S3C_DEV_I2C1 ++ select S3C6410_SETUP_SDHCI ++ select S3C64XX_SETUP_I2C1 ++ select S3C_DEV_FB ++ select S3C64XX_SETUP_FB_24BPP ++# select SENSORS_PCF50633 ++ select POWER_SUPPLY ++# select GTA02_HDQ ++ select MACH_NEO1973 ++ help ++ Machine support for the Openmoko GTA03 Phone ++ +Index: linux-2.6.28/arch/arm/mach-s3c6410/mach-om-gta03.c +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-2.6.28/arch/arm/mach-s3c6410/mach-om-gta03.c 2009-01-02 00:01:56.000000000 +0100 +@@ -0,0 +1,654 @@ ++/* linux/arch/arm/mach-s3c6410/mach-om_gta03.c ++ * ++ * Copyright 2008 Openmoko, Inc. ++ * Andy Green ++ * ++ * based on mach_om_gta03.c which is ++ * ++ * Copyright 2008 Openmoko, Inc. ++ * Copyright 2008 Simtec Electronics ++ * Ben Dooks ++ * http://armlinux.simtec.co.uk/ ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation. ++ * ++*/ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include