From: Shiji Yang <yangshiji66@qq.com>
Date: Fri, 26 Jul 2024 10:19:15 +0000 (+0800)
Subject: ramips: fix PCIe reset pins for MTC WR1201
X-Git-Url: http://git.lede-project.org./?a=commitdiff_plain;h=901adc3f2f651bd852de6ad4790e01ea9829eb75;p=openwrt%2Fstaging%2Fstintel.git

ramips: fix PCIe reset pins for MTC WR1201

This router has two reset pins, GPIO 8 and GPIO 19. We have to
configure them correctly to ensure that the wireless NICs work
properly.

Fixes: https://github.com/openwrt/openwrt/issues/11736
Signed-off-by: Shiji Yang <yangshiji66@qq.com>
Link: https://github.com/openwrt/openwrt/pull/16009
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
---

diff --git a/target/linux/ramips/dts/mt7621_mtc_wr1201.dts b/target/linux/ramips/dts/mt7621_mtc_wr1201.dts
index 31f3eb8657..24303ec5b3 100644
--- a/target/linux/ramips/dts/mt7621_mtc_wr1201.dts
+++ b/target/linux/ramips/dts/mt7621_mtc_wr1201.dts
@@ -166,8 +166,18 @@
 	status = "okay";
 };
 
+&pcie_pins {
+	uart3 {
+		groups = "uart3";
+		function = "gpio";
+	};
+};
+
 &pcie {
 	status = "okay";
+
+	reset-gpios = <&gpio 8 GPIO_ACTIVE_LOW>,
+		      <&gpio 19 GPIO_ACTIVE_LOW>;
 };
 
 &pcie0 {