From: Michael Buesch Date: Fri, 20 Feb 2009 13:58:59 +0000 (+0100) Subject: b43: Enable PCI slow clock workaround, if needed. X-Git-Url: http://git.lede-project.org./?a=commitdiff_plain;h=8821905cfb65504f64e6beb014133bd2a998f5dc;p=openwrt%2Fstaging%2Fblogic.git b43: Enable PCI slow clock workaround, if needed. Enable the PCI slow clock workaround, if we're running a PCI core rev <= 10. Signed-off-by: Michael Buesch Signed-off-by: John W. Linville --- diff --git a/drivers/net/wireless/b43/main.c b/drivers/net/wireless/b43/main.c index 3ad3a6c447c0..ef514827a8d5 100644 --- a/drivers/net/wireless/b43/main.c +++ b/drivers/net/wireless/b43/main.c @@ -4179,6 +4179,9 @@ static int b43_wireless_core_init(struct b43_wldev *dev) } if (sprom->boardflags_lo & B43_BFL_XTAL_NOSLOW) hf |= B43_HF_DSCRQ; /* Disable slowclock requests from ucode. */ + if ((bus->bustype == SSB_BUSTYPE_PCI) && + (bus->pcicore.dev->id.revision <= 10)) + hf |= B43_HF_PCISCW; /* PCI slow clock workaround. */ b43_hf_write(dev, hf); b43_set_retry_limits(dev, B43_DEFAULT_SHORT_RETRY_LIMIT,