From: John Crispin Date: Mon, 18 Nov 2013 09:35:41 +0000 (+0000) Subject: ralink: add support for ralink mt7620 nand eval board X-Git-Url: http://git.lede-project.org./?a=commitdiff_plain;h=82e624279818643f58b92a88277f6a9eb1fd7ed0;p=openwrt%2Fstaging%2Fblocktrron.git ralink: add support for ralink mt7620 nand eval board Signed-off-by: John Crispin SVN-Revision: 38848 --- diff --git a/target/linux/ramips/base-files/lib/ramips.sh b/target/linux/ramips/base-files/lib/ramips.sh index c93561fb0f..972f41534f 100755 --- a/target/linux/ramips/base-files/lib/ramips.sh +++ b/target/linux/ramips/base-files/lib/ramips.sh @@ -268,6 +268,9 @@ ramips_board_detect() { *"HG255D") name="hg255d" ;; + *"V22SG") + name="v22sg" + ;; *) name="generic" ;; diff --git a/target/linux/ramips/dts/MT7620a_V22SG.dts b/target/linux/ramips/dts/MT7620a_V22SG.dts new file mode 100644 index 0000000000..cec912df3b --- /dev/null +++ b/target/linux/ramips/dts/MT7620a_V22SG.dts @@ -0,0 +1,113 @@ +/dts-v1/; + +/include/ "mt7620a.dtsi" + +/ { + compatible = "ralink,mt7620a-eval-board", "ralink,mt7620a-soc"; + model = "Ralink MT7620a V22SG High Power evaluation board"; + + /*palmbus@10000000 { + };*/ + + pinctrl { + state_default: pinctrl0 { + gpio { + ralink,group = "i2c", "uartf", "spi"; + ralink,function = "gpio"; + }; + }; + }; + + ethernet@10100000 { + status = "okay"; + + pinctrl-names = "default"; + pinctrl-0 = <&rgmii1_pins &rgmii2_pins &mdio_pins>; + + ralink,port-map = "llllw"; + + port@4 { + status = "okay"; + phy-handle = <&phy4>; + phy-mode = "rgmii"; + }; + + port@5 { + status = "okay"; + phy-handle = <&phy5>; + phy-mode = "rgmii"; + }; + + mdio-bus { + status = "okay"; + + phy4: ethernet-phy@4 { + reg = <4>; + phy-mode = "rgmii"; + }; + + phy5: ethernet-phy@5 { + reg = <5>; + phy-mode = "rgmii"; + }; + }; + }; + + gsw@10110000 { + ralink,port4 = "gmac"; + }; + + pcie@10140000 { + status = "okay"; + }; + + ehci@101c0000 { + status = "okay"; + }; + + ohci@101c1000 { + status = "okay"; + }; + + gpio-keys-polled { + compatible = "gpio-keys-polled"; + #address-cells = <1>; + #size-cells = <0>; + poll-interval = <20>; + reset { + label = "reset"; + gpios = <&gpio0 1 1>; + linux,code = <0x198>; + }; + aoss { + label = "aoss"; + gpios = <&gpio0 2 1>; + linux,code = <0x211>; + }; + }; + + nand { + #address-cells = <1>; + #size-cells = <1>; + compatible = "mtk,mt7620-nand"; + partition@0 { + label = "u-boot"; + reg = <0x0 0x40000>; + read-only; + }; + partition@40000 { + label = "u-boot-env"; + reg = <0x40000 0x20000>; + read-only; + }; + factory: partition@60000 { + label = "factory"; + reg = <0x60000 0x20000>; + read-only; + }; + partition@80000 { + label = "firmware"; + reg = <0x80000 0x7f80000>; + }; + }; +}; diff --git a/target/linux/ramips/image/Makefile b/target/linux/ramips/image/Makefile index 5d99736a3d..32047ccfed 100644 --- a/target/linux/ramips/image/Makefile +++ b/target/linux/ramips/image/Makefile @@ -613,6 +613,7 @@ endif Image/Build/Profile/MT7620a=$(call BuildFirmware/Default8M/$(1),$(1),mt7620a,MT7620a) Image/Build/Profile/MT7620a_MT7610e=$(call BuildFirmware/Default8M/$(1),$(1),mt7620a_mt7610e,MT7620a_MT7610e) Image/Build/Profile/MT7620a_MT7530=$(call BuildFirmware/Default8M/$(1),$(1),mt7620a_mt7530,MT7620a_MT7530) +Image/Build/Profile/MT7620a_V22SG=$(call BuildFirmware/Default8M/$(1),$(1),mt7620a_v22sg,MT7620a_V22SG) Image/Build/Profile/RP-N53=$(call BuildFirmware/Default8M/$(1),$(1),rp_n53,RP-N53) whr_300hp2_mtd_size=7012352 Image/Build/Profile/WHR-300HP2=$(call BuildFirmware/CustomFlash/$(1),$(1),whr-300hp2,WHR-300HP2,$(whr_300hp2_mtd_size)) @@ -625,6 +626,7 @@ define Image/Build/Profile/Default $(call Image/Build/Profile/MT7620a,$(1)) $(call Image/Build/Profile/MT7620a_MT7610e,$(1)) $(call Image/Build/Profile/MT7620a_MT7530,$(1)) + $(call Image/Build/Profile/MT7620a_V22SG,$(1)) $(call Image/Build/Profile/RP-N53,$(1)) $(call Image/Build/Profile/DIR-810L,$(1)) $(call Image/Build/Profile/WHR-300HP2,$(1))