From: Bard Liao <bardliao@realtek.com>
Date: Thu, 17 May 2018 05:54:08 +0000 (+0800)
Subject: ASoC: rt5670: improve PLL function's stability
X-Git-Url: http://git.lede-project.org./?a=commitdiff_plain;h=81dd1c5dcf510a2104b3468e9c4884f85ef1f644;p=openwrt%2Fstaging%2Fblogic.git

ASoC: rt5670: improve PLL function's stability

Set PR-38 register to 0x1fe1 will make PLL function more stable.

Signed-off-by: Bard Liao <bardliao@realtek.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
---

diff --git a/sound/soc/codecs/rt5670.c b/sound/soc/codecs/rt5670.c
index dc7df337d5f8..732ef928b25d 100644
--- a/sound/soc/codecs/rt5670.c
+++ b/sound/soc/codecs/rt5670.c
@@ -71,7 +71,7 @@ static const struct regmap_range_cfg rt5670_ranges[] = {
 
 static const struct reg_sequence init_list[] = {
 	{ RT5670_PR_BASE + 0x14, 0x9a8a },
-	{ RT5670_PR_BASE + 0x38, 0x3ba1 },
+	{ RT5670_PR_BASE + 0x38, 0x1fe1 },
 	{ RT5670_PR_BASE + 0x3d, 0x3640 },
 	{ 0x8a, 0x0123 },
 };