From: Gabor Juhos <juhosg@openwrt.org>
Date: Mon, 21 Mar 2016 13:15:16 +0000 (+0000)
Subject: adm5120: lzma-loader: fix cache invalidation
X-Git-Url: http://git.lede-project.org./?a=commitdiff_plain;h=7d8d26272bb5e95e42f25aa276470907ff493765;p=openwrt%2Fstaging%2Fthess.git

adm5120: lzma-loader: fix cache invalidation

The current code only partially invalidates both caches
because the cache size and cache-line size values are
incorrectly passed to the C code.

Fix the assembly code to pass the arguments in the correct
order.

Compile tested only.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>

SVN-Revision: 49058
---

diff --git a/target/linux/adm5120/image/lzma-loader/src/head.S b/target/linux/adm5120/image/lzma-loader/src/head.S
index 329f437382..9f82fabdc2 100644
--- a/target/linux/adm5120/image/lzma-loader/src/head.S
+++ b/target/linux/adm5120/image/lzma-loader/src/head.S
@@ -195,10 +195,10 @@ noic:
 	sw	a2, 8(sp)
 	sw	a3, 12(sp)
 #endif
-	sw	s3, 16(sp)		/* icache line size */
-	sw	s4, 20(sp)		/* icache size */
-	sw	s1, 24(sp)		/* dcache line size */
-	sw	s2, 28(sp)		/* dcache size */
+	sw	s4, 16(sp)		/* icache size */
+	sw	s3, 20(sp)		/* icache line size */
+	sw	s2, 24(sp)		/* dcache size */
+	sw	s1, 28(sp)		/* dcache line size */
 
 	/* jump to the decompressor routine */
 	la	t0, decompress_entry