From: Geert Uytterhoeven Date: Tue, 28 Aug 2018 14:13:27 +0000 (+0200) Subject: arm64: dts: renesas: r8a77965: Fix clock/reset for usb2_phy1 X-Git-Url: http://git.lede-project.org./?a=commitdiff_plain;h=7a590fe317488783a229e5a80e91868942e8463f;p=openwrt%2Fstaging%2Fblogic.git arm64: dts: renesas: r8a77965: Fix clock/reset for usb2_phy1 usb2_phy1 accidentally uses the same clock/reset as usb2_phy0. Fixes: b5857630a829a8d5 ("arm64: dts: renesas: r8a77965: add usb2_phy nodes") Signed-off-by: Geert Uytterhoeven Reviewed-by: Yoshihiro Shimoda Signed-off-by: Simon Horman --- diff --git a/arch/arm64/boot/dts/renesas/r8a77965.dtsi b/arch/arm64/boot/dts/renesas/r8a77965.dtsi index 108f53cfef5c..77fb909cc839 100644 --- a/arch/arm64/boot/dts/renesas/r8a77965.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a77965.dtsi @@ -1530,9 +1530,9 @@ compatible = "renesas,usb2-phy-r8a77965", "renesas,rcar-gen3-usb2-phy"; reg = <0 0xee0a0200 0 0x700>; - clocks = <&cpg CPG_MOD 703>; + clocks = <&cpg CPG_MOD 702>; power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; - resets = <&cpg 703>; + resets = <&cpg 702>; #phy-cells = <0>; status = "disabled"; };