From: Matteo Croce Date: Mon, 7 Apr 2008 01:30:07 +0000 (+0000) Subject: ar7: remove unneeded packed and array initialization X-Git-Url: http://git.lede-project.org./?a=commitdiff_plain;h=78e07d75cd92f560273f8878ea274d2b84dabba9;p=openwrt%2Fstaging%2Frmilecki.git ar7: remove unneeded packed and array initialization SVN-Revision: 10752 --- diff --git a/target/linux/ar7/files/arch/mips/ar7/clock.c b/target/linux/ar7/files/arch/mips/ar7/clock.c index 5a1c4fea141..0f7e2d7eeb3 100644 --- a/target/linux/ar7/files/arch/mips/ar7/clock.c +++ b/target/linux/ar7/files/arch/mips/ar7/clock.c @@ -61,14 +61,14 @@ struct tnetd7300_clock { #define PLL_DIV 0x00000002 #define PLL_STATUS 0x00000001 u32 unused2[3]; -} __packed; +}; struct tnetd7300_clocks { struct tnetd7300_clock bus; struct tnetd7300_clock cpu; struct tnetd7300_clock usb; struct tnetd7300_clock dsp; -} __packed; +}; struct tnetd7200_clock { volatile u32 ctrl; @@ -83,13 +83,13 @@ struct tnetd7200_clock { volatile u32 status; volatile u32 cmden; u32 padding[15]; -} __packed; +}; struct tnetd7200_clocks { struct tnetd7200_clock cpu; struct tnetd7200_clock dsp; struct tnetd7200_clock usb; -} __packed; +}; int ar7_cpu_clock = 150000000; EXPORT_SYMBOL(ar7_cpu_clock); diff --git a/target/linux/ar7/files/arch/mips/ar7/gpio.c b/target/linux/ar7/files/arch/mips/ar7/gpio.c index a04981a6c02..207d270934f 100644 --- a/target/linux/ar7/files/arch/mips/ar7/gpio.c +++ b/target/linux/ar7/files/arch/mips/ar7/gpio.c @@ -21,7 +21,7 @@ #include -static const char *ar7_gpio_list[AR7_GPIO_MAX] = { 0, }; +static const char *ar7_gpio_list[AR7_GPIO_MAX]; int gpio_request(unsigned gpio, const char *label) { diff --git a/target/linux/ar7/files/drivers/vlynq/vlynq.c b/target/linux/ar7/files/drivers/vlynq/vlynq.c index 879ed0d14c7..3358bb711a2 100644 --- a/target/linux/ar7/files/drivers/vlynq/vlynq.c +++ b/target/linux/ar7/files/drivers/vlynq/vlynq.c @@ -68,7 +68,7 @@ struct vlynq_regs { u32 autonego; u32 unused[6]; u32 int_device[8]; -} __attribute__ ((packed)); +}; #define vlynq_reg_read(reg) readl(&(reg)) #define vlynq_reg_write(reg, val) writel(val, &(reg))