From: Matt Carlson <mcarlson@broadcom.com>
Date: Fri, 15 Aug 2008 21:07:24 +0000 (-0700)
Subject: tg3: Add APE register access locking
X-Git-Url: http://git.lede-project.org./?a=commitdiff_plain;h=77b483f132ba25edf4ef455dd87a91ab7bbf4170;p=openwrt%2Fstaging%2Fblogic.git

tg3: Add APE register access locking

If the driver resets the chip while the APE is performing a register
access, that register access will never complete and the APE will hang
indefinitely.  To prevent this race condition, the driver must acquire
an APE mutex before resetting the chip.  The APE will not attempt a
register access until it acquires this lock.

Signed-off-by: Matt Carlson <mcarlson@broadcom.com>
Signed-off-by: Michael Chan <mchan@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
---

diff --git a/drivers/net/tg3.c b/drivers/net/tg3.c
index d2439b85a790..e3fd74b871a3 100644
--- a/drivers/net/tg3.c
+++ b/drivers/net/tg3.c
@@ -536,6 +536,7 @@ static int tg3_ape_lock(struct tg3 *tp, int locknum)
 		return 0;
 
 	switch (locknum) {
+		case TG3_APE_LOCK_GRC:
 		case TG3_APE_LOCK_MEM:
 			break;
 		default:
@@ -573,6 +574,7 @@ static void tg3_ape_unlock(struct tg3 *tp, int locknum)
 		return;
 
 	switch (locknum) {
+		case TG3_APE_LOCK_GRC:
 		case TG3_APE_LOCK_MEM:
 			break;
 		default:
@@ -5760,6 +5762,8 @@ static int tg3_chip_reset(struct tg3 *tp)
 
 	tg3_mdio_stop(tp);
 
+	tg3_ape_lock(tp, TG3_APE_LOCK_GRC);
+
 	/* No matching tg3_nvram_unlock() after this because
 	 * chip reset below will undo the nvram lock.
 	 */
@@ -5914,6 +5918,8 @@ static int tg3_chip_reset(struct tg3 *tp)
 
 	tg3_mdio_start(tp);
 
+	tg3_ape_unlock(tp, TG3_APE_LOCK_GRC);
+
 	err = tg3_poll_fw(tp);
 	if (err)
 		return err;
diff --git a/drivers/net/tg3.h b/drivers/net/tg3.h
index df07842172b7..dd1af508023a 100644
--- a/drivers/net/tg3.h
+++ b/drivers/net/tg3.h
@@ -1889,6 +1889,7 @@
 #define  APE_EVENT_STATUS_EVENT_PENDING	 0x80000000
 
 /* APE convenience enumerations. */
+#define TG3_APE_LOCK_GRC                1
 #define TG3_APE_LOCK_MEM                4
 
 #define TG3_EEPROM_SB_F1R2_MBA_OFF	0x10