From: Mathias Kresin <dev@kresin.me>
Date: Thu, 1 Nov 2018 22:11:40 +0000 (+0100)
Subject: ramips: add Sanlinking Technologies D240 pinmux quirk
X-Git-Tag: v19.07.0-rc1~2085
X-Git-Url: http://git.lede-project.org./?a=commitdiff_plain;h=71ba834cf1a1c8fcbf345b7efa75de0dcba9db20;p=openwrt%2Fstaging%2Fpepe2k.git

ramips: add Sanlinking Technologies D240 pinmux quirk

The sd function of the nd_sd group configures two of the groups pins as
gpios. The pins are used as PCIe reset/power.

Due to the driver load order, the pins are configured way to late if
triggered by the sd-card driver.

To not introduce another kind of driver load order dependency and
configure the pins as early as possible, means during pinmux driver
load.

Signed-off-by: Mathias Kresin <dev@kresin.me>
---

diff --git a/target/linux/ramips/dts/D240.dts b/target/linux/ramips/dts/D240.dts
index 134ebdda55..576f3caf30 100644
--- a/target/linux/ramips/dts/D240.dts
+++ b/target/linux/ramips/dts/D240.dts
@@ -156,6 +156,8 @@
 
 &sdhci {
 	status = "okay";
+	/* the pins function is already set during pinmux driver load */
+	/delete-property/ pinctrl-0;
 };
 
 &ehci {
@@ -181,6 +183,20 @@
 			ralink,group = "i2c", "uartf", "wled", "spi refclk", "pa";
 			ralink,function = "gpio";
 		};
+
+		/*
+		 * The sd function of the nd_sd group configures two of the
+		 * groups pins as gpios. The pins are used as PCIe reset/power.
+		 * Due to the driver load order, the pins are configured way to
+		 * late if triggered by the sd-card driver.
+		 * To not introduce another kind of driver load order
+		 * dependency and configure the pins as early as possible,
+		 * means during pinmux driver load.
+		 */
+		gpio_sd {
+			ralink,group = "nd_sd";
+			ralink,function = "sd";
+		};
 	};
 };