From: Josh Boyer Date: Thu, 15 May 2008 14:41:23 +0000 (+1000) Subject: [POWERPC] 4xx: Fix PCI mem in rainier DTS X-Git-Url: http://git.lede-project.org./?a=commitdiff_plain;h=6f031101f5c6bb44762911909da575127f676eb8;p=openwrt%2Fstaging%2Fblogic.git [POWERPC] 4xx: Fix PCI mem in rainier DTS This fixes the PCI node in the Rainier to match the spec from AMCC. A similar fix was done for 440EPx, which shares the same values as 440GRx. Signed-off-by: Josh Boyer --- diff --git a/arch/powerpc/boot/dts/rainier.dts b/arch/powerpc/boot/dts/rainier.dts index 2cd87f66f81f..2afb63a42ea9 100644 --- a/arch/powerpc/boot/dts/rainier.dts +++ b/arch/powerpc/boot/dts/rainier.dts @@ -330,8 +330,9 @@ * later cannot be changed. Chip supports a second * IO range but we don't use it for now */ - ranges = <0x02000000 0x00000000 0x80000000 0x00000001 0x80000000 0x00000000 0x10000000 - 0x01000000 0x00000000 0x00000000 0x00000001 0xe8000000 0x00000000 0x00100000>; + ranges = <0x02000000 0x0 0x80000000 0x1 0x80000000 0x0 0x40000000 + 0x01000000 0x0 0x00000000 0x1 0xe8000000 0x0 0x00010000 + 0x01000000 0x0 0x00000000 0x1 0xe8800000 0x0 0x03800000>; /* Inbound 2GB range starting at 0 */ dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x0 0x80000000>;