From: Matt Carlson Date: Mon, 2 Aug 2010 11:25:55 +0000 (+0000) Subject: tg3: Add 5784 ASIC rev to earlier PCIe MPS fix X-Git-Url: http://git.lede-project.org./?a=commitdiff_plain;h=6de34cb963a934953fdd365937b4b75959256602;p=openwrt%2Fstaging%2Fblogic.git tg3: Add 5784 ASIC rev to earlier PCIe MPS fix tg3 commit e7126997342560533317d8467e8516119ebcbd21 entitled "tg3: Preserve PCIe MPS setting for new devs" attempted to ensure the PCIe link negotiated Maximum Payload Size (MPS) setting was 128 bytes for all devices that didn't support higher speeds. The 5784 device was mistakenly added to this list when it shouldn't have. This patch removes the 5784 ASIC rev devices from that list. Reviewed-by: Benjamin Li Reviewed-by: Michael Chan Signed-off-by: Matt Carlson Signed-off-by: David S. Miller --- diff --git a/drivers/net/tg3.c b/drivers/net/tg3.c index b26a57782939..98ca0d20d206 100644 --- a/drivers/net/tg3.c +++ b/drivers/net/tg3.c @@ -7002,8 +7002,7 @@ static int tg3_chip_reset(struct tg3 *tp) * Older PCIe devices only support the 128 byte * MPS setting. Enforce the restriction. */ - if (!(tp->tg3_flags & TG3_FLAG_CPMU_PRESENT) || - (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5784)) + if (!(tp->tg3_flags & TG3_FLAG_CPMU_PRESENT)) val16 &= ~PCI_EXP_DEVCTL_PAYLOAD; pci_write_config_word(tp->pdev, tp->pcie_cap + PCI_EXP_DEVCTL,