From: Felix Fietkau Date: Fri, 13 Mar 2015 03:01:37 +0000 (+0000) Subject: atheros: v3.18: move GPIO patches behind PCI X-Git-Url: http://git.lede-project.org./?a=commitdiff_plain;h=6d29a8bc64830d3f0c26eafe47880f84aeb425e8;p=openwrt%2Fstaging%2Fluka.git atheros: v3.18: move GPIO patches behind PCI Move GPIO patches behind PCI patch, since they are not yet merged upstream. Signed-off-by: Sergey Ryazanov SVN-Revision: 44728 --- diff --git a/target/linux/atheros/patches-3.18/102-ar5312_gpio.patch b/target/linux/atheros/patches-3.18/102-ar5312_gpio.patch deleted file mode 100644 index 56ac81ee40..0000000000 --- a/target/linux/atheros/patches-3.18/102-ar5312_gpio.patch +++ /dev/null @@ -1,194 +0,0 @@ ---- a/arch/mips/ath25/Kconfig -+++ b/arch/mips/ath25/Kconfig -@@ -1,6 +1,7 @@ - config SOC_AR5312 - bool "Atheros 5312/2312+ support" - depends on ATH25 -+ select GPIO_AR5312 - default y - - config SOC_AR2315 ---- a/arch/mips/ath25/ar5312.c -+++ b/arch/mips/ath25/ar5312.c -@@ -221,6 +221,22 @@ static struct platform_device ar5312_phy - .num_resources = 1, - }; - -+static struct resource ar5312_gpio_res[] = { -+ { -+ .name = "ar5312-gpio", -+ .flags = IORESOURCE_MEM, -+ .start = AR5312_GPIO_BASE, -+ .end = AR5312_GPIO_BASE + AR5312_GPIO_SIZE - 1, -+ }, -+}; -+ -+static struct platform_device ar5312_gpio = { -+ .name = "ar5312-gpio", -+ .id = -1, -+ .resource = ar5312_gpio_res, -+ .num_resources = ARRAY_SIZE(ar5312_gpio_res), -+}; -+ - #ifdef CONFIG_LEDS_GPIO - static struct gpio_led ar5312_leds[] = { - { .name = "wlan", .gpio = 0, .active_low = 1, }, -@@ -306,6 +322,8 @@ void __init ar5312_init_devices(void) - - platform_device_register(&ar5312_physmap_flash); - -+ platform_device_register(&ar5312_gpio); -+ - #ifdef CONFIG_LEDS_GPIO - ar5312_leds[0].gpio = config->sys_led_gpio; - platform_device_register(&ar5312_gpio_leds); ---- a/drivers/gpio/Kconfig -+++ b/drivers/gpio/Kconfig -@@ -112,6 +112,13 @@ config GPIO_MAX730X - - comment "Memory mapped GPIO drivers:" - -+config GPIO_AR5312 -+ bool "AR5312 SoC GPIO support" -+ default y if SOC_AR5312 -+ depends on SOC_AR5312 -+ help -+ Say yes here to enable GPIO support for Atheros AR5312/AR2312+ SoCs. -+ - config GPIO_CLPS711X - tristate "CLPS711X GPIO support" - depends on ARCH_CLPS711X || COMPILE_TEST ---- a/drivers/gpio/Makefile -+++ b/drivers/gpio/Makefile -@@ -17,6 +17,7 @@ obj-$(CONFIG_GPIO_ADNP) += gpio-adnp.o - obj-$(CONFIG_GPIO_ADP5520) += gpio-adp5520.o - obj-$(CONFIG_GPIO_ADP5588) += gpio-adp5588.o - obj-$(CONFIG_GPIO_AMD8111) += gpio-amd8111.o -+obj-$(CONFIG_GPIO_AR5312) += gpio-ar5312.o - obj-$(CONFIG_GPIO_ARIZONA) += gpio-arizona.o - obj-$(CONFIG_GPIO_BCM_KONA) += gpio-bcm-kona.o - obj-$(CONFIG_GPIO_BT8XX) += gpio-bt8xx.o ---- /dev/null -+++ b/drivers/gpio/gpio-ar5312.c -@@ -0,0 +1,121 @@ -+/* -+ * This file is subject to the terms and conditions of the GNU General Public -+ * License. See the file "COPYING" in the main directory of this archive -+ * for more details. -+ * -+ * Copyright (C) 2003 Atheros Communications, Inc., All Rights Reserved. -+ * Copyright (C) 2006 FON Technology, SL. -+ * Copyright (C) 2006 Imre Kaloz -+ * Copyright (C) 2006-2009 Felix Fietkau -+ * Copyright (C) 2012 Alexandros C. Couloumbis -+ */ -+ -+#include -+#include -+#include -+#include -+ -+#define DRIVER_NAME "ar5312-gpio" -+ -+#define AR5312_GPIO_DO 0x00 /* output register */ -+#define AR5312_GPIO_DI 0x04 /* intput register */ -+#define AR5312_GPIO_CR 0x08 /* control register */ -+ -+#define AR5312_GPIO_CR_M(x) (1 << (x)) /* mask for i/o */ -+#define AR5312_GPIO_CR_O(x) (0 << (x)) /* mask for output */ -+#define AR5312_GPIO_CR_I(x) (1 << (x)) /* mask for input */ -+#define AR5312_GPIO_CR_INT(x) (1 << ((x)+8)) /* mask for interrupt */ -+#define AR5312_GPIO_CR_UART(x) (1 << ((x)+16)) /* uart multiplex */ -+ -+#define AR5312_GPIO_NUM 8 -+ -+static void __iomem *ar5312_mem; -+ -+static inline u32 ar5312_gpio_reg_read(unsigned reg) -+{ -+ return __raw_readl(ar5312_mem + reg); -+} -+ -+static inline void ar5312_gpio_reg_write(unsigned reg, u32 val) -+{ -+ __raw_writel(val, ar5312_mem + reg); -+} -+ -+static inline void ar5312_gpio_reg_mask(unsigned reg, u32 mask, u32 val) -+{ -+ ar5312_gpio_reg_write(reg, (ar5312_gpio_reg_read(reg) & ~mask) | val); -+} -+ -+static int ar5312_gpio_get_val(struct gpio_chip *chip, unsigned gpio) -+{ -+ return (ar5312_gpio_reg_read(AR5312_GPIO_DI) >> gpio) & 1; -+} -+ -+static void ar5312_gpio_set_val(struct gpio_chip *chip, unsigned gpio, int val) -+{ -+ u32 reg = ar5312_gpio_reg_read(AR5312_GPIO_DO); -+ -+ reg = val ? reg | (1 << gpio) : reg & ~(1 << gpio); -+ ar5312_gpio_reg_write(AR5312_GPIO_DO, reg); -+} -+ -+static int ar5312_gpio_dir_in(struct gpio_chip *chip, unsigned gpio) -+{ -+ ar5312_gpio_reg_mask(AR5312_GPIO_CR, 0, 1 << gpio); -+ return 0; -+} -+ -+static int ar5312_gpio_dir_out(struct gpio_chip *chip, unsigned gpio, int val) -+{ -+ ar5312_gpio_reg_mask(AR5312_GPIO_CR, 1 << gpio, 0); -+ ar5312_gpio_set_val(chip, gpio, val); -+ return 0; -+} -+ -+static struct gpio_chip ar5312_gpio_chip = { -+ .label = DRIVER_NAME, -+ .direction_input = ar5312_gpio_dir_in, -+ .direction_output = ar5312_gpio_dir_out, -+ .set = ar5312_gpio_set_val, -+ .get = ar5312_gpio_get_val, -+ .base = 0, -+ .ngpio = AR5312_GPIO_NUM, -+}; -+ -+static int ar5312_gpio_probe(struct platform_device *pdev) -+{ -+ struct device *dev = &pdev->dev; -+ struct resource *res; -+ int ret; -+ -+ if (ar5312_mem) -+ return -EBUSY; -+ -+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0); -+ ar5312_mem = devm_ioremap_resource(dev, res); -+ if (IS_ERR(ar5312_mem)) -+ return PTR_ERR(ar5312_mem); -+ -+ ar5312_gpio_chip.dev = dev; -+ ret = gpiochip_add(&ar5312_gpio_chip); -+ if (ret) { -+ dev_err(dev, "failed to add gpiochip\n"); -+ return ret; -+ } -+ -+ return 0; -+} -+ -+static struct platform_driver ar5312_gpio_driver = { -+ .probe = ar5312_gpio_probe, -+ .driver = { -+ .name = DRIVER_NAME, -+ .owner = THIS_MODULE, -+ } -+}; -+ -+static int __init ar5312_gpio_init(void) -+{ -+ return platform_driver_register(&ar5312_gpio_driver); -+} -+subsys_initcall(ar5312_gpio_init); diff --git a/target/linux/atheros/patches-3.18/103-ar2315_gpio.patch b/target/linux/atheros/patches-3.18/103-ar2315_gpio.patch deleted file mode 100644 index 4b8117151d..0000000000 --- a/target/linux/atheros/patches-3.18/103-ar2315_gpio.patch +++ /dev/null @@ -1,317 +0,0 @@ ---- a/arch/mips/ath25/Kconfig -+++ b/arch/mips/ath25/Kconfig -@@ -7,4 +7,5 @@ config SOC_AR5312 - config SOC_AR2315 - bool "Atheros 2315+ support" - depends on ATH25 -+ select GPIO_AR2315 - default y ---- a/arch/mips/ath25/ar2315.c -+++ b/arch/mips/ath25/ar2315.c -@@ -236,6 +236,32 @@ static struct platform_device ar2315_wdt - .num_resources = ARRAY_SIZE(ar2315_wdt_res) - }; - -+static struct resource ar2315_gpio_res[] = { -+ { -+ .name = "ar2315-gpio", -+ .flags = IORESOURCE_MEM, -+ .start = AR2315_RST_BASE + AR2315_GPIO, -+ .end = AR2315_RST_BASE + AR2315_GPIO + 0x10 - 1, -+ }, -+ { -+ .name = "ar2315-gpio", -+ .flags = IORESOURCE_IRQ, -+ }, -+ { -+ .name = "ar2315-gpio-irq-base", -+ .flags = IORESOURCE_IRQ, -+ .start = AR231X_GPIO_IRQ_BASE, -+ .end = AR231X_GPIO_IRQ_BASE, -+ } -+}; -+ -+static struct platform_device ar2315_gpio = { -+ .id = -1, -+ .name = "ar2315-gpio", -+ .resource = ar2315_gpio_res, -+ .num_resources = ARRAY_SIZE(ar2315_gpio_res) -+}; -+ - #ifdef CONFIG_LEDS_GPIO - static struct gpio_led ar2315_leds[6]; - static struct gpio_led_platform_data ar2315_led_data = { -@@ -286,6 +312,11 @@ void __init ar2315_init_devices(void) - ath25_find_config(AR2315_SPI_READ_BASE, AR2315_SPI_READ_SIZE); - ar2315_eth_data.macaddr = ath25_board.config->enet0_mac; - -+ ar2315_gpio_res[1].start = irq_create_mapping(ar2315_misc_irq_domain, -+ AR2315_MISC_IRQ_GPIO); -+ ar2315_gpio_res[1].end = ar2315_gpio_res[1].start; -+ platform_device_register(&ar2315_gpio); -+ - ar2315_init_gpio_leds(); - - ar2315_wdt_res[1].start = irq_create_mapping(ar2315_misc_irq_domain, ---- a/drivers/gpio/Kconfig -+++ b/drivers/gpio/Kconfig -@@ -112,6 +112,13 @@ config GPIO_MAX730X - - comment "Memory mapped GPIO drivers:" - -+config GPIO_AR2315 -+ bool "AR2315 SoC GPIO support" -+ default y if SOC_AR2315 -+ depends on SOC_AR2315 -+ help -+ Say yes here to enable GPIO support for Atheros AR2315+ SoCs. -+ - config GPIO_AR5312 - bool "AR5312 SoC GPIO support" - default y if SOC_AR5312 ---- a/drivers/gpio/Makefile -+++ b/drivers/gpio/Makefile -@@ -17,6 +17,7 @@ obj-$(CONFIG_GPIO_ADNP) += gpio-adnp.o - obj-$(CONFIG_GPIO_ADP5520) += gpio-adp5520.o - obj-$(CONFIG_GPIO_ADP5588) += gpio-adp5588.o - obj-$(CONFIG_GPIO_AMD8111) += gpio-amd8111.o -+obj-$(CONFIG_GPIO_AR2315) += gpio-ar2315.o - obj-$(CONFIG_GPIO_AR5312) += gpio-ar5312.o - obj-$(CONFIG_GPIO_ARIZONA) += gpio-arizona.o - obj-$(CONFIG_GPIO_BCM_KONA) += gpio-bcm-kona.o ---- /dev/null -+++ b/drivers/gpio/gpio-ar2315.c -@@ -0,0 +1,233 @@ -+/* -+ * This file is subject to the terms and conditions of the GNU General Public -+ * License. See the file "COPYING" in the main directory of this archive -+ * for more details. -+ * -+ * Copyright (C) 2003 Atheros Communications, Inc., All Rights Reserved. -+ * Copyright (C) 2006 FON Technology, SL. -+ * Copyright (C) 2006 Imre Kaloz -+ * Copyright (C) 2006 Felix Fietkau -+ * Copyright (C) 2012 Alexandros C. Couloumbis -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+ -+#define DRIVER_NAME "ar2315-gpio" -+ -+#define AR2315_GPIO_DI 0x0000 -+#define AR2315_GPIO_DO 0x0008 -+#define AR2315_GPIO_DIR 0x0010 -+#define AR2315_GPIO_INT 0x0018 -+ -+#define AR2315_GPIO_DIR_M(x) (1 << (x)) /* mask for i/o */ -+#define AR2315_GPIO_DIR_O(x) (1 << (x)) /* output */ -+#define AR2315_GPIO_DIR_I(x) (0) /* input */ -+ -+#define AR2315_GPIO_INT_NUM_M 0x3F /* mask for GPIO num */ -+#define AR2315_GPIO_INT_TRIG(x) ((x) << 6) /* interrupt trigger */ -+#define AR2315_GPIO_INT_TRIG_M (0x3 << 6) /* mask for int trig */ -+ -+#define AR2315_GPIO_INT_TRIG_OFF 0 /* Triggerring off */ -+#define AR2315_GPIO_INT_TRIG_LOW 1 /* Low Level Triggered */ -+#define AR2315_GPIO_INT_TRIG_HIGH 2 /* High Level Triggered */ -+#define AR2315_GPIO_INT_TRIG_EDGE 3 /* Edge Triggered */ -+ -+#define AR2315_GPIO_NUM 22 -+ -+static u32 ar2315_gpio_intmask; -+static u32 ar2315_gpio_intval; -+static unsigned ar2315_gpio_irq_base; -+static void __iomem *ar2315_mem; -+ -+static inline u32 ar2315_gpio_reg_read(unsigned reg) -+{ -+ return __raw_readl(ar2315_mem + reg); -+} -+ -+static inline void ar2315_gpio_reg_write(unsigned reg, u32 val) -+{ -+ __raw_writel(val, ar2315_mem + reg); -+} -+ -+static inline void ar2315_gpio_reg_mask(unsigned reg, u32 mask, u32 val) -+{ -+ ar2315_gpio_reg_write(reg, (ar2315_gpio_reg_read(reg) & ~mask) | val); -+} -+ -+static void ar2315_gpio_irq_handler(unsigned irq, struct irq_desc *desc) -+{ -+ u32 pend; -+ int bit = -1; -+ -+ /* only do one gpio interrupt at a time */ -+ pend = ar2315_gpio_reg_read(AR2315_GPIO_DI); -+ pend ^= ar2315_gpio_intval; -+ pend &= ar2315_gpio_intmask; -+ -+ if (pend) { -+ bit = fls(pend) - 1; -+ pend &= ~(1 << bit); -+ ar2315_gpio_intval ^= (1 << bit); -+ } -+ -+ /* Enable interrupt with edge detection */ -+ if ((ar2315_gpio_reg_read(AR2315_GPIO_DIR) & AR2315_GPIO_DIR_M(bit)) != -+ AR2315_GPIO_DIR_I(bit)) -+ return; -+ -+ if (bit >= 0) -+ generic_handle_irq(ar2315_gpio_irq_base + bit); -+} -+ -+static void ar2315_gpio_int_setup(unsigned gpio, int trig) -+{ -+ u32 reg = ar2315_gpio_reg_read(AR2315_GPIO_INT); -+ -+ reg &= ~(AR2315_GPIO_INT_NUM_M | AR2315_GPIO_INT_TRIG_M); -+ reg |= gpio | AR2315_GPIO_INT_TRIG(trig); -+ ar2315_gpio_reg_write(AR2315_GPIO_INT, reg); -+} -+ -+static void ar2315_gpio_irq_unmask(struct irq_data *d) -+{ -+ unsigned gpio = d->irq - ar2315_gpio_irq_base; -+ u32 dir = ar2315_gpio_reg_read(AR2315_GPIO_DIR); -+ -+ /* Enable interrupt with edge detection */ -+ if ((dir & AR2315_GPIO_DIR_M(gpio)) != AR2315_GPIO_DIR_I(gpio)) -+ return; -+ -+ ar2315_gpio_intmask |= (1 << gpio); -+ ar2315_gpio_int_setup(gpio, AR2315_GPIO_INT_TRIG_EDGE); -+} -+ -+static void ar2315_gpio_irq_mask(struct irq_data *d) -+{ -+ unsigned gpio = d->irq - ar2315_gpio_irq_base; -+ -+ /* Disable interrupt */ -+ ar2315_gpio_intmask &= ~(1 << gpio); -+ ar2315_gpio_int_setup(gpio, AR2315_GPIO_INT_TRIG_OFF); -+} -+ -+static struct irq_chip ar2315_gpio_irq_chip = { -+ .name = DRIVER_NAME, -+ .irq_unmask = ar2315_gpio_irq_unmask, -+ .irq_mask = ar2315_gpio_irq_mask, -+}; -+ -+static void ar2315_gpio_irq_init(unsigned irq) -+{ -+ unsigned i; -+ -+ ar2315_gpio_intval = ar2315_gpio_reg_read(AR2315_GPIO_DI); -+ for (i = 0; i < AR2315_GPIO_NUM; i++) { -+ unsigned _irq = ar2315_gpio_irq_base + i; -+ -+ irq_set_chip_and_handler(_irq, &ar2315_gpio_irq_chip, -+ handle_level_irq); -+ } -+ irq_set_chained_handler(irq, ar2315_gpio_irq_handler); -+} -+ -+static int ar2315_gpio_get_val(struct gpio_chip *chip, unsigned gpio) -+{ -+ return (ar2315_gpio_reg_read(AR2315_GPIO_DI) >> gpio) & 1; -+} -+ -+static void ar2315_gpio_set_val(struct gpio_chip *chip, unsigned gpio, int val) -+{ -+ u32 reg = ar2315_gpio_reg_read(AR2315_GPIO_DO); -+ -+ reg = val ? reg | (1 << gpio) : reg & ~(1 << gpio); -+ ar2315_gpio_reg_write(AR2315_GPIO_DO, reg); -+} -+ -+static int ar2315_gpio_dir_in(struct gpio_chip *chip, unsigned gpio) -+{ -+ ar2315_gpio_reg_mask(AR2315_GPIO_DIR, 1 << gpio, 0); -+ return 0; -+} -+ -+static int ar2315_gpio_dir_out(struct gpio_chip *chip, unsigned gpio, int val) -+{ -+ ar2315_gpio_reg_mask(AR2315_GPIO_DIR, 0, 1 << gpio); -+ ar2315_gpio_set_val(chip, gpio, val); -+ return 0; -+} -+ -+static int ar2315_gpio_to_irq(struct gpio_chip *chip, unsigned gpio) -+{ -+ return ar2315_gpio_irq_base + gpio; -+} -+ -+static struct gpio_chip ar2315_gpio_chip = { -+ .label = DRIVER_NAME, -+ .direction_input = ar2315_gpio_dir_in, -+ .direction_output = ar2315_gpio_dir_out, -+ .set = ar2315_gpio_set_val, -+ .get = ar2315_gpio_get_val, -+ .to_irq = ar2315_gpio_to_irq, -+ .base = 0, -+ .ngpio = AR2315_GPIO_NUM, -+}; -+ -+static int ar2315_gpio_probe(struct platform_device *pdev) -+{ -+ struct device *dev = &pdev->dev; -+ struct resource *res; -+ unsigned irq; -+ int ret; -+ -+ if (ar2315_mem) -+ return -EBUSY; -+ -+ res = platform_get_resource_byname(pdev, IORESOURCE_IRQ, -+ "ar2315-gpio-irq-base"); -+ if (!res) { -+ dev_err(dev, "not found GPIO IRQ base\n"); -+ return -ENXIO; -+ } -+ ar2315_gpio_irq_base = res->start; -+ -+ res = platform_get_resource_byname(pdev, IORESOURCE_IRQ, DRIVER_NAME); -+ if (!res) { -+ dev_err(dev, "not found IRQ number\n"); -+ return -ENXIO; -+ } -+ irq = res->start; -+ -+ res = platform_get_resource_byname(pdev, IORESOURCE_MEM, DRIVER_NAME); -+ ar2315_mem = devm_ioremap_resource(dev, res); -+ if (IS_ERR(ar2315_mem)) -+ return PTR_ERR(ar2315_mem); -+ -+ ar2315_gpio_chip.dev = dev; -+ ret = gpiochip_add(&ar2315_gpio_chip); -+ if (ret) { -+ dev_err(dev, "failed to add gpiochip\n"); -+ return ret; -+ } -+ -+ ar2315_gpio_irq_init(irq); -+ -+ return 0; -+} -+ -+static struct platform_driver ar2315_gpio_driver = { -+ .probe = ar2315_gpio_probe, -+ .driver = { -+ .name = DRIVER_NAME, -+ .owner = THIS_MODULE, -+ } -+}; -+ -+static int __init ar2315_gpio_init(void) -+{ -+ return platform_driver_register(&ar2315_gpio_driver); -+} -+subsys_initcall(ar2315_gpio_init); diff --git a/target/linux/atheros/patches-3.18/105-ar2315_pci.patch b/target/linux/atheros/patches-3.18/105-ar2315_pci.patch index 4de4f3ab8b..8e3dfa1349 100644 --- a/target/linux/atheros/patches-3.18/105-ar2315_pci.patch +++ b/target/linux/atheros/patches-3.18/105-ar2315_pci.patch @@ -524,9 +524,9 @@ +} --- a/arch/mips/ath25/Kconfig +++ b/arch/mips/ath25/Kconfig -@@ -9,3 +9,10 @@ config SOC_AR2315 +@@ -7,3 +7,10 @@ config SOC_AR2315 + bool "Atheros 2315+ support" depends on ATH25 - select GPIO_AR2315 default y + +config PCI_AR2315 @@ -548,7 +548,7 @@ else if (pending & CAUSEF_IP2) do_IRQ(AR2315_IRQ_MISC); else if (pending & CAUSEF_IP7) -@@ -460,10 +464,62 @@ void __init ar2315_plat_mem_setup(void) +@@ -429,10 +433,62 @@ void __init ar2315_plat_mem_setup(void) _machine_restart = ar2315_restart; } diff --git a/target/linux/atheros/patches-3.18/107-ar5312_gpio.patch b/target/linux/atheros/patches-3.18/107-ar5312_gpio.patch new file mode 100644 index 0000000000..56ac81ee40 --- /dev/null +++ b/target/linux/atheros/patches-3.18/107-ar5312_gpio.patch @@ -0,0 +1,194 @@ +--- a/arch/mips/ath25/Kconfig ++++ b/arch/mips/ath25/Kconfig +@@ -1,6 +1,7 @@ + config SOC_AR5312 + bool "Atheros 5312/2312+ support" + depends on ATH25 ++ select GPIO_AR5312 + default y + + config SOC_AR2315 +--- a/arch/mips/ath25/ar5312.c ++++ b/arch/mips/ath25/ar5312.c +@@ -221,6 +221,22 @@ static struct platform_device ar5312_phy + .num_resources = 1, + }; + ++static struct resource ar5312_gpio_res[] = { ++ { ++ .name = "ar5312-gpio", ++ .flags = IORESOURCE_MEM, ++ .start = AR5312_GPIO_BASE, ++ .end = AR5312_GPIO_BASE + AR5312_GPIO_SIZE - 1, ++ }, ++}; ++ ++static struct platform_device ar5312_gpio = { ++ .name = "ar5312-gpio", ++ .id = -1, ++ .resource = ar5312_gpio_res, ++ .num_resources = ARRAY_SIZE(ar5312_gpio_res), ++}; ++ + #ifdef CONFIG_LEDS_GPIO + static struct gpio_led ar5312_leds[] = { + { .name = "wlan", .gpio = 0, .active_low = 1, }, +@@ -306,6 +322,8 @@ void __init ar5312_init_devices(void) + + platform_device_register(&ar5312_physmap_flash); + ++ platform_device_register(&ar5312_gpio); ++ + #ifdef CONFIG_LEDS_GPIO + ar5312_leds[0].gpio = config->sys_led_gpio; + platform_device_register(&ar5312_gpio_leds); +--- a/drivers/gpio/Kconfig ++++ b/drivers/gpio/Kconfig +@@ -112,6 +112,13 @@ config GPIO_MAX730X + + comment "Memory mapped GPIO drivers:" + ++config GPIO_AR5312 ++ bool "AR5312 SoC GPIO support" ++ default y if SOC_AR5312 ++ depends on SOC_AR5312 ++ help ++ Say yes here to enable GPIO support for Atheros AR5312/AR2312+ SoCs. ++ + config GPIO_CLPS711X + tristate "CLPS711X GPIO support" + depends on ARCH_CLPS711X || COMPILE_TEST +--- a/drivers/gpio/Makefile ++++ b/drivers/gpio/Makefile +@@ -17,6 +17,7 @@ obj-$(CONFIG_GPIO_ADNP) += gpio-adnp.o + obj-$(CONFIG_GPIO_ADP5520) += gpio-adp5520.o + obj-$(CONFIG_GPIO_ADP5588) += gpio-adp5588.o + obj-$(CONFIG_GPIO_AMD8111) += gpio-amd8111.o ++obj-$(CONFIG_GPIO_AR5312) += gpio-ar5312.o + obj-$(CONFIG_GPIO_ARIZONA) += gpio-arizona.o + obj-$(CONFIG_GPIO_BCM_KONA) += gpio-bcm-kona.o + obj-$(CONFIG_GPIO_BT8XX) += gpio-bt8xx.o +--- /dev/null ++++ b/drivers/gpio/gpio-ar5312.c +@@ -0,0 +1,121 @@ ++/* ++ * This file is subject to the terms and conditions of the GNU General Public ++ * License. See the file "COPYING" in the main directory of this archive ++ * for more details. ++ * ++ * Copyright (C) 2003 Atheros Communications, Inc., All Rights Reserved. ++ * Copyright (C) 2006 FON Technology, SL. ++ * Copyright (C) 2006 Imre Kaloz ++ * Copyright (C) 2006-2009 Felix Fietkau ++ * Copyright (C) 2012 Alexandros C. Couloumbis ++ */ ++ ++#include ++#include ++#include ++#include ++ ++#define DRIVER_NAME "ar5312-gpio" ++ ++#define AR5312_GPIO_DO 0x00 /* output register */ ++#define AR5312_GPIO_DI 0x04 /* intput register */ ++#define AR5312_GPIO_CR 0x08 /* control register */ ++ ++#define AR5312_GPIO_CR_M(x) (1 << (x)) /* mask for i/o */ ++#define AR5312_GPIO_CR_O(x) (0 << (x)) /* mask for output */ ++#define AR5312_GPIO_CR_I(x) (1 << (x)) /* mask for input */ ++#define AR5312_GPIO_CR_INT(x) (1 << ((x)+8)) /* mask for interrupt */ ++#define AR5312_GPIO_CR_UART(x) (1 << ((x)+16)) /* uart multiplex */ ++ ++#define AR5312_GPIO_NUM 8 ++ ++static void __iomem *ar5312_mem; ++ ++static inline u32 ar5312_gpio_reg_read(unsigned reg) ++{ ++ return __raw_readl(ar5312_mem + reg); ++} ++ ++static inline void ar5312_gpio_reg_write(unsigned reg, u32 val) ++{ ++ __raw_writel(val, ar5312_mem + reg); ++} ++ ++static inline void ar5312_gpio_reg_mask(unsigned reg, u32 mask, u32 val) ++{ ++ ar5312_gpio_reg_write(reg, (ar5312_gpio_reg_read(reg) & ~mask) | val); ++} ++ ++static int ar5312_gpio_get_val(struct gpio_chip *chip, unsigned gpio) ++{ ++ return (ar5312_gpio_reg_read(AR5312_GPIO_DI) >> gpio) & 1; ++} ++ ++static void ar5312_gpio_set_val(struct gpio_chip *chip, unsigned gpio, int val) ++{ ++ u32 reg = ar5312_gpio_reg_read(AR5312_GPIO_DO); ++ ++ reg = val ? reg | (1 << gpio) : reg & ~(1 << gpio); ++ ar5312_gpio_reg_write(AR5312_GPIO_DO, reg); ++} ++ ++static int ar5312_gpio_dir_in(struct gpio_chip *chip, unsigned gpio) ++{ ++ ar5312_gpio_reg_mask(AR5312_GPIO_CR, 0, 1 << gpio); ++ return 0; ++} ++ ++static int ar5312_gpio_dir_out(struct gpio_chip *chip, unsigned gpio, int val) ++{ ++ ar5312_gpio_reg_mask(AR5312_GPIO_CR, 1 << gpio, 0); ++ ar5312_gpio_set_val(chip, gpio, val); ++ return 0; ++} ++ ++static struct gpio_chip ar5312_gpio_chip = { ++ .label = DRIVER_NAME, ++ .direction_input = ar5312_gpio_dir_in, ++ .direction_output = ar5312_gpio_dir_out, ++ .set = ar5312_gpio_set_val, ++ .get = ar5312_gpio_get_val, ++ .base = 0, ++ .ngpio = AR5312_GPIO_NUM, ++}; ++ ++static int ar5312_gpio_probe(struct platform_device *pdev) ++{ ++ struct device *dev = &pdev->dev; ++ struct resource *res; ++ int ret; ++ ++ if (ar5312_mem) ++ return -EBUSY; ++ ++ res = platform_get_resource(pdev, IORESOURCE_MEM, 0); ++ ar5312_mem = devm_ioremap_resource(dev, res); ++ if (IS_ERR(ar5312_mem)) ++ return PTR_ERR(ar5312_mem); ++ ++ ar5312_gpio_chip.dev = dev; ++ ret = gpiochip_add(&ar5312_gpio_chip); ++ if (ret) { ++ dev_err(dev, "failed to add gpiochip\n"); ++ return ret; ++ } ++ ++ return 0; ++} ++ ++static struct platform_driver ar5312_gpio_driver = { ++ .probe = ar5312_gpio_probe, ++ .driver = { ++ .name = DRIVER_NAME, ++ .owner = THIS_MODULE, ++ } ++}; ++ ++static int __init ar5312_gpio_init(void) ++{ ++ return platform_driver_register(&ar5312_gpio_driver); ++} ++subsys_initcall(ar5312_gpio_init); diff --git a/target/linux/atheros/patches-3.18/108-ar2315_gpio.patch b/target/linux/atheros/patches-3.18/108-ar2315_gpio.patch new file mode 100644 index 0000000000..d85fc15d7e --- /dev/null +++ b/target/linux/atheros/patches-3.18/108-ar2315_gpio.patch @@ -0,0 +1,319 @@ +--- a/arch/mips/ath25/Kconfig ++++ b/arch/mips/ath25/Kconfig +@@ -7,6 +7,7 @@ config SOC_AR5312 + config SOC_AR2315 + bool "Atheros 2315+ support" + depends on ATH25 ++ select GPIO_AR2315 + default y + + config PCI_AR2315 +--- a/arch/mips/ath25/ar2315.c ++++ b/arch/mips/ath25/ar2315.c +@@ -240,6 +240,32 @@ static struct platform_device ar2315_wdt + .num_resources = ARRAY_SIZE(ar2315_wdt_res) + }; + ++static struct resource ar2315_gpio_res[] = { ++ { ++ .name = "ar2315-gpio", ++ .flags = IORESOURCE_MEM, ++ .start = AR2315_RST_BASE + AR2315_GPIO, ++ .end = AR2315_RST_BASE + AR2315_GPIO + 0x10 - 1, ++ }, ++ { ++ .name = "ar2315-gpio", ++ .flags = IORESOURCE_IRQ, ++ }, ++ { ++ .name = "ar2315-gpio-irq-base", ++ .flags = IORESOURCE_IRQ, ++ .start = AR231X_GPIO_IRQ_BASE, ++ .end = AR231X_GPIO_IRQ_BASE, ++ } ++}; ++ ++static struct platform_device ar2315_gpio = { ++ .id = -1, ++ .name = "ar2315-gpio", ++ .resource = ar2315_gpio_res, ++ .num_resources = ARRAY_SIZE(ar2315_gpio_res) ++}; ++ + #ifdef CONFIG_LEDS_GPIO + static struct gpio_led ar2315_leds[6]; + static struct gpio_led_platform_data ar2315_led_data = { +@@ -290,6 +316,11 @@ void __init ar2315_init_devices(void) + ath25_find_config(AR2315_SPI_READ_BASE, AR2315_SPI_READ_SIZE); + ar2315_eth_data.macaddr = ath25_board.config->enet0_mac; + ++ ar2315_gpio_res[1].start = irq_create_mapping(ar2315_misc_irq_domain, ++ AR2315_MISC_IRQ_GPIO); ++ ar2315_gpio_res[1].end = ar2315_gpio_res[1].start; ++ platform_device_register(&ar2315_gpio); ++ + ar2315_init_gpio_leds(); + + ar2315_wdt_res[1].start = irq_create_mapping(ar2315_misc_irq_domain, +--- a/drivers/gpio/Kconfig ++++ b/drivers/gpio/Kconfig +@@ -112,6 +112,13 @@ config GPIO_MAX730X + + comment "Memory mapped GPIO drivers:" + ++config GPIO_AR2315 ++ bool "AR2315 SoC GPIO support" ++ default y if SOC_AR2315 ++ depends on SOC_AR2315 ++ help ++ Say yes here to enable GPIO support for Atheros AR2315+ SoCs. ++ + config GPIO_AR5312 + bool "AR5312 SoC GPIO support" + default y if SOC_AR5312 +--- a/drivers/gpio/Makefile ++++ b/drivers/gpio/Makefile +@@ -17,6 +17,7 @@ obj-$(CONFIG_GPIO_ADNP) += gpio-adnp.o + obj-$(CONFIG_GPIO_ADP5520) += gpio-adp5520.o + obj-$(CONFIG_GPIO_ADP5588) += gpio-adp5588.o + obj-$(CONFIG_GPIO_AMD8111) += gpio-amd8111.o ++obj-$(CONFIG_GPIO_AR2315) += gpio-ar2315.o + obj-$(CONFIG_GPIO_AR5312) += gpio-ar5312.o + obj-$(CONFIG_GPIO_ARIZONA) += gpio-arizona.o + obj-$(CONFIG_GPIO_BCM_KONA) += gpio-bcm-kona.o +--- /dev/null ++++ b/drivers/gpio/gpio-ar2315.c +@@ -0,0 +1,233 @@ ++/* ++ * This file is subject to the terms and conditions of the GNU General Public ++ * License. See the file "COPYING" in the main directory of this archive ++ * for more details. ++ * ++ * Copyright (C) 2003 Atheros Communications, Inc., All Rights Reserved. ++ * Copyright (C) 2006 FON Technology, SL. ++ * Copyright (C) 2006 Imre Kaloz ++ * Copyright (C) 2006 Felix Fietkau ++ * Copyright (C) 2012 Alexandros C. Couloumbis ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++ ++#define DRIVER_NAME "ar2315-gpio" ++ ++#define AR2315_GPIO_DI 0x0000 ++#define AR2315_GPIO_DO 0x0008 ++#define AR2315_GPIO_DIR 0x0010 ++#define AR2315_GPIO_INT 0x0018 ++ ++#define AR2315_GPIO_DIR_M(x) (1 << (x)) /* mask for i/o */ ++#define AR2315_GPIO_DIR_O(x) (1 << (x)) /* output */ ++#define AR2315_GPIO_DIR_I(x) (0) /* input */ ++ ++#define AR2315_GPIO_INT_NUM_M 0x3F /* mask for GPIO num */ ++#define AR2315_GPIO_INT_TRIG(x) ((x) << 6) /* interrupt trigger */ ++#define AR2315_GPIO_INT_TRIG_M (0x3 << 6) /* mask for int trig */ ++ ++#define AR2315_GPIO_INT_TRIG_OFF 0 /* Triggerring off */ ++#define AR2315_GPIO_INT_TRIG_LOW 1 /* Low Level Triggered */ ++#define AR2315_GPIO_INT_TRIG_HIGH 2 /* High Level Triggered */ ++#define AR2315_GPIO_INT_TRIG_EDGE 3 /* Edge Triggered */ ++ ++#define AR2315_GPIO_NUM 22 ++ ++static u32 ar2315_gpio_intmask; ++static u32 ar2315_gpio_intval; ++static unsigned ar2315_gpio_irq_base; ++static void __iomem *ar2315_mem; ++ ++static inline u32 ar2315_gpio_reg_read(unsigned reg) ++{ ++ return __raw_readl(ar2315_mem + reg); ++} ++ ++static inline void ar2315_gpio_reg_write(unsigned reg, u32 val) ++{ ++ __raw_writel(val, ar2315_mem + reg); ++} ++ ++static inline void ar2315_gpio_reg_mask(unsigned reg, u32 mask, u32 val) ++{ ++ ar2315_gpio_reg_write(reg, (ar2315_gpio_reg_read(reg) & ~mask) | val); ++} ++ ++static void ar2315_gpio_irq_handler(unsigned irq, struct irq_desc *desc) ++{ ++ u32 pend; ++ int bit = -1; ++ ++ /* only do one gpio interrupt at a time */ ++ pend = ar2315_gpio_reg_read(AR2315_GPIO_DI); ++ pend ^= ar2315_gpio_intval; ++ pend &= ar2315_gpio_intmask; ++ ++ if (pend) { ++ bit = fls(pend) - 1; ++ pend &= ~(1 << bit); ++ ar2315_gpio_intval ^= (1 << bit); ++ } ++ ++ /* Enable interrupt with edge detection */ ++ if ((ar2315_gpio_reg_read(AR2315_GPIO_DIR) & AR2315_GPIO_DIR_M(bit)) != ++ AR2315_GPIO_DIR_I(bit)) ++ return; ++ ++ if (bit >= 0) ++ generic_handle_irq(ar2315_gpio_irq_base + bit); ++} ++ ++static void ar2315_gpio_int_setup(unsigned gpio, int trig) ++{ ++ u32 reg = ar2315_gpio_reg_read(AR2315_GPIO_INT); ++ ++ reg &= ~(AR2315_GPIO_INT_NUM_M | AR2315_GPIO_INT_TRIG_M); ++ reg |= gpio | AR2315_GPIO_INT_TRIG(trig); ++ ar2315_gpio_reg_write(AR2315_GPIO_INT, reg); ++} ++ ++static void ar2315_gpio_irq_unmask(struct irq_data *d) ++{ ++ unsigned gpio = d->irq - ar2315_gpio_irq_base; ++ u32 dir = ar2315_gpio_reg_read(AR2315_GPIO_DIR); ++ ++ /* Enable interrupt with edge detection */ ++ if ((dir & AR2315_GPIO_DIR_M(gpio)) != AR2315_GPIO_DIR_I(gpio)) ++ return; ++ ++ ar2315_gpio_intmask |= (1 << gpio); ++ ar2315_gpio_int_setup(gpio, AR2315_GPIO_INT_TRIG_EDGE); ++} ++ ++static void ar2315_gpio_irq_mask(struct irq_data *d) ++{ ++ unsigned gpio = d->irq - ar2315_gpio_irq_base; ++ ++ /* Disable interrupt */ ++ ar2315_gpio_intmask &= ~(1 << gpio); ++ ar2315_gpio_int_setup(gpio, AR2315_GPIO_INT_TRIG_OFF); ++} ++ ++static struct irq_chip ar2315_gpio_irq_chip = { ++ .name = DRIVER_NAME, ++ .irq_unmask = ar2315_gpio_irq_unmask, ++ .irq_mask = ar2315_gpio_irq_mask, ++}; ++ ++static void ar2315_gpio_irq_init(unsigned irq) ++{ ++ unsigned i; ++ ++ ar2315_gpio_intval = ar2315_gpio_reg_read(AR2315_GPIO_DI); ++ for (i = 0; i < AR2315_GPIO_NUM; i++) { ++ unsigned _irq = ar2315_gpio_irq_base + i; ++ ++ irq_set_chip_and_handler(_irq, &ar2315_gpio_irq_chip, ++ handle_level_irq); ++ } ++ irq_set_chained_handler(irq, ar2315_gpio_irq_handler); ++} ++ ++static int ar2315_gpio_get_val(struct gpio_chip *chip, unsigned gpio) ++{ ++ return (ar2315_gpio_reg_read(AR2315_GPIO_DI) >> gpio) & 1; ++} ++ ++static void ar2315_gpio_set_val(struct gpio_chip *chip, unsigned gpio, int val) ++{ ++ u32 reg = ar2315_gpio_reg_read(AR2315_GPIO_DO); ++ ++ reg = val ? reg | (1 << gpio) : reg & ~(1 << gpio); ++ ar2315_gpio_reg_write(AR2315_GPIO_DO, reg); ++} ++ ++static int ar2315_gpio_dir_in(struct gpio_chip *chip, unsigned gpio) ++{ ++ ar2315_gpio_reg_mask(AR2315_GPIO_DIR, 1 << gpio, 0); ++ return 0; ++} ++ ++static int ar2315_gpio_dir_out(struct gpio_chip *chip, unsigned gpio, int val) ++{ ++ ar2315_gpio_reg_mask(AR2315_GPIO_DIR, 0, 1 << gpio); ++ ar2315_gpio_set_val(chip, gpio, val); ++ return 0; ++} ++ ++static int ar2315_gpio_to_irq(struct gpio_chip *chip, unsigned gpio) ++{ ++ return ar2315_gpio_irq_base + gpio; ++} ++ ++static struct gpio_chip ar2315_gpio_chip = { ++ .label = DRIVER_NAME, ++ .direction_input = ar2315_gpio_dir_in, ++ .direction_output = ar2315_gpio_dir_out, ++ .set = ar2315_gpio_set_val, ++ .get = ar2315_gpio_get_val, ++ .to_irq = ar2315_gpio_to_irq, ++ .base = 0, ++ .ngpio = AR2315_GPIO_NUM, ++}; ++ ++static int ar2315_gpio_probe(struct platform_device *pdev) ++{ ++ struct device *dev = &pdev->dev; ++ struct resource *res; ++ unsigned irq; ++ int ret; ++ ++ if (ar2315_mem) ++ return -EBUSY; ++ ++ res = platform_get_resource_byname(pdev, IORESOURCE_IRQ, ++ "ar2315-gpio-irq-base"); ++ if (!res) { ++ dev_err(dev, "not found GPIO IRQ base\n"); ++ return -ENXIO; ++ } ++ ar2315_gpio_irq_base = res->start; ++ ++ res = platform_get_resource_byname(pdev, IORESOURCE_IRQ, DRIVER_NAME); ++ if (!res) { ++ dev_err(dev, "not found IRQ number\n"); ++ return -ENXIO; ++ } ++ irq = res->start; ++ ++ res = platform_get_resource_byname(pdev, IORESOURCE_MEM, DRIVER_NAME); ++ ar2315_mem = devm_ioremap_resource(dev, res); ++ if (IS_ERR(ar2315_mem)) ++ return PTR_ERR(ar2315_mem); ++ ++ ar2315_gpio_chip.dev = dev; ++ ret = gpiochip_add(&ar2315_gpio_chip); ++ if (ret) { ++ dev_err(dev, "failed to add gpiochip\n"); ++ return ret; ++ } ++ ++ ar2315_gpio_irq_init(irq); ++ ++ return 0; ++} ++ ++static struct platform_driver ar2315_gpio_driver = { ++ .probe = ar2315_gpio_probe, ++ .driver = { ++ .name = DRIVER_NAME, ++ .owner = THIS_MODULE, ++ } ++}; ++ ++static int __init ar2315_gpio_init(void) ++{ ++ return platform_driver_register(&ar2315_gpio_driver); ++} ++subsys_initcall(ar2315_gpio_init);