From: Daniel Golle Date: Sun, 18 Feb 2024 03:13:23 +0000 (+0000) Subject: mediatek: mt7981: remove inaccurate compatible strings X-Git-Url: http://git.lede-project.org./?a=commitdiff_plain;h=6077fa2f614d14dff331b11c0f8d0ec145324695;p=openwrt%2Fstaging%2Fthess.git mediatek: mt7981: remove inaccurate compatible strings Remove more inaccurate compatible strings from various clock controllers of the MT7981 SoC. Signed-off-by: Daniel Golle --- diff --git a/target/linux/mediatek/files-6.1/arch/arm64/boot/dts/mediatek/mt7981.dtsi b/target/linux/mediatek/files-6.1/arch/arm64/boot/dts/mediatek/mt7981.dtsi index c763b4ebb3..acd40194b7 100644 --- a/target/linux/mediatek/files-6.1/arch/arm64/boot/dts/mediatek/mt7981.dtsi +++ b/target/linux/mediatek/files-6.1/arch/arm64/boot/dts/mediatek/mt7981.dtsi @@ -235,7 +235,7 @@ }; apmixedsys: apmixedsys@1001E000 { - compatible = "mediatek,mt7981-apmixedsys", "mediatek,mt7986-apmixedsys", "syscon"; + compatible = "mediatek,mt7981-apmixedsys", "syscon"; reg = <0 0x1001E000 0 0x1000>; #clock-cells = <1>; }; @@ -567,14 +567,14 @@ }; sgmiisys0: syscon@10060000 { - compatible = "mediatek,mt7981-sgmiisys_0", "mediatek,mt7986-sgmiisys_0", "syscon"; + compatible = "mediatek,mt7981-sgmiisys_0", "syscon"; reg = <0 0x10060000 0 0x1000>; mediatek,pnswap; #clock-cells = <1>; }; sgmiisys1: syscon@10070000 { - compatible = "mediatek,mt7981-sgmiisys_1", "mediatek,mt7986-sgmiisys_1", "syscon"; + compatible = "mediatek,mt7981-sgmiisys_1", "syscon"; reg = <0 0x10070000 0 0x1000>; #clock-cells = <1>; };