From: Shiji Yang Date: Fri, 28 Jun 2024 07:36:13 +0000 (+0800) Subject: ramips: gpio: convert to the generic GPIO driver X-Git-Url: http://git.lede-project.org./?a=commitdiff_plain;h=5f250cfd0429a0ad2ba9e08368e209a83252f42d;p=openwrt%2Fstaging%2Fansuel.git ramips: gpio: convert to the generic GPIO driver Drop most of the code in favor of the generic MMIO GPIO driver. Signed-off-by: Shiji Yang --- diff --git a/target/linux/ramips/mt7620/config-6.6 b/target/linux/ramips/mt7620/config-6.6 index bf96543344..a142efd43b 100644 --- a/target/linux/ramips/mt7620/config-6.6 +++ b/target/linux/ramips/mt7620/config-6.6 @@ -30,6 +30,7 @@ CONFIG_CPU_MIPS32=y CONFIG_CPU_MIPS32_R2=y CONFIG_CPU_MIPSR2=y CONFIG_CPU_MIPSR2_IRQ_VI=y +CONFIG_CPU_MITIGATIONS=y CONFIG_CPU_NEEDS_NO_SMARTMIPS_OR_MICROMIPS=y CONFIG_CPU_R4K_CACHE_TLB=y CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y @@ -58,8 +59,7 @@ CONFIG_FUNCTION_ALIGNMENT=0 CONFIG_FWNODE_MDIO=y CONFIG_FW_LOADER_PAGED_BUF=y CONFIG_FW_LOADER_SYSFS=y -CONFIG_GCC11_NO_ARRAY_BOUNDS=y -CONFIG_GCC_ASM_GOTO_OUTPUT_WORKAROUND=y +CONFIG_GCC10_NO_ARRAY_BOUNDS=y CONFIG_GENERIC_ATOMIC64=y CONFIG_GENERIC_CLOCKEVENTS=y CONFIG_GENERIC_CMOS_UPDATE=y @@ -82,6 +82,7 @@ CONFIG_GENERIC_SMP_IDLE_THREAD=y CONFIG_GENERIC_TIME_VSYSCALL=y CONFIG_GLOB=y CONFIG_GPIO_CDEV=y +CONFIG_GPIO_GENERIC=y # CONFIG_GPIO_MT7621 is not set CONFIG_GPIO_RALINK=y CONFIG_GPIO_WATCHDOG=y diff --git a/target/linux/ramips/mt7621/config-6.6 b/target/linux/ramips/mt7621/config-6.6 index 219e61a467..75d3f300fd 100644 --- a/target/linux/ramips/mt7621/config-6.6 +++ b/target/linux/ramips/mt7621/config-6.6 @@ -34,6 +34,7 @@ CONFIG_CPU_MIPS32_R2=y CONFIG_CPU_MIPSR2=y CONFIG_CPU_MIPSR2_IRQ_EI=y CONFIG_CPU_MIPSR2_IRQ_VI=y +CONFIG_CPU_MITIGATIONS=y CONFIG_CPU_NEEDS_NO_SMARTMIPS_OR_MICROMIPS=y CONFIG_CPU_R4K_CACHE_TLB=y CONFIG_CPU_RMAP=y @@ -64,8 +65,7 @@ CONFIG_FUNCTION_ALIGNMENT=0 CONFIG_FWNODE_MDIO=y CONFIG_FW_LOADER_PAGED_BUF=y CONFIG_FW_LOADER_SYSFS=y -CONFIG_GCC11_NO_ARRAY_BOUNDS=y -CONFIG_GCC_ASM_GOTO_OUTPUT_WORKAROUND=y +CONFIG_GCC10_NO_ARRAY_BOUNDS=y CONFIG_GENERIC_ATOMIC64=y CONFIG_GENERIC_CLOCKEVENTS=y CONFIG_GENERIC_CMOS_UPDATE=y @@ -128,7 +128,6 @@ CONFIG_MFD_SYSCON=y CONFIG_MIGRATION=y CONFIG_MIKROTIK=y CONFIG_MIKROTIK_RB_SYSFS=y -# CONFIG_NVMEM_LAYOUT_MIKROTIK is not set CONFIG_MIPS=y CONFIG_MIPS_ASID_BITS=8 CONFIG_MIPS_ASID_SHIFT=0 @@ -201,6 +200,7 @@ CONFIG_NO_HZ_IDLE=y CONFIG_NR_CPUS=4 CONFIG_NVMEM=y CONFIG_NVMEM_LAYOUTS=y +# CONFIG_NVMEM_LAYOUT_MIKROTIK is not set CONFIG_OF=y CONFIG_OF_ADDRESS=y CONFIG_OF_EARLY_FLATTREE=y diff --git a/target/linux/ramips/mt76x8/config-6.6 b/target/linux/ramips/mt76x8/config-6.6 index db1281ad54..a2d7bc9866 100644 --- a/target/linux/ramips/mt76x8/config-6.6 +++ b/target/linux/ramips/mt76x8/config-6.6 @@ -29,6 +29,7 @@ CONFIG_CPU_MIPS32=y CONFIG_CPU_MIPS32_R2=y CONFIG_CPU_MIPSR2=y CONFIG_CPU_MIPSR2_IRQ_VI=y +CONFIG_CPU_MITIGATIONS=y CONFIG_CPU_NEEDS_NO_SMARTMIPS_OR_MICROMIPS=y CONFIG_CPU_R4K_CACHE_TLB=y CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y @@ -56,8 +57,7 @@ CONFIG_FUNCTION_ALIGNMENT=0 CONFIG_FWNODE_MDIO=y CONFIG_FW_LOADER_PAGED_BUF=y CONFIG_FW_LOADER_SYSFS=y -CONFIG_GCC11_NO_ARRAY_BOUNDS=y -CONFIG_GCC_ASM_GOTO_OUTPUT_WORKAROUND=y +CONFIG_GCC10_NO_ARRAY_BOUNDS=y CONFIG_GENERIC_ATOMIC64=y CONFIG_GENERIC_CLOCKEVENTS=y CONFIG_GENERIC_CMOS_UPDATE=y diff --git a/target/linux/ramips/patches-6.6/802-GPIO-MIPS-ralink-add-gpio-driver-for-ralink-SoC.patch b/target/linux/ramips/patches-6.6/802-GPIO-MIPS-ralink-add-gpio-driver-for-ralink-SoC.patch index 3bebbc13ac..2930c57f40 100644 --- a/target/linux/ramips/patches-6.6/802-GPIO-MIPS-ralink-add-gpio-driver-for-ralink-SoC.patch +++ b/target/linux/ramips/patches-6.6/802-GPIO-MIPS-ralink-add-gpio-driver-for-ralink-SoC.patch @@ -7,21 +7,22 @@ RT2880, RT305x, rt3352, rt3662, rt3883, rt5350 and mt7620 work. Signed-off-by: John Crispin --- - drivers/gpio/Kconfig | 6 + + drivers/gpio/Kconfig | 7 + drivers/gpio/Makefile | 1 + - drivers/gpio/gpio-ralink.c | 328 +++++++++++++++++++++++++++++++++++++ - 3 files changed, 335 insertions(+) + drivers/gpio/gpio-ralink.c | 273 +++++++++++++++++++++++++++++++++++++ + 3 files changed, 281 insertions(+) create mode 100644 drivers/gpio/gpio-ralink.c --- a/drivers/gpio/Kconfig +++ b/drivers/gpio/Kconfig -@@ -594,6 +594,12 @@ config GPIO_SNPS_CREG +@@ -594,6 +594,13 @@ config GPIO_SNPS_CREG where only several fields in register belong to GPIO lines and each GPIO line owns a field with different length and on/off value. +config GPIO_RALINK + bool "Ralink GPIO Support" + depends on RALINK ++ select GPIO_GENERIC + help + Say yes here to support the Ralink SoC GPIO device + @@ -40,7 +41,7 @@ Signed-off-by: John Crispin obj-$(CONFIG_GPIO_RCAR) += gpio-rcar.o --- /dev/null +++ b/drivers/gpio/gpio-ralink.c -@@ -0,0 +1,328 @@ +@@ -0,0 +1,273 @@ +/* + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License version 2 as published @@ -110,52 +111,6 @@ Signed-off-by: John Crispin + return ioread32(rg->membase + rg->regs[reg]); +} + -+static void ralink_gpio_set(struct gpio_chip *chip, unsigned offset, int value) -+{ -+ struct ralink_gpio_chip *rg = to_ralink_gpio(chip); -+ -+ rt_gpio_w32(rg, (value) ? GPIO_REG_SET : GPIO_REG_RESET, BIT(offset)); -+} -+ -+static int ralink_gpio_get(struct gpio_chip *chip, unsigned offset) -+{ -+ struct ralink_gpio_chip *rg = to_ralink_gpio(chip); -+ -+ return !!(rt_gpio_r32(rg, GPIO_REG_DATA) & BIT(offset)); -+} -+ -+static int ralink_gpio_direction_input(struct gpio_chip *chip, unsigned offset) -+{ -+ struct ralink_gpio_chip *rg = to_ralink_gpio(chip); -+ unsigned long flags; -+ u32 t; -+ -+ spin_lock_irqsave(&rg->lock, flags); -+ t = rt_gpio_r32(rg, GPIO_REG_DIR); -+ t &= ~BIT(offset); -+ rt_gpio_w32(rg, GPIO_REG_DIR, t); -+ spin_unlock_irqrestore(&rg->lock, flags); -+ -+ return 0; -+} -+ -+static int ralink_gpio_direction_output(struct gpio_chip *chip, -+ unsigned offset, int value) -+{ -+ struct ralink_gpio_chip *rg = to_ralink_gpio(chip); -+ unsigned long flags; -+ u32 t; -+ -+ spin_lock_irqsave(&rg->lock, flags); -+ ralink_gpio_set(chip, offset, value); -+ t = rt_gpio_r32(rg, GPIO_REG_DIR); -+ t |= BIT(offset); -+ rt_gpio_w32(rg, GPIO_REG_DIR, t); -+ spin_unlock_irqrestore(&rg->lock, flags); -+ -+ return 0; -+} -+ +static int ralink_gpio_to_irq(struct gpio_chip *chip, unsigned pin) +{ + struct ralink_gpio_chip *rg = to_ralink_gpio(chip); @@ -298,12 +253,12 @@ Signed-off-by: John Crispin + +static int ralink_gpio_probe(struct platform_device *pdev) +{ -+ struct device_node *np = pdev->dev.of_node; ++ struct device *dev = &pdev->dev; ++ struct device_node *np = dev->of_node; + struct ralink_gpio_chip *rg; -+ const __be32 *ngpio; ++ int ret; + -+ rg = devm_kzalloc(&pdev->dev, -+ sizeof(struct ralink_gpio_chip), GFP_KERNEL); ++ rg = devm_kzalloc(dev, sizeof(struct ralink_gpio_chip), GFP_KERNEL); + if (!rg) + return -ENOMEM; + @@ -313,27 +268,20 @@ Signed-off-by: John Crispin + + if (of_property_read_u8_array(np, "ralink,register-map", + rg->regs, GPIO_REG_MAX)) { -+ dev_err(&pdev->dev, "failed to read register definition\n"); -+ return -EINVAL; -+ } -+ -+ ngpio = of_get_property(np, "ngpios", NULL); -+ if (!ngpio) { -+ dev_err(&pdev->dev, "failed to read number of pins\n"); ++ dev_err(dev, "failed to read register definition\n"); + return -EINVAL; + } + + spin_lock_init(&rg->lock); + -+ rg->chip.base = -1; -+ rg->chip.parent = &pdev->dev; -+ rg->chip.label = dev_name(&pdev->dev); -+ rg->chip.fwnode = of_node_to_fwnode(np); -+ rg->chip.ngpio = be32_to_cpu(*ngpio); -+ rg->chip.direction_input = ralink_gpio_direction_input; -+ rg->chip.direction_output = ralink_gpio_direction_output; -+ rg->chip.get = ralink_gpio_get; -+ rg->chip.set = ralink_gpio_set; ++ ret = bgpio_init(&rg->chip, dev, 4, ++ rg->membase + rg->regs[GPIO_REG_DATA], ++ rg->membase + rg->regs[GPIO_REG_SET], ++ rg->membase + rg->regs[GPIO_REG_RESET], ++ rg->membase + rg->regs[GPIO_REG_DIR], ++ NULL, 0); ++ if (ret) ++ return dev_err_probe(dev, ret, "bgpio_init() failed\n"); + rg->chip.request = gpiochip_generic_request; + rg->chip.to_irq = ralink_gpio_to_irq; + rg->chip.free = gpiochip_generic_free; @@ -341,11 +289,9 @@ Signed-off-by: John Crispin + /* set polarity to low for all lines */ + rt_gpio_w32(rg, GPIO_REG_POL, 0); + -+ dev_info(&pdev->dev, "registering %d gpios\n", rg->chip.ngpio); -+ + ralink_gpio_irq_init(np, rg); + -+ return gpiochip_add(&rg->chip); ++ return devm_gpiochip_add_data(dev, &rg->chip, rg); +} + +static const struct of_device_id ralink_gpio_match[] = { diff --git a/target/linux/ramips/patches-6.6/803-gpio-ralink-Add-support-for-GPIO-as-interrupt-contro.patch b/target/linux/ramips/patches-6.6/803-gpio-ralink-Add-support-for-GPIO-as-interrupt-contro.patch index bd6b553937..54dadc735d 100644 --- a/target/linux/ramips/patches-6.6/803-gpio-ralink-Add-support-for-GPIO-as-interrupt-contro.patch +++ b/target/linux/ramips/patches-6.6/803-gpio-ralink-Add-support-for-GPIO-as-interrupt-contro.patch @@ -32,7 +32,7 @@ Signed-off-by: Daniel Santos --- a/drivers/gpio/gpio-ralink.c +++ b/drivers/gpio/gpio-ralink.c -@@ -220,7 +220,7 @@ static int gpio_map(struct irq_domain *d +@@ -174,7 +174,7 @@ static int gpio_map(struct irq_domain *d } static const struct irq_domain_ops irq_domain_ops = { diff --git a/target/linux/ramips/rt288x/config-6.6 b/target/linux/ramips/rt288x/config-6.6 index f3261258ae..3a6657fdfe 100644 --- a/target/linux/ramips/rt288x/config-6.6 +++ b/target/linux/ramips/rt288x/config-6.6 @@ -25,6 +25,7 @@ CONFIG_CPU_LITTLE_ENDIAN=y CONFIG_CPU_MIPS32=y CONFIG_CPU_MIPS32_R2=y CONFIG_CPU_MIPSR2=y +CONFIG_CPU_MITIGATIONS=y CONFIG_CPU_NEEDS_NO_SMARTMIPS_OR_MICROMIPS=y CONFIG_CPU_R4K_CACHE_TLB=y CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y @@ -49,8 +50,7 @@ CONFIG_FUNCTION_ALIGNMENT=0 CONFIG_FWNODE_MDIO=y CONFIG_FW_LOADER_PAGED_BUF=y CONFIG_FW_LOADER_SYSFS=y -CONFIG_GCC11_NO_ARRAY_BOUNDS=y -CONFIG_GCC_ASM_GOTO_OUTPUT_WORKAROUND=y +CONFIG_GCC10_NO_ARRAY_BOUNDS=y CONFIG_GENERIC_ALLOCATOR=y CONFIG_GENERIC_ATOMIC64=y CONFIG_GENERIC_CLOCKEVENTS=y @@ -73,6 +73,7 @@ CONFIG_GENERIC_SMP_IDLE_THREAD=y CONFIG_GENERIC_TIME_VSYSCALL=y CONFIG_GLOB=y CONFIG_GPIO_CDEV=y +CONFIG_GPIO_GENERIC=y CONFIG_GPIO_RALINK=y CONFIG_HARDWARE_WATCHPOINTS=y CONFIG_HAS_DMA=y diff --git a/target/linux/ramips/rt305x/config-6.6 b/target/linux/ramips/rt305x/config-6.6 index 27bf316c68..69070730ad 100644 --- a/target/linux/ramips/rt305x/config-6.6 +++ b/target/linux/ramips/rt305x/config-6.6 @@ -27,6 +27,7 @@ CONFIG_CPU_LITTLE_ENDIAN=y CONFIG_CPU_MIPS32=y CONFIG_CPU_MIPS32_R2=y CONFIG_CPU_MIPSR2=y +CONFIG_CPU_MITIGATIONS=y CONFIG_CPU_NEEDS_NO_SMARTMIPS_OR_MICROMIPS=y CONFIG_CPU_R4K_CACHE_TLB=y CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y @@ -52,8 +53,7 @@ CONFIG_FUNCTION_ALIGNMENT=0 CONFIG_FWNODE_MDIO=y CONFIG_FW_LOADER_PAGED_BUF=y CONFIG_FW_LOADER_SYSFS=y -CONFIG_GCC11_NO_ARRAY_BOUNDS=y -CONFIG_GCC_ASM_GOTO_OUTPUT_WORKAROUND=y +CONFIG_GCC10_NO_ARRAY_BOUNDS=y CONFIG_GENERIC_ATOMIC64=y CONFIG_GENERIC_CLOCKEVENTS=y CONFIG_GENERIC_CMOS_UPDATE=y @@ -76,6 +76,7 @@ CONFIG_GENERIC_SMP_IDLE_THREAD=y CONFIG_GENERIC_TIME_VSYSCALL=y CONFIG_GLOB=y CONFIG_GPIO_CDEV=y +CONFIG_GPIO_GENERIC=y CONFIG_GPIO_RALINK=y CONFIG_GPIO_WATCHDOG=y # CONFIG_GPIO_WATCHDOG_ARCH_INITCALL is not set diff --git a/target/linux/ramips/rt3883/config-6.6 b/target/linux/ramips/rt3883/config-6.6 index b272c751ed..55dd19406e 100644 --- a/target/linux/ramips/rt3883/config-6.6 +++ b/target/linux/ramips/rt3883/config-6.6 @@ -26,6 +26,7 @@ CONFIG_CPU_LITTLE_ENDIAN=y CONFIG_CPU_MIPS32=y CONFIG_CPU_MIPS32_R2=y CONFIG_CPU_MIPSR2=y +CONFIG_CPU_MITIGATIONS=y CONFIG_CPU_NEEDS_NO_SMARTMIPS_OR_MICROMIPS=y CONFIG_CPU_R4K_CACHE_TLB=y CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y @@ -52,8 +53,7 @@ CONFIG_FUNCTION_ALIGNMENT=0 CONFIG_FWNODE_MDIO=y CONFIG_FW_LOADER_PAGED_BUF=y CONFIG_FW_LOADER_SYSFS=y -CONFIG_GCC11_NO_ARRAY_BOUNDS=y -CONFIG_GCC_ASM_GOTO_OUTPUT_WORKAROUND=y +CONFIG_GCC10_NO_ARRAY_BOUNDS=y CONFIG_GENERIC_ATOMIC64=y CONFIG_GENERIC_CLOCKEVENTS=y CONFIG_GENERIC_CMOS_UPDATE=y @@ -76,6 +76,7 @@ CONFIG_GENERIC_SMP_IDLE_THREAD=y CONFIG_GENERIC_TIME_VSYSCALL=y CONFIG_GLOB=y CONFIG_GPIO_CDEV=y +CONFIG_GPIO_GENERIC=y CONFIG_GPIO_RALINK=y CONFIG_HARDWARE_WATCHPOINTS=y CONFIG_HAS_DMA=y