From: Daniel Golle Date: Sat, 30 Apr 2022 14:41:13 +0000 (+0100) Subject: mediatek: backport recent DTS improvements for MT7622 SoC X-Git-Url: http://git.lede-project.org./?a=commitdiff_plain;h=5d135fcf9d46835caea4eb88820ca129dc1bab96;p=openwrt%2Fstaging%2Fmans0n.git mediatek: backport recent DTS improvements for MT7622 SoC Daniel Golle: 190-arm64-dts-mediatek-mt7622-fix-GICv2-range.patch Rui Salvaterra: 191-arm64-dts-mt7622-specify-the-L2-cache-topology.patch 192-arm64-dts-mt7622-specify-the-number-of-DMA-requests.patch Signed-off-by: Daniel Golle --- diff --git a/target/linux/mediatek/patches-5.15/190-arm64-dts-mediatek-mt7622-fix-GICv2-range.patch b/target/linux/mediatek/patches-5.15/190-arm64-dts-mediatek-mt7622-fix-GICv2-range.patch new file mode 100644 index 0000000000..39a9770d98 --- /dev/null +++ b/target/linux/mediatek/patches-5.15/190-arm64-dts-mediatek-mt7622-fix-GICv2-range.patch @@ -0,0 +1,106 @@ +From patchwork Tue Apr 26 19:51:36 2022 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +X-Patchwork-Submitter: Daniel Golle +X-Patchwork-Id: 12827872 +Return-Path: + +X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on + aws-us-west-2-korg-lkml-1.web.codeaurora.org +Received: from bombadil.infradead.org (bombadil.infradead.org + [198.137.202.133]) + (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) + (No client certificate requested) + by smtp.lore.kernel.org (Postfix) with ESMTPS id BACF3C433EF + for ; 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Tue, 26 Apr 2022 19:51:57 +0000 +Received: from fudo.makrotopia.org ([2a07:2ec0:3002::71]) + by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) + id 1njRE1-00G03h-9H; Tue, 26 Apr 2022 19:51:55 +0000 +Received: from local + by fudo.makrotopia.org with esmtpsa (TLS1.3:TLS_AES_256_GCM_SHA384:256) + (Exim 4.94.2) (envelope-from ) + id 1njRDu-0006aF-4F; Tue, 26 Apr 2022 21:51:46 +0200 +Date: Tue, 26 Apr 2022 20:51:36 +0100 +From: Daniel Golle +To: devicetree@vger.kernel.org, linux-mediatek@lists.infradead.org, + linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org +Cc: Rob Herring , + Krzysztof Kozlowski , + Matthias Brugger +Subject: [PATCH] arm64: dts: mediatek: mt7622: fix GICv2 range +Message-ID: +MIME-Version: 1.0 +Content-Disposition: inline +X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 +X-CRM114-CacheID: sfid-20220426_125153_359242_EA3D452C +X-CRM114-Status: GOOD ( 12.45 ) +X-BeenThere: linux-arm-kernel@lists.infradead.org +X-Mailman-Version: 2.1.34 +Precedence: list +List-Id: +List-Unsubscribe: + , + +List-Archive: +List-Post: +List-Help: +List-Subscribe: + , + +Sender: "linux-arm-kernel" +Errors-To: + linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org + +With the current range specified for the CPU interface there is an +error message at boot: + +GIC: GICv2 detected, but range too small and irqchip.gicv2_force_probe not set + +Setting irqchip.gicv2_force_probe=1 in bootargs results in: + +GIC: Aliased GICv2 at 0x0000000010320000, trying to find the canonical range over 128kB +GIC: Adjusting CPU interface base to 0x000000001032f000 +GIC: Using split EOI/Deactivate mode + +Using the adjusted CPU interface base and 8K size results in only the +final line remaining and fully working system as well as /proc/interrupts +showing additional IPI3,4,5,6: + +IPI3: 0 0 CPU stop (for crash dump) interrupts +IPI4: 0 0 Timer broadcast interrupts +IPI5: 0 0 IRQ work interrupts +IPI6: 0 0 CPU wake-up interrupts + +Signed-off-by: Daniel Golle +--- + arch/arm64/boot/dts/mediatek/mt7622.dtsi | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/arch/arm64/boot/dts/mediatek/mt7622.dtsi ++++ b/arch/arm64/boot/dts/mediatek/mt7622.dtsi +@@ -339,7 +339,7 @@ + #interrupt-cells = <3>; + interrupt-parent = <&gic>; + reg = <0 0x10310000 0 0x1000>, +- <0 0x10320000 0 0x1000>, ++ <0 0x1032f000 0 0x2000>, + <0 0x10340000 0 0x2000>, + <0 0x10360000 0 0x2000>; + }; diff --git a/target/linux/mediatek/patches-5.15/191-arm64-dts-mt7622-specify-the-L2-cache-topology.patch b/target/linux/mediatek/patches-5.15/191-arm64-dts-mt7622-specify-the-L2-cache-topology.patch new file mode 100644 index 0000000000..8851fefbb3 --- /dev/null +++ b/target/linux/mediatek/patches-5.15/191-arm64-dts-mt7622-specify-the-L2-cache-topology.patch @@ -0,0 +1,132 @@ +From patchwork Thu Apr 28 22:57:55 2022 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +X-Patchwork-Submitter: Rui Salvaterra +X-Patchwork-Id: 12831311 +Return-Path: + +X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on + aws-us-west-2-korg-lkml-1.web.codeaurora.org +Received: from bombadil.infradead.org (bombadil.infradead.org + [198.137.202.133]) + (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) + (No client certificate requested) + by smtp.lore.kernel.org (Postfix) with ESMTPS id 49367C433EF + for ; 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+ Thu, 28 Apr 2022 15:58:06 -0700 (PDT) +From: Rui Salvaterra +To: linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, + linux-kernel@vger.kernel.org +Cc: matthias.bgg@gmail.com, ryder.lee@mediatek.com, daniel@makrotopia.org, + Rui Salvaterra +Subject: [PATCH] arm64: dts: mt7622: specify the L2 cache topology +Date: Thu, 28 Apr 2022 23:57:55 +0100 +Message-Id: <20220428225755.785153-1-rsalvaterra@gmail.com> +X-Mailer: git-send-email 2.36.0 +MIME-Version: 1.0 +X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 +X-CRM114-CacheID: sfid-20220428_155811_895571_B63D2806 +X-CRM114-Status: GOOD ( 10.27 ) +X-BeenThere: linux-arm-kernel@lists.infradead.org +X-Mailman-Version: 2.1.34 +Precedence: list +List-Id: +List-Unsubscribe: + , + +List-Archive: +List-Post: +List-Help: +List-Subscribe: + , + +Sender: "linux-arm-kernel" +Errors-To: + linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org + +On an MT7622 system, the kernel complains of not being able to detect the cache +hierarchy of CPU 0. Specify the shared L2 cache node in the device tree, in +order to fix this. + +Signed-off-by: Rui Salvaterra +--- + arch/arm64/boot/dts/mediatek/mt7622.dtsi | 7 +++++++ + 1 file changed, 7 insertions(+) + +--- a/arch/arm64/boot/dts/mediatek/mt7622.dtsi ++++ b/arch/arm64/boot/dts/mediatek/mt7622.dtsi +@@ -80,6 +80,7 @@ + enable-method = "psci"; + clock-frequency = <1300000000>; + cci-control-port = <&cci_control2>; ++ next-level-cache = <&L2>; + }; + + cpu1: cpu@1 { +@@ -94,6 +95,12 @@ + enable-method = "psci"; + clock-frequency = <1300000000>; + cci-control-port = <&cci_control2>; ++ next-level-cache = <&L2>; ++ }; ++ ++ L2: l2-cache { ++ compatible = "cache"; ++ cache-level = <2>; + }; + }; + diff --git a/target/linux/mediatek/patches-5.15/192-arm64-dts-mt7622-specify-the-number-of-DMA-requests.patch b/target/linux/mediatek/patches-5.15/192-arm64-dts-mt7622-specify-the-number-of-DMA-requests.patch new file mode 100644 index 0000000000..f8100b20b8 --- /dev/null +++ b/target/linux/mediatek/patches-5.15/192-arm64-dts-mt7622-specify-the-number-of-DMA-requests.patch @@ -0,0 +1,122 @@ +From patchwork Fri Apr 29 08:42:25 2022 +Content-Type: text/plain; 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+ Fri, 29 Apr 2022 01:42:32 -0700 (PDT) +Received: from crystalwell.adg.lan (a109-49-0-175.cpe.netcabo.pt. + [109.49.0.175]) by smtp.gmail.com with ESMTPSA id + el10-20020a170907284a00b006f3ef214e32sm429064ejc.152.2022.04.29.01.42.31 + (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); + Fri, 29 Apr 2022 01:42:31 -0700 (PDT) +From: Rui Salvaterra +To: linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, + linux-kernel@vger.kernel.org +Cc: matthias.bgg@gmail.com, ryder.lee@mediatek.com, daniel@makrotopia.org, + Rui Salvaterra +Subject: [PATCH] arm64: dts: mt7622: specify the number of DMA requests +Date: Fri, 29 Apr 2022 09:42:25 +0100 +Message-Id: <20220429084225.298213-1-rsalvaterra@gmail.com> +X-Mailer: git-send-email 2.36.0 +MIME-Version: 1.0 +X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 +X-CRM114-CacheID: sfid-20220429_014236_944696_097D1E73 +X-CRM114-Status: UNSURE ( 8.85 ) +X-CRM114-Notice: Please train this message. +X-BeenThere: linux-arm-kernel@lists.infradead.org +X-Mailman-Version: 2.1.34 +Precedence: list +List-Id: +List-Unsubscribe: + , + +List-Archive: +List-Post: +List-Help: +List-Subscribe: + , + +Sender: "linux-arm-kernel" +Errors-To: + linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org + +The MT7622 device tree never bothered to specify the number of virtual DMA +channels for the HSDMA controller, always falling back to the default value of +3. Make this value explicit, in order to avoid the following dmesg notification: + +mtk_hsdma 1b007000.dma-controller: Using 3 as missing dma-requests property + +Signed-off-by: Rui Salvaterra +--- + arch/arm64/boot/dts/mediatek/mt7622.dtsi | 1 + + 1 file changed, 1 insertion(+) + +--- a/arch/arm64/boot/dts/mediatek/mt7622.dtsi ++++ b/arch/arm64/boot/dts/mediatek/mt7622.dtsi +@@ -940,6 +940,7 @@ + clock-names = "hsdma"; + power-domains = <&scpsys MT7622_POWER_DOMAIN_ETHSYS>; + #dma-cells = <1>; ++ dma-requests = <3>; + }; + + pcie_mirror: pcie-mirror@10000400 {