From: Linus Torvalds <torvalds@linux-foundation.org>
Date: Tue, 5 Jun 2018 01:19:18 +0000 (-0700)
Subject: Merge branch 'x86-boot-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git... 
X-Git-Url: http://git.lede-project.org./?a=commitdiff_plain;h=5cef8c2a2289117b7f65de4313b7157578ec1a71;p=openwrt%2Fstaging%2Fblogic.git

Merge branch 'x86-boot-for-linus' of git://git./linux/kernel/git/tip/tip

Pull x86 boot updates from Ingo Molnar:

 - Centaur CPU updates (David Wang)

 - AMD and other CPU topology enumeration improvements and fixes
   (Borislav Petkov, Thomas Gleixner, Suravee Suthikulpanit)

 - Continued 5-level paging work (Kirill A. Shutemov)

* 'x86-boot-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  x86/mm: Mark __pgtable_l5_enabled __initdata
  x86/mm: Mark p4d_offset() __always_inline
  x86/mm: Introduce the 'no5lvl' kernel parameter
  x86/mm: Stop pretending pgtable_l5_enabled is a variable
  x86/mm: Unify pgtable_l5_enabled usage in early boot code
  x86/boot/compressed/64: Fix trampoline page table address calculation
  x86/CPU: Move x86_cpuinfo::x86_max_cores assignment to detect_num_cpu_cores()
  x86/Centaur: Report correct CPU/cache topology
  x86/CPU: Move cpu_detect_cache_sizes() into init_intel_cacheinfo()
  x86/CPU: Make intel_num_cpu_cores() generic
  x86/CPU: Move cpu local function declarations to local header
  x86/CPU/AMD: Derive CPU topology from CPUID function 0xB when available
  x86/CPU: Modify detect_extended_topology() to return result
  x86/CPU/AMD: Calculate last level cache ID from number of sharing threads
  x86/CPU: Rename intel_cacheinfo.c to cacheinfo.c
  perf/events/amd/uncore: Fix amd_uncore_llc ID to use pre-defined cpu_llc_id
  x86/CPU/AMD: Have smp_num_siblings and cpu_llc_id always be present
  x86/Centaur: Initialize supported CPU features properly
---

5cef8c2a2289117b7f65de4313b7157578ec1a71
diff --cc arch/x86/kernel/cpu/amd.c
index 1b18be3f35a8,55361ee04cc5..082d7875cef8
--- a/arch/x86/kernel/cpu/amd.c
+++ b/arch/x86/kernel/cpu/amd.c
@@@ -9,8 -9,8 +9,9 @@@
  #include <linux/random.h>
  #include <asm/processor.h>
  #include <asm/apic.h>
+ #include <asm/cacheinfo.h>
  #include <asm/cpu.h>
 +#include <asm/spec-ctrl.h>
  #include <asm/smp.h>
  #include <asm/pci-direct.h>
  #include <asm/delay.h>
diff --cc arch/x86/kernel/smpboot.c
index 9dd324ae4832,734e57847917..c2f7d1d2a5c3
--- a/arch/x86/kernel/smpboot.c
+++ b/arch/x86/kernel/smpboot.c
@@@ -79,15 -79,7 +79,8 @@@
  #include <asm/qspinlock.h>
  #include <asm/intel-family.h>
  #include <asm/cpu_device_id.h>
 +#include <asm/spec-ctrl.h>
  
- /* Number of siblings per CPU package */
- int smp_num_siblings = 1;
- EXPORT_SYMBOL(smp_num_siblings);
- 
- /* Last level cache ID of each logical CPU */
- DEFINE_PER_CPU_READ_MOSTLY(u16, cpu_llc_id) = BAD_APICID;
- 
  /* representing HT siblings of each logical CPU */
  DEFINE_PER_CPU_READ_MOSTLY(cpumask_var_t, cpu_sibling_map);
  EXPORT_PER_CPU_SYMBOL(cpu_sibling_map);