From: Jes Sorensen <Jes.Sorensen@redhat.com>
Date: Fri, 9 May 2014 13:04:15 +0000 (+0200)
Subject: staging: rtl8723au: No need for CHKBIT since 16 + 12 is still < 32
X-Git-Url: http://git.lede-project.org./?a=commitdiff_plain;h=5a443893313811eebd4e9af0c1942873ace95c5f;p=openwrt%2Fstaging%2Fblogic.git

staging: rtl8723au: No need for CHKBIT since 16 + 12 is still < 32

Signed-off-by: Jes Sorensen <Jes.Sorensen@redhat.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---

diff --git a/drivers/staging/rtl8723au/core/rtw_ap.c b/drivers/staging/rtl8723au/core/rtw_ap.c
index 58b2359a990c..9e66c917ac59 100644
--- a/drivers/staging/rtl8723au/core/rtw_ap.c
+++ b/drivers/staging/rtl8723au/core/rtw_ap.c
@@ -380,9 +380,9 @@ void add_RATid23a(struct rtw_adapter *padapter, struct sta_info *psta, u8 rssi_l
 		else
 			limit = 8;/*   1R */
 
-		for (i = 0; i<limit; i++) {
-			if (psta_ht->ht_cap.mcs.rx_mask[i/8] & BIT(i%8))
-				tx_ra_bitmap |= CHKBIT(i+12);
+		for (i = 0; i < limit; i++) {
+			if (psta_ht->ht_cap.mcs.rx_mask[i / 8] & BIT(i % 8))
+				tx_ra_bitmap |= BIT(i + 12);
 		}
 
 		/* max short GI rate */