From: Felix Fietkau Date: Mon, 12 Aug 2013 17:26:03 +0000 (+0000) Subject: ar71xx: ethernet: reduce tx and rx DMA ring size to improve cache footprint X-Git-Url: http://git.lede-project.org./?a=commitdiff_plain;h=58e049ea8087c7c6fee3c0039de175ff8b356215;p=openwrt%2Fstaging%2Fneocturne.git ar71xx: ethernet: reduce tx and rx DMA ring size to improve cache footprint 256 entries is a bit excessive, even for gigabit speeds Signed-off-by: Felix Fietkau SVN-Revision: 37762 --- diff --git a/target/linux/ar71xx/files/drivers/net/ethernet/atheros/ag71xx/ag71xx.h b/target/linux/ar71xx/files/drivers/net/ethernet/atheros/ag71xx/ag71xx.h index 6d51e722b0..83607b38bf 100644 --- a/target/linux/ar71xx/files/drivers/net/ethernet/atheros/ag71xx/ag71xx.h +++ b/target/linux/ar71xx/files/drivers/net/ethernet/atheros/ag71xx/ag71xx.h @@ -58,8 +58,8 @@ #define AG71XX_TX_RING_SIZE_DEFAULT 64 #define AG71XX_RX_RING_SIZE_DEFAULT 128 -#define AG71XX_TX_RING_SIZE_MAX 256 -#define AG71XX_RX_RING_SIZE_MAX 256 +#define AG71XX_TX_RING_SIZE_MAX 128 +#define AG71XX_RX_RING_SIZE_MAX 128 #ifdef CONFIG_AG71XX_DEBUG #define DBG(fmt, args...) pr_debug(fmt, ## args)