From: Pratyush Anand Date: Thu, 21 Jun 2012 12:14:29 +0000 (+0530) Subject: USB: DWC3: Issue device soft reset before core soft reset X-Git-Url: http://git.lede-project.org./?a=commitdiff_plain;h=58a0f23fddd0a71d8fa22e6ef7627298a8ed29a6;p=openwrt%2Fstaging%2Fblogic.git USB: DWC3: Issue device soft reset before core soft reset Synopsys specification clearly states under section "Device Power-On or Soft Reset" that DCTL.CSftRst=1 should be first step. So, just follow what specification says. Signed-off-by: Pratyush Anand Signed-off-by: Felipe Balbi --- diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c index ac151e9acf20..c34452a7304f 100644 --- a/drivers/usb/dwc3/core.c +++ b/drivers/usb/dwc3/core.c @@ -335,8 +335,6 @@ static int __devinit dwc3_core_init(struct dwc3 *dwc) } dwc->revision = reg; - dwc3_core_soft_reset(dwc); - /* issue device SoftReset too */ timeout = jiffies + msecs_to_jiffies(500); dwc3_writel(dwc->regs, DWC3_DCTL, DWC3_DCTL_CSFTRST); @@ -354,6 +352,8 @@ static int __devinit dwc3_core_init(struct dwc3 *dwc) cpu_relax(); } while (true); + dwc3_core_soft_reset(dwc); + dwc3_cache_hwparams(dwc); reg = dwc3_readl(dwc->regs, DWC3_GCTL);