From: Piotr Dymacz Date: Fri, 9 Mar 2018 23:06:50 +0000 (+0100) Subject: ar71xx: rework chipidea controller support, add QCA9531 X-Git-Tag: v19.07.0-rc1~4014 X-Git-Url: http://git.lede-project.org./?a=commitdiff_plain;h=57c641ba6ed833c309a0f06dfc1b808bdea2c613;p=openwrt%2Fstaging%2Fhauke.git ar71xx: rework chipidea controller support, add QCA9531 Rework (again) platform support for dual-role chipidea USB controller: - include support for QCA9531 - use correct EHCI block size - drop ar933x_usb_setup_ctrl_config() function - simplify code after previous "register chipidea only in device mode" change (fa22714181) Reworked patch was tested on devices with below QCA WiSOCs (signal/GPIO name with required bootstrap state for USB bus 0 in device mode): - AR9331 (GPIO13 pull-down) - AR9342 (RGMII_TXD1/ETXD1 pull-up) - AR9344 (GPIO20 pull-up) - QCA9531 (GPIO13 pull-up) - QCA9558 (GPIO13 pull-up) The only way to select device mode for bus 0 is to change SOC bootstrap configuration which is sampled only once, at hard reset. Likely, other models, like QCA9556 or AR9341, should also support dual-role USB mode but they were not tested. Signed-off-by: Piotr Dymacz --- diff --git a/target/linux/ar71xx/patches-4.9/920-usb-chipidea-AR933x-platform-support.patch b/target/linux/ar71xx/patches-4.9/920-usb-chipidea-AR933x-platform-support.patch index b33bf755e9..b0e69af9c1 100644 --- a/target/linux/ar71xx/patches-4.9/920-usb-chipidea-AR933x-platform-support.patch +++ b/target/linux/ar71xx/patches-4.9/920-usb-chipidea-AR933x-platform-support.patch @@ -29,48 +29,35 @@ #include #include -@@ -170,6 +173,64 @@ static void __init ar913x_usb_setup(void +@@ -170,6 +173,44 @@ static void __init ar913x_usb_setup(void &ath79_ehci_pdata_v2, sizeof(ath79_ehci_pdata_v2)); } -+static void __init ar933x_usb_setup_ctrl_config(void) -+{ -+ void __iomem *usb_ctrl_base, *usb_config_reg; -+ u32 usb_config; -+ -+ usb_ctrl_base = ioremap(AR71XX_USB_CTRL_BASE, AR71XX_USB_CTRL_SIZE); -+ usb_config_reg = usb_ctrl_base + AR71XX_USB_CTRL_REG_CONFIG; -+ usb_config = __raw_readl(usb_config_reg); -+ usb_config &= ~AR933X_USB_CONFIG_HOST_ONLY; -+ __raw_writel(usb_config, usb_config_reg); -+ iounmap(usb_ctrl_base); -+} -+ -+static void __init ar9xxx_ci_usb_setup(int irq) ++static void __init ar9xxx_ci_usb_setup(int bus_id, int irq) +{ + struct ci_hdrc_platform_data ci_pdata; -+ enum usb_dr_mode dr_mode; + bool host_mode = true; + + if (soc_is_ar933x()) + host_mode = ath79_reset_rr(AR933X_RESET_REG_BOOTSTRAP) & + AR933X_BOOTSTRAP_USB_MODE_HOST; -+ else if (soc_is_ar934x() || soc_is_qca955x()) ++ else + host_mode = !(ath79_reset_rr(AR934X_RESET_REG_BOOTSTRAP) & + AR934X_BOOTSTRAP_USB_MODE_DEVICE); + + if (host_mode) { -+ dr_mode = USB_DR_MODE_HOST; -+ } else { -+ dr_mode = USB_DR_MODE_PERIPHERAL; -+ if (soc_is_ar933x()) -+ ar933x_usb_setup_ctrl_config(); ++ ath79_usb_register("ehci-platform", bus_id, ++ AR934X_EHCI_BASE, AR934X_EHCI_SIZE, ++ irq, &ath79_ehci_pdata_v2, ++ sizeof(ath79_ehci_pdata_v2)); ++ ++ return; + } + + memset(&ci_pdata, 0, sizeof(ci_pdata)); + ci_pdata.name = "ci_hdrc_ar9xxx"; + ci_pdata.capoffset = DEF_CAPOFFSET; -+ ci_pdata.dr_mode = dr_mode; ++ ci_pdata.dr_mode = USB_DR_MODE_PERIPHERAL; + ci_pdata.flags = CI_HDRC_DUAL_ROLE_NOT_OTG | CI_HDRC_DP_ALWAYS_PULLUP; + ci_pdata.vbus_extcon.edev = ERR_PTR(-ENODEV); + ci_pdata.id_extcon.edev = ERR_PTR(-ENODEV); @@ -79,22 +66,15 @@ + platform_device_register_simple("usb_phy_generic", + PLATFORM_DEVID_AUTO, NULL, 0); + -+ if (!host_mode) -+ ath79_usb_register("ci_hdrc", -1, -+ AR933X_EHCI_BASE, AR933X_EHCI_SIZE, -+ irq, &ci_pdata, sizeof(ci_pdata)); -+ else -+ ath79_usb_register("ehci-platform", -1, -+ AR934X_EHCI_BASE, AR934X_EHCI_SIZE, -+ irq, &ath79_ehci_pdata_v2, -+ sizeof(ath79_ehci_pdata_v2)); -+ ++ ath79_usb_register("ci_hdrc", -1, ++ AR934X_EHCI_BASE, AR934X_EHCI_SIZE, ++ irq, &ci_pdata, sizeof(ci_pdata)); +} + static void __init ar933x_usb_setup(void) { ath79_device_reset_set(AR933X_RESET_USBSUS_OVERRIDE); -@@ -181,10 +242,7 @@ static void __init ar933x_usb_setup(void +@@ -181,10 +222,7 @@ static void __init ar933x_usb_setup(void ath79_device_reset_clear(AR933X_RESET_USB_PHY); mdelay(10); @@ -102,11 +82,11 @@ - AR933X_EHCI_BASE, AR933X_EHCI_SIZE, - ATH79_CPU_IRQ(3), - &ath79_ehci_pdata_v2, sizeof(ath79_ehci_pdata_v2)); -+ ar9xxx_ci_usb_setup(ATH79_CPU_IRQ(3)); ++ ar9xxx_ci_usb_setup(-1, ATH79_CPU_IRQ(3)); } static void enable_tx_tx_idp_violation_fix(unsigned base) -@@ -230,10 +288,7 @@ static void __init ar934x_usb_setup(void +@@ -230,10 +268,7 @@ static void __init ar934x_usb_setup(void if (ath79_soc_rev >= 3) ath79_ehci_pdata_v2.reset_notifier = ar934x_usb_reset_notifier; @@ -114,11 +94,23 @@ - AR934X_EHCI_BASE, AR934X_EHCI_SIZE, - ATH79_CPU_IRQ(3), - &ath79_ehci_pdata_v2, sizeof(ath79_ehci_pdata_v2)); -+ ar9xxx_ci_usb_setup(ATH79_CPU_IRQ(3)); ++ ar9xxx_ci_usb_setup(-1, ATH79_CPU_IRQ(3)); } static void __init qca953x_usb_setup(void) -@@ -285,10 +340,7 @@ static void __init qca955x_usb_setup(voi +@@ -254,10 +289,7 @@ static void __init qca953x_usb_setup(voi + ath79_device_reset_clear(QCA953X_RESET_USB_HOST); + udelay(1000); + +- ath79_usb_register("ehci-platform", -1, +- QCA953X_EHCI_BASE, QCA953X_EHCI_SIZE, +- ATH79_CPU_IRQ(3), +- &ath79_ehci_pdata_v2, sizeof(ath79_ehci_pdata_v2)); ++ ar9xxx_ci_usb_setup(-1, ATH79_CPU_IRQ(3)); + } + + static void qca955x_usb_reset_notifier(struct platform_device *pdev) +@@ -285,10 +317,7 @@ static void __init qca955x_usb_setup(voi { ath79_ehci_pdata_v2.reset_notifier = qca955x_usb_reset_notifier; @@ -126,7 +118,7 @@ - QCA955X_EHCI0_BASE, QCA955X_EHCI_SIZE, - ATH79_IP3_IRQ(0), - &ath79_ehci_pdata_v2, sizeof(ath79_ehci_pdata_v2)); -+ ar9xxx_ci_usb_setup(ATH79_IP3_IRQ(0)); ++ ar9xxx_ci_usb_setup(0, ATH79_IP3_IRQ(0)); ath79_usb_register("ehci-platform", 1, QCA955X_EHCI1_BASE, QCA955X_EHCI_SIZE,