From: Michael Pratt <mcpratt@pm.me>
Date: Sat, 21 Jan 2023 19:13:54 +0000 (-0500)
Subject: ath79: bump SPI frequency of Senao qca955x routers
X-Git-Url: http://git.lede-project.org./?a=commitdiff_plain;h=51982560a924bd9fe799d69d34013668bb2f694d;p=openwrt%2Fstaging%2Fstintel.git

ath79: bump SPI frequency of Senao qca955x routers

All boards using this DTSI are expected to have
the same 16 MB MX25L12845EMI-10G flash chip,
or a larger one which can also use 40 MHz frequency.

Signed-off-by: Michael Pratt <mcpratt@pm.me>
---

diff --git a/target/linux/ath79/dts/qca955x_senao_router-dual.dtsi b/target/linux/ath79/dts/qca955x_senao_router-dual.dtsi
index 20bea91e8d..e1b76bcbd1 100644
--- a/target/linux/ath79/dts/qca955x_senao_router-dual.dtsi
+++ b/target/linux/ath79/dts/qca955x_senao_router-dual.dtsi
@@ -55,7 +55,7 @@
 	flash@0 {
 		compatible = "jedec,spi-nor";
 		reg = <0>;
-		spi-max-frequency = <25000000>;
+		spi-max-frequency = <40000000>;
 
 		partitions {
 			compatible = "fixed-partitions";