From: Stefan Roese Date: Tue, 19 Jul 2016 05:45:46 +0000 (+0200) Subject: misc: Add simple driver for some Nuvoton NCT6102D devices X-Git-Url: http://git.lede-project.org./?a=commitdiff_plain;h=4cf9e464f78e58117b9a57e1e4e092e609d96b59;p=project%2Fbcm63xx%2Fu-boot.git misc: Add simple driver for some Nuvoton NCT6102D devices This simple driver provides some functions to control some of the integrated devices. The watchdog is enabled per default. This driver adds a function to disable the watchdog. Also the internal legacy UART (io address 0x3f8/0x2f8) is enabled per default. Signed-off-by: Stefan Roese Reviewed-by: Bin Meng Cc: Simon Glass --- diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig index 4af1cbf3d7..8990489835 100644 --- a/drivers/misc/Kconfig +++ b/drivers/misc/Kconfig @@ -90,6 +90,14 @@ config MXC_OCOTP Programmable memory pages that are stored on the some Freescale i.MX processors. +config NUVOTON_NCT6102D + bool "Enable Nuvoton NCT6102D Super I/O driver" + help + If you say Y here, you will get support for the Nuvoton + NCT6102D Super I/O driver. This can be used to enable or + disable the legacy UART, the watchdog or other devices + in the Nuvoton Super IO chips on X86 platforms. + config PWRSEQ bool "Enable power-sequencing drivers" depends on DM diff --git a/drivers/misc/Makefile b/drivers/misc/Makefile index dac9d1007a..c0e5f03f8c 100644 --- a/drivers/misc/Makefile +++ b/drivers/misc/Makefile @@ -24,6 +24,7 @@ obj-$(CONFIG_I2C_EEPROM) += i2c_eeprom.o obj-$(CONFIG_FSL_MC9SDZ60) += mc9sdz60.o obj-$(CONFIG_MXC_OCOTP) += mxc_ocotp.o obj-$(CONFIG_MXS_OCOTP) += mxs_ocotp.o +obj-$(CONFIG_NUVOTON_NCT6102D) += nuvoton_nct6102d.o obj-$(CONFIG_NS87308) += ns87308.o obj-$(CONFIG_PDSP188x) += pdsp188x.o obj-$(CONFIG_$(SPL_)PWRSEQ) += pwrseq-uclass.o diff --git a/drivers/misc/nuvoton_nct6102d.c b/drivers/misc/nuvoton_nct6102d.c new file mode 100644 index 0000000000..ced70f178b --- /dev/null +++ b/drivers/misc/nuvoton_nct6102d.c @@ -0,0 +1,56 @@ +/* + * Copyright (C) 2016 Stefan Roese + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include +#include +#include +#include + +static void superio_outb(int reg, int val) +{ + outb(reg, NCT_EFER); + outb(val, NCT_EFDR); +} + +static inline int superio_inb(int reg) +{ + outb(reg, NCT_EFER); + return inb(NCT_EFDR); +} + +static int superio_enter(void) +{ + outb(NCT_ENTRY_KEY, NCT_EFER); /* Enter extended function mode */ + outb(NCT_ENTRY_KEY, NCT_EFER); /* Again according to manual */ + + return 0; +} + +static void superio_select(int ld) +{ + superio_outb(NCT_LD_SELECT_REG, ld); +} + +static void superio_exit(void) +{ + outb(NCT_EXIT_KEY, NCT_EFER); /* Leave extended function mode */ +} + +/* + * The Nuvoton NCT6102D starts per default after reset with both, + * the internal watchdog and the internal legacy UART enabled. This + * code provides a function to disable the watchdog. + */ +int nct6102d_wdt_disable(void) +{ + superio_enter(); + /* Select logical device for WDT */ + superio_select(NCT6102D_LD_WDT); + superio_outb(NCT6102D_WDT_TIMEOUT, 0x00); + superio_exit(); + + return 0; +} diff --git a/include/nuvoton_nct6102d.h b/include/nuvoton_nct6102d.h new file mode 100644 index 0000000000..a122550a2c --- /dev/null +++ b/include/nuvoton_nct6102d.h @@ -0,0 +1,34 @@ +/* + * Copyright (C) 2016 Stefan Roese + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef _NUVOTON_NCT6102D_H_ +#define _NUVOTON_NCT6102D_H_ + +/* I/O address of Nuvoton Super IO chip */ +#define NCT6102D_IO_PORT 0x4e + +/* Extended Function Enable Registers */ +#define NCT_EFER (NCT6102D_IO_PORT + 0) +/* Extended Function Index Register (same as EFER) */ +#define NCT_EFIR (NCT6102D_IO_PORT + 0) +/* Extended Function Data Register */ +#define NCT_EFDR (NCT_EFIR + 1) + +#define NCT_LD_SELECT_REG 0x07 + +/* Logical device number */ +#define NCT6102D_LD_UARTA 0x02 +#define NCT6102D_LD_WDT 0x08 + +#define NCT6102D_UARTA_ENABLE 0x30 +#define NCT6102D_WDT_TIMEOUT 0xf1 + +#define NCT_ENTRY_KEY 0x87 +#define NCT_EXIT_KEY 0xaa + +int nct6102d_wdt_disable(void); + +#endif /* _NUVOTON_NCT6102D_H_ */