From: Florian Fainelli Date: Wed, 25 Mar 2009 09:15:30 +0000 (+0000) Subject: fix wrong logic in MDIO code and second PHY address X-Git-Url: http://git.lede-project.org./?a=commitdiff_plain;h=47a268b30a30c8163ad43b0204af9ef26d423290;p=openwrt%2Fstaging%2Fldir.git fix wrong logic in MDIO code and second PHY address SVN-Revision: 15034 --- diff --git a/target/linux/rdc/files/drivers/net/r6040.c b/target/linux/rdc/files/drivers/net/r6040.c index 33a7c12d67..0096006197 100644 --- a/target/linux/rdc/files/drivers/net/r6040.c +++ b/target/linux/rdc/files/drivers/net/r6040.c @@ -91,7 +91,7 @@ MODULE_PARM_DESC(debug, "debug mask (-1 for all)"); /* PHY CHIP Address */ #define PHY1_ADDR 1 /* For MAC1 */ -#define PHY2_ADDR 2 /* For MAC2 */ +#define PHY2_ADDR 3 /* For MAC2 */ #define PHY_MODE 0x3100 /* PHY CHIP Register 0 */ #define PHY_CAP 0x01E1 /* PHY CHIP Register 4 */ @@ -305,7 +305,7 @@ STATIC int phy_read(void __iomem *ioaddr, int phy_addr, int reg) /* Wait for the read bit to be cleared */ while (limit--) { cmd = ioread16(ioaddr + MMDIO); - if (cmd & MDIO_READ) + if (!(cmd & MDIO_READ)) break; } @@ -333,7 +333,7 @@ STATIC void phy_write(void __iomem *ioaddr, int phy_addr, int reg, u16 val) /* Wait for the write bit to be cleared */ while (limit--) { cmd = ioread16(ioaddr + MMDIO); - if (cmd & MDIO_WRITE) + if (!(cmd & MDIO_WRITE)) break; } if (limit <= 0)