From: Linus Torvalds <torvalds@linux-foundation.org>
Date: Thu, 6 Jan 2011 19:11:50 +0000 (-0800)
Subject: Merge branches 'x86-alternatives-for-linus', 'x86-fpu-for-linus', 'x86-hwmon-for... 
X-Git-Url: http://git.lede-project.org./?a=commitdiff_plain;h=47935a731b7b850a4c6c0e55ed0741e3dd25d889;p=openwrt%2Fstaging%2Fblogic.git

Merge branches 'x86-alternatives-for-linus', 'x86-fpu-for-linus', 'x86-hwmon-for-linus', 'x86-paravirt-for-linus', 'core-locking-for-linus' and 'irq-core-for-linus' of git://git./linux/kernel/git/tip/linux-2.6-tip

* 'x86-alternatives-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip:
  x86, suspend: Avoid unnecessary smp alternatives switch during suspend/resume

* 'x86-fpu-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip:
  x86-64, asm: Use fxsaveq/fxrestorq in more places

* 'x86-hwmon-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip:
  x86, hwmon: Add core threshold notification to therm_throt.c

* 'x86-paravirt-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip:
  x86, paravirt: Use native_halt on a halt, not native_safe_halt

* 'core-locking-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip:
  locking, lockdep: Convert sprintf_symbol to %pS

* 'irq-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip:
  irq: Better struct irqaction layout
---

47935a731b7b850a4c6c0e55ed0741e3dd25d889
diff --cc arch/x86/include/asm/msr-index.h
index 86030f63ba02,6b89f5e86021,986f7790fdb2,622c80b7dbee,6b89f5e86021,3ea3dc487047,3ea3dc487047..4d0dfa0d998e
--- a/arch/x86/include/asm/msr-index.h
+++ b/arch/x86/include/asm/msr-index.h
@@@@@@@@ -121,12 -121,8 -121,7 -121,8 -121,8 -121,8 -121,8 +121,12 @@@@@@@@
       #define MSR_AMD64_IBSDCLINAD		0xc0011038
       #define MSR_AMD64_IBSDCPHYSAD		0xc0011039
       #define MSR_AMD64_IBSCTL		0xc001103a
  +    #define MSR_AMD64_IBSBRTARGET		0xc001103b
  +    
 ++++++/* Fam 15h MSRs */
 ++++++#define MSR_F15H_PERF_CTL		0xc0010200
 ++++++#define MSR_F15H_PERF_CTR		0xc0010201
 + ++++
       /* Fam 10h MSRs */
       #define MSR_FAM10H_MMIO_CONF_BASE	0xc0010058
       #define FAM10H_MMIO_CONF_ENABLE		(1<<0)
diff --cc arch/x86/kernel/alternative.c
index 553d0b0d639b,9f98eb400fef,a36bb90aef53,5079f24c955a,5079f24c955a,5079f24c955a,5079f24c955a..123608531c8f
--- a/arch/x86/kernel/alternative.c
+++ b/arch/x86/kernel/alternative.c
@@@@@@@@ -653,33 -643,13 -642,9 -642,13 -642,13 -642,13 -642,13 +654,33 @@@@@@@@ void *__kprobes text_poke_smp(void *add
       	return addr;
       }
       
 ++++++/**
 ++++++ * text_poke_smp_batch - Update instructions on a live kernel on SMP
 ++++++ * @params: an array of text_poke parameters
 ++++++ * @n: the number of elements in params.
 ++++++ *
 ++++++ * Modify multi-byte instruction by using stop_machine() on SMP. Since the
 ++++++ * stop_machine() is heavy task, it is better to aggregate text_poke requests
 ++++++ * and do it once if possible.
 ++++++ *
 ++++++ * Note: Must be called under get_online_cpus() and text_mutex.
 ++++++ */
 ++++++void __kprobes text_poke_smp_batch(struct text_poke_param *params, int n)
 ++++++{
 ++++++	struct text_poke_params tpp = {.params = params, .nparams = n};
 ++++++
 ++++++	atomic_set(&stop_machine_first, 1);
 ++++++	wrote_text = 0;
 ++++++	stop_machine(stop_machine_text_poke, (void *)&tpp, NULL);
 ++++++}
 ++++++
       #if defined(CONFIG_DYNAMIC_FTRACE) || defined(HAVE_JUMP_LABEL)
       
  -    unsigned char ideal_nop5[IDEAL_NOP_SIZE_5];
  +    #ifdef CONFIG_X86_64
  +    unsigned char ideal_nop5[5] = { 0x66, 0x66, 0x66, 0x66, 0x90 };
  +    #else
  +    unsigned char ideal_nop5[5] = { 0x3e, 0x8d, 0x74, 0x26, 0x00 };
  +    #endif
       
       void __init arch_init_ideal_nop5(void)
       {