From: Pratyush Anand <pratyush.anand@st.com>
Date: Thu, 21 Jun 2012 12:14:28 +0000 (+0530)
Subject: USB: DWC3: Put 100 ms delay for phy to be stable
X-Git-Url: http://git.lede-project.org./?a=commitdiff_plain;h=45627ac6a4f063d19b0bd9863d20ac1dabda99a7;p=openwrt%2Fstaging%2Fblogic.git

USB: DWC3: Put 100 ms delay for phy to be stable

Before taking core out of reset phy must be stable. So wait for 100ms
after clear phy reset.

Signed-off-by: Pratyush Anand <pratyush.anand@st.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
---

diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c
index 49c060205c9a..ac151e9acf20 100644
--- a/drivers/usb/dwc3/core.c
+++ b/drivers/usb/dwc3/core.c
@@ -148,6 +148,8 @@ static void dwc3_core_soft_reset(struct dwc3 *dwc)
 	reg &= ~DWC3_GUSB2PHYCFG_PHYSOFTRST;
 	dwc3_writel(dwc->regs, DWC3_GUSB2PHYCFG(0), reg);
 
+	mdelay(100);
+
 	/* After PHYs are stable we can take Core out of reset state */
 	reg = dwc3_readl(dwc->regs, DWC3_GCTL);
 	reg &= ~DWC3_GCTL_CORESOFTRESET;