From: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
Date: Thu, 17 Apr 2008 14:35:13 +0000 (+0900)
Subject: Use jr as register jump instruction
X-Git-Url: http://git.lede-project.org./?a=commitdiff_plain;h=43c509254fab375c49936498da944658117ed07c;p=project%2Fbcm63xx%2Fu-boot.git

Use jr as register jump instruction

Current assembler codes are inconsistent in the way of register jump
instruction usage; some use jr, some use j. Of course GNU as allows both
usages, but as can be expected from `Jump Register' the mnemonic `jr' is
more intuitive than `j'. For example, Linux doesn't have `j <reg>' usage
at all.

Signed-off-by: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
---

diff --git a/board/dbau1x00/lowlevel_init.S b/board/dbau1x00/lowlevel_init.S
index 14a78465f3..27b51f73f0 100644
--- a/board/dbau1x00/lowlevel_init.S
+++ b/board/dbau1x00/lowlevel_init.S
@@ -586,5 +586,5 @@ noCacheJump:
 	sw	t1, 0(t0)
 	sync
 
-	j	ra
+	jr	ra
 	nop
diff --git a/board/gth2/lowlevel_init.S b/board/gth2/lowlevel_init.S
index eea378a3b6..bf615c1bb1 100644
--- a/board/gth2/lowlevel_init.S
+++ b/board/gth2/lowlevel_init.S
@@ -450,7 +450,7 @@ mtc:	sw	zero, 0(t0)
 	nop
 	nop
 memtestend:
-	j	ra
+	jr	ra
 	nop
 
 memhang:
diff --git a/board/incaip/lowlevel_init.S b/board/incaip/lowlevel_init.S
index b39f93d43f..08f7f211f7 100644
--- a/board/incaip/lowlevel_init.S
+++ b/board/incaip/lowlevel_init.S
@@ -105,7 +105,7 @@ __ebu_init:
 	li	t2, 0x684143FD
 	sw	t2, EBU_BUSCON1(t1)
 3:
-	j	ra
+	jr	ra
 	nop
 
 	.end	ebu_init
@@ -170,7 +170,7 @@ __cgu_init:
 	li	t2, 0x80000001
 	sw	t2, CGU_MUXCR(t1)
 5:
-	j	ra
+	jr	ra
 	nop
 
 	.end	cgu_init
@@ -266,7 +266,7 @@ __sdram_init:
 	li	t2, 0x00000001
 	sw	t2, MC_CTRLENA(t1)
 
-	j	ra
+	jr	ra
 	nop
 
 	.end	sdram_init
@@ -298,7 +298,7 @@ lowlevel_init:
 	nop
 	move	ra, t0
 
-	j	ra
+	jr	ra
 	nop
 
 	.end	lowlevel_init
diff --git a/board/pb1x00/lowlevel_init.S b/board/pb1x00/lowlevel_init.S
index e851e2fed0..98bb394acb 100644
--- a/board/pb1x00/lowlevel_init.S
+++ b/board/pb1x00/lowlevel_init.S
@@ -388,5 +388,5 @@ skip_memsetup:
 	*/
 	sync
 
-	j	ra
+	jr	ra
 	nop
diff --git a/board/purple/lowlevel_init.S b/board/purple/lowlevel_init.S
index 668124a784..b9d03fc15e 100644
--- a/board/purple/lowlevel_init.S
+++ b/board/purple/lowlevel_init.S
@@ -33,5 +33,5 @@ lowlevel_init:
 	li	t0, MC_IOGP
 	li	t1, 0xf24
 	sw	t1, 0(t0)
-	j	ra
+	jr	ra
 	nop
diff --git a/board/qemu-mips/lowlevel_init.S b/board/qemu-mips/lowlevel_init.S
index 28166bceba..836e0271a1 100644
--- a/board/qemu-mips/lowlevel_init.S
+++ b/board/qemu-mips/lowlevel_init.S
@@ -37,5 +37,5 @@ lowlevel_init:
 	mtc0	zero, CP0_WIRED
 	nop
 
-	j	ra
+	jr	ra
 	nop
diff --git a/cpu/mips/cache.S b/cpu/mips/cache.S
index 89ada716c3..f593968320 100644
--- a/cpu/mips/cache.S
+++ b/cpu/mips/cache.S
@@ -282,7 +282,7 @@ LEAF(dcache_disable)
 	and	t0, t0, t1
 	ori	t0, t0, CONF_CM_UNCACHED
 	mtc0	t0, CP0_CONFIG
-	j	ra
+	jr	ra
 	END(dcache_disable)
 
 #ifdef CFG_INIT_RAM_LOCK_MIPS
@@ -308,7 +308,7 @@ mips_cache_lock:
 	move	a1, a2
 	icacheop(a0,a1,a2,a3,0x1d)
 
-	j	ra
+	jr	ra
 
 	.end	mips_cache_lock
 #endif /* CFG_INIT_RAM_LOCK_MIPS */
diff --git a/cpu/mips/incaip_wdt.S b/cpu/mips/incaip_wdt.S
index 71adaa19de..2ebcc91139 100644
--- a/cpu/mips/incaip_wdt.S
+++ b/cpu/mips/incaip_wdt.S
@@ -68,5 +68,5 @@ disable_incaip_wdt:
 	li	t1, WD_WRITE_ENDINIT
 	sw	t1, WD_CON0(t0)		/* end command */
 
-	j	ra
+	jr	ra
 	nop
diff --git a/cpu/mips/start.S b/cpu/mips/start.S
index baac2ceaf0..6e1a78ceac 100644
--- a/cpu/mips/start.S
+++ b/cpu/mips/start.S
@@ -286,7 +286,7 @@ reset:
 	la	sp, 0(t0)
 
 	la	t9, board_init_f
-	j	t9
+	jr	t9
 	nop
 
 /*
@@ -342,7 +342,7 @@ relocate_code:
 	/* Jump to where we've relocated ourselves.
 	 */
 	addi	t0, a2, in_ram - _start
-	j	t0
+	jr	t0
 	nop
 
 	.gpword	_GLOBAL_OFFSET_TABLE_	/* _GLOBAL_OFFSET_TABLE_ - _gp	*/
@@ -387,7 +387,7 @@ in_ram:
 
 	move	a0, a1
 	la	t9, board_init_r
-	j	t9
+	jr	t9
 	move	a1, a2		/* delay slot			*/
 
 	.end	relocate_code