From: Catalin Marinas Date: Thu, 1 Jul 2010 12:22:48 +0000 (+0100) Subject: ARM: 6202/1: Do not ARM_DMA_MEM_BUFFERABLE on RealView boards with L210/L220 X-Git-Url: http://git.lede-project.org./?a=commitdiff_plain;h=42c4dafe803dcad82980fd8b0831a89032156f93;p=openwrt%2Fstaging%2Fblogic.git ARM: 6202/1: Do not ARM_DMA_MEM_BUFFERABLE on RealView boards with L210/L220 RealView boards with certain revisions of the L210/L220 cache controller may have issues (hardware deadlock) with the mandatory barriers (DSB followed by an L2 cache sync) when ARM_DMA_MEM_BUFFERABLE is enabled. The patch disables ARM_DMA_MEM_BUFFERABLE for these boards. Tested-by: Linus Walleij Signed-off-by: Catalin Marinas Signed-off-by: Russell King --- diff --git a/arch/arm/mm/Kconfig b/arch/arm/mm/Kconfig index fc1b2fa59429..101105e52610 100644 --- a/arch/arm/mm/Kconfig +++ b/arch/arm/mm/Kconfig @@ -813,6 +813,8 @@ config ARM_L1_CACHE_SHIFT config ARM_DMA_MEM_BUFFERABLE bool "Use non-cacheable memory for DMA" if CPU_V6 && !CPU_V7 + depends on !(MACH_REALVIEW_PB1176 || REALVIEW_EB_ARM11MP || \ + MACH_REALVIEW_PB11MP) default y if CPU_V6 || CPU_V7 help Historically, the kernel has used strongly ordered mappings to