From: Andrew Jiang Date: Wed, 11 Oct 2017 18:59:51 +0000 (-0400) Subject: drm/amd/display: Add chip mask to HDMI retimer/redriver check X-Git-Url: http://git.lede-project.org./?a=commitdiff_plain;h=3e5e22154acfd89810d37aa4b3fac14014eb7ca8;p=openwrt%2Fstaging%2Fblogic.git drm/amd/display: Add chip mask to HDMI retimer/redriver check There were cases where the chip caps held additional bits that led to the retimer/redriver check failing; use the proper mask to ensure that we have only the bits that we care about for the check in question. Signed-off-by: Andrew Jiang Reviewed-by: Charlene Liu Reviewed-by: Tony Cheng Acked-by: Harry Wentland Signed-off-by: Alex Deucher --- diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_link.c b/drivers/gpu/drm/amd/display/dc/core/dc_link.c index 72e56fbe4a42..004e0b0aad8a 100644 --- a/drivers/gpu/drm/amd/display/dc/core/dc_link.c +++ b/drivers/gpu/drm/amd/display/dc/core/dc_link.c @@ -45,6 +45,7 @@ #include "dce/dce_11_0_enum.h" #include "dce/dce_11_0_sh_mask.h" +#define EXT_DISPLAY_PATH_CAPS__EXT_CHIP_MASK 0x007C /* Copied from atombios.h */ #define LINK_INFO(...) \ dm_logger_write(dc_ctx->logger, LOG_HW_HOTPLUG, \ __VA_ARGS__) @@ -1345,7 +1346,6 @@ static bool get_ext_hdmi_settings(struct pipe_ctx *pipe_ctx, sizeof(integrated_info->dp2_ext_hdmi_6g_reg_settings)); result = true; break; - default: break; } @@ -1682,7 +1682,9 @@ static void enable_link_hdmi(struct pipe_ctx *pipe_ctx) is_over_340mhz = true; if (dc_is_hdmi_signal(pipe_ctx->stream->signal)) { - if ((pipe_ctx->stream->sink->link->chip_caps >> 2) == 0x2) { + unsigned short masked_chip_caps = pipe_ctx->stream->sink->link->chip_caps & + EXT_DISPLAY_PATH_CAPS__EXT_CHIP_MASK; + if (masked_chip_caps == (0x2 << 2)) { /* DP159, Retimer settings */ eng_id = pipe_ctx->stream_res.stream_enc->id; @@ -1693,7 +1695,7 @@ static void enable_link_hdmi(struct pipe_ctx *pipe_ctx) write_i2c_default_retimer_setting(pipe_ctx, is_vga_mode, is_over_340mhz); } - } else if ((pipe_ctx->stream->sink->link->chip_caps >> 2) == 0x1) { + } else if (masked_chip_caps == (0x1 << 2)) { /* PI3EQX1204, Redriver settings */ write_i2c_redriver_setting(pipe_ctx, is_over_340mhz); }