From: Daniel Golle Date: Thu, 13 Apr 2023 04:01:30 +0000 (+0100) Subject: mediatek: backport new pinctrl features X-Git-Url: http://git.lede-project.org./?a=commitdiff_plain;h=3cb2fddd300cbfe19b074261af99d4f817591648;p=openwrt%2Fstaging%2Fblogic.git mediatek: backport new pinctrl features Backport new features for MediaTek pinctrl/pinconf drivers from upstream. This will serve as the base to improve pinconf bias/pull-up/pull-down on MT7981 and MT7986, and also prepare for upcoming support for MT7988. Signed-off-by: Daniel Golle --- diff --git a/target/linux/mediatek/patches-5.15/820-v5.16-dt-bindings-pinctrl-mt8195-add-rsel-define.patch b/target/linux/mediatek/patches-5.15/820-v5.16-dt-bindings-pinctrl-mt8195-add-rsel-define.patch new file mode 100644 index 000000000000..f2be737146e1 --- /dev/null +++ b/target/linux/mediatek/patches-5.15/820-v5.16-dt-bindings-pinctrl-mt8195-add-rsel-define.patch @@ -0,0 +1,33 @@ +From 26564c44357e19d03c124550bbd0b5851e6638c2 Mon Sep 17 00:00:00 2001 +From: Zhiyong Tao +Date: Fri, 24 Sep 2021 16:06:28 +0800 +Subject: [PATCH] dt-bindings: pinctrl: mt8195: add rsel define + +This patch adds rsel define for mt8195. + +Signed-off-by: Zhiyong Tao +Acked-by: Rob Herring +Link: https://lore.kernel.org/r/20210924080632.28410-2-zhiyong.tao@mediatek.com +Signed-off-by: Linus Walleij +--- + include/dt-bindings/pinctrl/mt65xx.h | 9 +++++++++ + 1 file changed, 9 insertions(+) + +--- a/include/dt-bindings/pinctrl/mt65xx.h ++++ b/include/dt-bindings/pinctrl/mt65xx.h +@@ -16,6 +16,15 @@ + #define MTK_PUPD_SET_R1R0_10 102 + #define MTK_PUPD_SET_R1R0_11 103 + ++#define MTK_PULL_SET_RSEL_000 200 ++#define MTK_PULL_SET_RSEL_001 201 ++#define MTK_PULL_SET_RSEL_010 202 ++#define MTK_PULL_SET_RSEL_011 203 ++#define MTK_PULL_SET_RSEL_100 204 ++#define MTK_PULL_SET_RSEL_101 205 ++#define MTK_PULL_SET_RSEL_110 206 ++#define MTK_PULL_SET_RSEL_111 207 ++ + #define MTK_DRIVE_2mA 2 + #define MTK_DRIVE_4mA 4 + #define MTK_DRIVE_6mA 6 diff --git a/target/linux/mediatek/patches-5.15/821-v5.16-pinctrl-mediatek-moore-check-if-pin_desc-is-valid-be.patch b/target/linux/mediatek/patches-5.15/821-v5.16-pinctrl-mediatek-moore-check-if-pin_desc-is-valid-be.patch new file mode 100644 index 000000000000..aa9f879e3aa7 --- /dev/null +++ b/target/linux/mediatek/patches-5.15/821-v5.16-pinctrl-mediatek-moore-check-if-pin_desc-is-valid-be.patch @@ -0,0 +1,93 @@ +From d8b94c9ff96c2024a527086d850eb0b314337ff9 Mon Sep 17 00:00:00 2001 +From: Sam Shih +Date: Tue, 14 Sep 2021 16:51:32 +0800 +Subject: [PATCH] pinctrl: mediatek: moore: check if pin_desc is valid before + use + +Certain SoC are missing the middle part gpios in consecutive pins, +it's better to check if mtk_pin_desc is a valid pin for the extensibility + +Signed-off-by: Sam Shih +Acked-by: Sean Wang +Link: https://lore.kernel.org/r/20210914085137.31761-5-sam.shih@mediatek.com +Signed-off-by: Linus Walleij +--- + drivers/pinctrl/mediatek/pinctrl-moore.c | 18 ++++++++++++++++++ + 1 file changed, 18 insertions(+) + +--- a/drivers/pinctrl/mediatek/pinctrl-moore.c ++++ b/drivers/pinctrl/mediatek/pinctrl-moore.c +@@ -60,6 +60,8 @@ static int mtk_pinmux_set_mux(struct pin + int pin = grp->pins[i]; + + desc = (const struct mtk_pin_desc *)&hw->soc->pins[pin]; ++ if (!desc->name) ++ return -ENOTSUPP; + + mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_MODE, + pin_modes[i]); +@@ -76,6 +78,8 @@ static int mtk_pinmux_gpio_request_enabl + const struct mtk_pin_desc *desc; + + desc = (const struct mtk_pin_desc *)&hw->soc->pins[pin]; ++ if (!desc->name) ++ return -ENOTSUPP; + + return mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_MODE, + hw->soc->gpio_m); +@@ -89,6 +93,8 @@ static int mtk_pinmux_gpio_set_direction + const struct mtk_pin_desc *desc; + + desc = (const struct mtk_pin_desc *)&hw->soc->pins[pin]; ++ if (!desc->name) ++ return -ENOTSUPP; + + /* hardware would take 0 as input direction */ + return mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_DIR, !input); +@@ -103,6 +109,8 @@ static int mtk_pinconf_get(struct pinctr + const struct mtk_pin_desc *desc; + + desc = (const struct mtk_pin_desc *)&hw->soc->pins[pin]; ++ if (!desc->name) ++ return -ENOTSUPP; + + switch (param) { + case PIN_CONFIG_BIAS_DISABLE: +@@ -218,6 +226,8 @@ static int mtk_pinconf_set(struct pinctr + int cfg, err = 0; + + desc = (const struct mtk_pin_desc *)&hw->soc->pins[pin]; ++ if (!desc->name) ++ return -ENOTSUPP; + + for (cfg = 0; cfg < num_configs; cfg++) { + param = pinconf_to_config_param(configs[cfg]); +@@ -435,6 +445,8 @@ static int mtk_gpio_get(struct gpio_chip + int value, err; + + desc = (const struct mtk_pin_desc *)&hw->soc->pins[gpio]; ++ if (!desc->name) ++ return -ENOTSUPP; + + err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_DI, &value); + if (err) +@@ -449,6 +461,10 @@ static void mtk_gpio_set(struct gpio_chi + const struct mtk_pin_desc *desc; + + desc = (const struct mtk_pin_desc *)&hw->soc->pins[gpio]; ++ if (!desc->name) { ++ dev_err(hw->dev, "Failed to set gpio %d\n", gpio); ++ return; ++ } + + mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_DO, !!value); + } +@@ -490,6 +506,8 @@ static int mtk_gpio_set_config(struct gp + u32 debounce; + + desc = (const struct mtk_pin_desc *)&hw->soc->pins[offset]; ++ if (!desc->name) ++ return -ENOTSUPP; + + if (!hw->eint || + pinconf_to_config_param(config) != PIN_CONFIG_INPUT_DEBOUNCE || diff --git a/target/linux/mediatek/patches-5.15/822-v5.16-pinctrl-mediatek-support-rsel-feature.patch b/target/linux/mediatek/patches-5.15/822-v5.16-pinctrl-mediatek-support-rsel-feature.patch new file mode 100644 index 000000000000..0f5c0495feff --- /dev/null +++ b/target/linux/mediatek/patches-5.15/822-v5.16-pinctrl-mediatek-support-rsel-feature.patch @@ -0,0 +1,457 @@ +From fb34a9ae383ae26326d4889fd2513e49f1019b88 Mon Sep 17 00:00:00 2001 +From: Zhiyong Tao +Date: Fri, 24 Sep 2021 16:06:31 +0800 +Subject: [PATCH] pinctrl: mediatek: support rsel feature + +This patch supports rsel(resistance selection) feature for I2C pins. +It provides more resistance selection solution in different ICs. +It provides rsel define and si unit solution by identifying +"mediatek,rsel_resistance_in_si_unit" property in pio dtsi node. + +Signed-off-by: Zhiyong Tao +Reviewed-by: Chen-Yu Tsai +Link: https://lore.kernel.org/r/20210924080632.28410-5-zhiyong.tao@mediatek.com +Signed-off-by: Linus Walleij +--- + .../pinctrl/mediatek/pinctrl-mtk-common-v2.c | 231 +++++++++++++++--- + .../pinctrl/mediatek/pinctrl-mtk-common-v2.h | 46 ++++ + drivers/pinctrl/mediatek/pinctrl-paris.c | 60 +++-- + 3 files changed, 289 insertions(+), 48 deletions(-) + +--- a/drivers/pinctrl/mediatek/pinctrl-mtk-common-v2.c ++++ b/drivers/pinctrl/mediatek/pinctrl-mtk-common-v2.c +@@ -665,6 +665,181 @@ out: + return err; + } + ++static int mtk_hw_pin_rsel_lookup(struct mtk_pinctrl *hw, ++ const struct mtk_pin_desc *desc, ++ u32 pullup, u32 arg, u32 *rsel_val) ++{ ++ const struct mtk_pin_rsel *rsel; ++ int check; ++ bool found = false; ++ ++ rsel = hw->soc->pin_rsel; ++ ++ for (check = 0; check <= hw->soc->npin_rsel - 1; check++) { ++ if (desc->number >= rsel[check].s_pin && ++ desc->number <= rsel[check].e_pin) { ++ if (pullup) { ++ if (rsel[check].up_rsel == arg) { ++ found = true; ++ *rsel_val = rsel[check].rsel_index; ++ break; ++ } ++ } else { ++ if (rsel[check].down_rsel == arg) { ++ found = true; ++ *rsel_val = rsel[check].rsel_index; ++ break; ++ } ++ } ++ } ++ } ++ ++ if (!found) { ++ dev_err(hw->dev, "Not support rsel value %d Ohm for pin = %d (%s)\n", ++ arg, desc->number, desc->name); ++ return -ENOTSUPP; ++ } ++ ++ return 0; ++} ++ ++static int mtk_pinconf_bias_set_rsel(struct mtk_pinctrl *hw, ++ const struct mtk_pin_desc *desc, ++ u32 pullup, u32 arg) ++{ ++ int err, rsel_val; ++ ++ if (hw->rsel_si_unit) { ++ /* find pin rsel_index from pin_rsel array*/ ++ err = mtk_hw_pin_rsel_lookup(hw, desc, pullup, arg, &rsel_val); ++ if (err) ++ goto out; ++ } else { ++ if (arg < MTK_PULL_SET_RSEL_000 || ++ arg > MTK_PULL_SET_RSEL_111) { ++ err = -EINVAL; ++ goto out; ++ } ++ ++ rsel_val = arg - MTK_PULL_SET_RSEL_000; ++ } ++ ++ err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_RSEL, rsel_val); ++ if (err) ++ goto out; ++ ++ err = mtk_pinconf_bias_set_pu_pd(hw, desc, pullup, MTK_ENABLE); ++ ++out: ++ return err; ++} ++ ++int mtk_pinconf_bias_set_combo(struct mtk_pinctrl *hw, ++ const struct mtk_pin_desc *desc, ++ u32 pullup, u32 arg) ++{ ++ int err = -ENOTSUPP; ++ u32 try_all_type; ++ ++ if (hw->soc->pull_type) ++ try_all_type = hw->soc->pull_type[desc->number]; ++ else ++ try_all_type = MTK_PULL_TYPE_MASK; ++ ++ if (try_all_type & MTK_PULL_RSEL_TYPE) { ++ err = mtk_pinconf_bias_set_rsel(hw, desc, pullup, arg); ++ if (!err) ++ return err; ++ } ++ ++ if (try_all_type & MTK_PULL_PU_PD_TYPE) { ++ err = mtk_pinconf_bias_set_pu_pd(hw, desc, pullup, arg); ++ if (!err) ++ return err; ++ } ++ ++ if (try_all_type & MTK_PULL_PULLSEL_TYPE) { ++ err = mtk_pinconf_bias_set_pullsel_pullen(hw, desc, ++ pullup, arg); ++ if (!err) ++ return err; ++ } ++ ++ if (try_all_type & MTK_PULL_PUPD_R1R0_TYPE) ++ err = mtk_pinconf_bias_set_pupd_r1_r0(hw, desc, pullup, arg); ++ ++ if (err) ++ dev_err(hw->dev, "Invalid pull argument\n"); ++ ++ return err; ++} ++EXPORT_SYMBOL_GPL(mtk_pinconf_bias_set_combo); ++ ++static int mtk_rsel_get_si_unit(struct mtk_pinctrl *hw, ++ const struct mtk_pin_desc *desc, ++ u32 pullup, u32 rsel_val, u32 *si_unit) ++{ ++ const struct mtk_pin_rsel *rsel; ++ int check; ++ ++ rsel = hw->soc->pin_rsel; ++ ++ for (check = 0; check <= hw->soc->npin_rsel - 1; check++) { ++ if (desc->number >= rsel[check].s_pin && ++ desc->number <= rsel[check].e_pin) { ++ if (rsel_val == rsel[check].rsel_index) { ++ if (pullup) ++ *si_unit = rsel[check].up_rsel; ++ else ++ *si_unit = rsel[check].down_rsel; ++ break; ++ } ++ } ++ } ++ ++ return 0; ++} ++ ++static int mtk_pinconf_bias_get_rsel(struct mtk_pinctrl *hw, ++ const struct mtk_pin_desc *desc, ++ u32 *pullup, u32 *enable) ++{ ++ int pu, pd, rsel, err; ++ ++ err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_RSEL, &rsel); ++ if (err) ++ goto out; ++ ++ err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_PU, &pu); ++ if (err) ++ goto out; ++ ++ err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_PD, &pd); ++ ++ if (pu == 0 && pd == 0) { ++ *pullup = 0; ++ *enable = MTK_DISABLE; ++ } else if (pu == 1 && pd == 0) { ++ *pullup = 1; ++ if (hw->rsel_si_unit) ++ mtk_rsel_get_si_unit(hw, desc, *pullup, rsel, enable); ++ else ++ *enable = rsel + MTK_PULL_SET_RSEL_000; ++ } else if (pu == 0 && pd == 1) { ++ *pullup = 0; ++ if (hw->rsel_si_unit) ++ mtk_rsel_get_si_unit(hw, desc, *pullup, rsel, enable); ++ else ++ *enable = rsel + MTK_PULL_SET_RSEL_000; ++ } else { ++ err = -EINVAL; ++ goto out; ++ } ++ ++out: ++ return err; ++} ++ + static int mtk_pinconf_bias_get_pu_pd(struct mtk_pinctrl *hw, + const struct mtk_pin_desc *desc, + u32 *pullup, u32 *enable) +@@ -746,44 +921,40 @@ out: + return err; + } + +-int mtk_pinconf_bias_set_combo(struct mtk_pinctrl *hw, +- const struct mtk_pin_desc *desc, +- u32 pullup, u32 arg) +-{ +- int err; +- +- err = mtk_pinconf_bias_set_pu_pd(hw, desc, pullup, arg); +- if (!err) +- goto out; +- +- err = mtk_pinconf_bias_set_pullsel_pullen(hw, desc, pullup, arg); +- if (!err) +- goto out; +- +- err = mtk_pinconf_bias_set_pupd_r1_r0(hw, desc, pullup, arg); +- +-out: +- return err; +-} +-EXPORT_SYMBOL_GPL(mtk_pinconf_bias_set_combo); +- + int mtk_pinconf_bias_get_combo(struct mtk_pinctrl *hw, + const struct mtk_pin_desc *desc, + u32 *pullup, u32 *enable) + { +- int err; ++ int err = -ENOTSUPP; ++ u32 try_all_type; + +- err = mtk_pinconf_bias_get_pu_pd(hw, desc, pullup, enable); +- if (!err) +- goto out; ++ if (hw->soc->pull_type) ++ try_all_type = hw->soc->pull_type[desc->number]; ++ else ++ try_all_type = MTK_PULL_TYPE_MASK; + +- err = mtk_pinconf_bias_get_pullsel_pullen(hw, desc, pullup, enable); +- if (!err) +- goto out; ++ if (try_all_type & MTK_PULL_RSEL_TYPE) { ++ err = mtk_pinconf_bias_get_rsel(hw, desc, pullup, enable); ++ if (!err) ++ return err; ++ } ++ ++ if (try_all_type & MTK_PULL_PU_PD_TYPE) { ++ err = mtk_pinconf_bias_get_pu_pd(hw, desc, pullup, enable); ++ if (!err) ++ return err; ++ } ++ ++ if (try_all_type & MTK_PULL_PULLSEL_TYPE) { ++ err = mtk_pinconf_bias_get_pullsel_pullen(hw, desc, ++ pullup, enable); ++ if (!err) ++ return err; ++ } + +- err = mtk_pinconf_bias_get_pupd_r1_r0(hw, desc, pullup, enable); ++ if (try_all_type & MTK_PULL_PUPD_R1R0_TYPE) ++ err = mtk_pinconf_bias_get_pupd_r1_r0(hw, desc, pullup, enable); + +-out: + return err; + } + EXPORT_SYMBOL_GPL(mtk_pinconf_bias_get_combo); +--- a/drivers/pinctrl/mediatek/pinctrl-mtk-common-v2.h ++++ b/drivers/pinctrl/mediatek/pinctrl-mtk-common-v2.h +@@ -17,6 +17,22 @@ + #define MTK_ENABLE 1 + #define MTK_PULLDOWN 0 + #define MTK_PULLUP 1 ++#define MTK_PULL_PU_PD_TYPE BIT(0) ++#define MTK_PULL_PULLSEL_TYPE BIT(1) ++#define MTK_PULL_PUPD_R1R0_TYPE BIT(2) ++/* MTK_PULL_RSEL_TYPE can select resistance and can be ++ * turned on/off itself. But it can't be selected pull up/down ++ */ ++#define MTK_PULL_RSEL_TYPE BIT(3) ++/* MTK_PULL_PU_PD_RSEL_TYPE is a type which is controlled by ++ * MTK_PULL_PU_PD_TYPE and MTK_PULL_RSEL_TYPE. ++ */ ++#define MTK_PULL_PU_PD_RSEL_TYPE (MTK_PULL_PU_PD_TYPE \ ++ | MTK_PULL_RSEL_TYPE) ++#define MTK_PULL_TYPE_MASK (MTK_PULL_PU_PD_TYPE |\ ++ MTK_PULL_PULLSEL_TYPE |\ ++ MTK_PULL_PUPD_R1R0_TYPE |\ ++ MTK_PULL_RSEL_TYPE) + + #define EINT_NA U16_MAX + #define NO_EINT_SUPPORT EINT_NA +@@ -42,6 +58,14 @@ + PIN_FIELD_CALC(_s_pin, _e_pin, 0, _s_addr, _x_addrs, _s_bit, \ + _x_bits, 32, 1) + ++#define PIN_RSEL(_s_pin, _e_pin, _rsel_index, _up_resl, _down_rsel) { \ ++ .s_pin = _s_pin, \ ++ .e_pin = _e_pin, \ ++ .rsel_index = _rsel_index, \ ++ .up_rsel = _up_resl, \ ++ .down_rsel = _down_rsel, \ ++ } ++ + /* List these attributes which could be modified for the pin */ + enum { + PINCTRL_PIN_REG_MODE, +@@ -67,6 +91,7 @@ enum { + PINCTRL_PIN_REG_DRV_E0, + PINCTRL_PIN_REG_DRV_E1, + PINCTRL_PIN_REG_DRV_ADV, ++ PINCTRL_PIN_REG_RSEL, + PINCTRL_PIN_REG_MAX, + }; + +@@ -129,6 +154,22 @@ struct mtk_pin_field_calc { + u8 fixed; + }; + ++/** ++ * struct mtk_pin_rsel - the structure that provides bias resistance selection. ++ * @s_pin: the start pin within the rsel range ++ * @e_pin: the end pin within the rsel range ++ * @rsel_index: the rsel bias resistance index ++ * @up_rsel: the pullup rsel bias resistance value ++ * @down_rsel: the pulldown rsel bias resistance value ++ */ ++struct mtk_pin_rsel { ++ u16 s_pin; ++ u16 e_pin; ++ u16 rsel_index; ++ u32 up_rsel; ++ u32 down_rsel; ++}; ++ + /* struct mtk_pin_reg_calc - the structure that holds all ranges used to + * determine which register the pin would make use of + * for certain pin attribute. +@@ -206,6 +247,9 @@ struct mtk_pin_soc { + bool ies_present; + const char * const *base_names; + unsigned int nbase_names; ++ const unsigned int *pull_type; ++ const struct mtk_pin_rsel *pin_rsel; ++ unsigned int npin_rsel; + + /* Specific pinconfig operations */ + int (*bias_disable_set)(struct mtk_pinctrl *hw, +@@ -254,6 +298,8 @@ struct mtk_pinctrl { + const char **grp_names; + /* lock pin's register resource to avoid multiple threads issue*/ + spinlock_t lock; ++ /* identify rsel setting by si unit or rsel define in dts node */ ++ bool rsel_si_unit; + }; + + void mtk_rmw(struct mtk_pinctrl *pctl, u8 i, u32 reg, u32 mask, u32 set); +--- a/drivers/pinctrl/mediatek/pinctrl-paris.c ++++ b/drivers/pinctrl/mediatek/pinctrl-paris.c +@@ -574,8 +574,9 @@ static int mtk_hw_get_value_wrap(struct + ssize_t mtk_pctrl_show_one_pin(struct mtk_pinctrl *hw, + unsigned int gpio, char *buf, unsigned int buf_len) + { +- int pinmux, pullup = 0, pullen = 0, len = 0, r1 = -1, r0 = -1; ++ int pinmux, pullup = 0, pullen = 0, len = 0, r1 = -1, r0 = -1, rsel = -1; + const struct mtk_pin_desc *desc; ++ u32 try_all_type; + + if (gpio >= hw->soc->npins) + return -EINVAL; +@@ -589,24 +590,39 @@ ssize_t mtk_pctrl_show_one_pin(struct mt + pinmux -= hw->soc->nfuncs; + + mtk_pinconf_bias_get_combo(hw, desc, &pullup, &pullen); +- if (pullen == MTK_PUPD_SET_R1R0_00) { +- pullen = 0; +- r1 = 0; +- r0 = 0; +- } else if (pullen == MTK_PUPD_SET_R1R0_01) { +- pullen = 1; +- r1 = 0; +- r0 = 1; +- } else if (pullen == MTK_PUPD_SET_R1R0_10) { +- pullen = 1; +- r1 = 1; +- r0 = 0; +- } else if (pullen == MTK_PUPD_SET_R1R0_11) { ++ ++ if (hw->soc->pull_type) ++ try_all_type = hw->soc->pull_type[desc->number]; ++ ++ if (hw->rsel_si_unit && (try_all_type & MTK_PULL_RSEL_TYPE)) { ++ rsel = pullen; + pullen = 1; +- r1 = 1; +- r0 = 1; +- } else if (pullen != MTK_DISABLE && pullen != MTK_ENABLE) { +- pullen = 0; ++ } else { ++ /* Case for: R1R0 */ ++ if (pullen == MTK_PUPD_SET_R1R0_00) { ++ pullen = 0; ++ r1 = 0; ++ r0 = 0; ++ } else if (pullen == MTK_PUPD_SET_R1R0_01) { ++ pullen = 1; ++ r1 = 0; ++ r0 = 1; ++ } else if (pullen == MTK_PUPD_SET_R1R0_10) { ++ pullen = 1; ++ r1 = 1; ++ r0 = 0; ++ } else if (pullen == MTK_PUPD_SET_R1R0_11) { ++ pullen = 1; ++ r1 = 1; ++ r0 = 1; ++ } ++ ++ /* Case for: RSEL */ ++ if (pullen >= MTK_PULL_SET_RSEL_000 && ++ pullen <= MTK_PULL_SET_RSEL_111) { ++ rsel = pullen - MTK_PULL_SET_RSEL_000; ++ pullen = 1; ++ } + } + len += scnprintf(buf + len, buf_len - len, + "%03d: %1d%1d%1d%1d%02d%1d%1d%1d%1d", +@@ -624,6 +640,8 @@ ssize_t mtk_pctrl_show_one_pin(struct mt + if (r1 != -1) { + len += scnprintf(buf + len, buf_len - len, " (%1d %1d)\n", + r1, r0); ++ } else if (rsel != -1) { ++ len += scnprintf(buf + len, buf_len - len, " (%1d)\n", rsel); + } else { + len += scnprintf(buf + len, buf_len - len, "\n"); + } +@@ -966,6 +984,12 @@ int mtk_paris_pinctrl_probe(struct platf + + hw->nbase = hw->soc->nbase_names; + ++ if (of_find_property(hw->dev->of_node, ++ "mediatek,rsel_resistance_in_si_unit", NULL)) ++ hw->rsel_si_unit = true; ++ else ++ hw->rsel_si_unit = false; ++ + spin_lock_init(&hw->lock); + + err = mtk_pctrl_build_state(pdev); diff --git a/target/linux/mediatek/patches-5.15/823-v5.17-pinctrl-mediatek-add-a-check-for-error-in-mtk_pincon.patch b/target/linux/mediatek/patches-5.15/823-v5.17-pinctrl-mediatek-add-a-check-for-error-in-mtk_pincon.patch new file mode 100644 index 000000000000..6752b4093b41 --- /dev/null +++ b/target/linux/mediatek/patches-5.15/823-v5.17-pinctrl-mediatek-add-a-check-for-error-in-mtk_pincon.patch @@ -0,0 +1,31 @@ +From 9f9d17c228c89e38ed612500126daf626270be9a Mon Sep 17 00:00:00 2001 +From: Dan Carpenter +Date: Sat, 27 Nov 2021 17:08:36 +0300 +Subject: [PATCH] pinctrl: mediatek: add a check for error in + mtk_pinconf_bias_get_rsel() + +All the other mtk_hw_get_value() calls have a check for "if (err)" so +we can add one here as well. This silences a Smatch warning: + + drivers/pinctrl/mediatek/pinctrl-mtk-common-v2.c:819 mtk_pinconf_bias_get_rsel() + error: uninitialized symbol 'pd'. + +Fixes: fb34a9ae383a ("pinctrl: mediatek: support rsel feature") +Signed-off-by: Dan Carpenter +Link: https://lore.kernel.org/r/20211127140836.GB24002@kili +Signed-off-by: Linus Walleij +--- + drivers/pinctrl/mediatek/pinctrl-mtk-common-v2.c | 2 ++ + 1 file changed, 2 insertions(+) + +--- a/drivers/pinctrl/mediatek/pinctrl-mtk-common-v2.c ++++ b/drivers/pinctrl/mediatek/pinctrl-mtk-common-v2.c +@@ -815,6 +815,8 @@ static int mtk_pinconf_bias_get_rsel(str + goto out; + + err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_PD, &pd); ++ if (err) ++ goto out; + + if (pu == 0 && pd == 0) { + *pullup = 0; diff --git a/target/linux/mediatek/patches-5.15/824-v6.1-pinctrl-mediatek-Fix-EINT-pins-input-debounce-time-c.patch b/target/linux/mediatek/patches-5.15/824-v6.1-pinctrl-mediatek-Fix-EINT-pins-input-debounce-time-c.patch new file mode 100644 index 000000000000..47a29fbdba44 --- /dev/null +++ b/target/linux/mediatek/patches-5.15/824-v6.1-pinctrl-mediatek-Fix-EINT-pins-input-debounce-time-c.patch @@ -0,0 +1,297 @@ +From e1ff91f9d2303cd4e706cc908bfca21cd17b9927 Mon Sep 17 00:00:00 2001 +From: AngeloGioacchino Del Regno +Date: Fri, 11 Nov 2022 10:41:06 +0100 +Subject: [PATCH] pinctrl: mediatek: Fix EINT pins input debounce time + configuration + +The External Interrupt Controller (EINTC) on all of the supported +MediaTek SoCs does support input debouncing, but not all of them +index the debounce time values (DBNC_SETTING registers) the same way. + +Before this change, in some cases, as an example, requesting a debounce +time of 16 milliseconds would mistakenly set the relative DBNC_SETTING +register to 0x2, resulting in a way shorter debounce time of 500uS. + +To fix the aforementioned issue, define three different debounce_time +arrays, reflecting the correct register index for each value and for +each register index variant, and make sure that each SoC pinctrl +driver uses the right one. + +Signed-off-by: AngeloGioacchino Del Regno +Link: https://lore.kernel.org/r/20221111094106.18486-1-angelogioacchino.delregno@collabora.com +Signed-off-by: Linus Walleij +--- + drivers/pinctrl/mediatek/mtk-eint.c | 31 +++++++++++++++++++---- + drivers/pinctrl/mediatek/mtk-eint.h | 6 +++++ + drivers/pinctrl/mediatek/pinctrl-mt2701.c | 1 + + drivers/pinctrl/mediatek/pinctrl-mt2712.c | 1 + + drivers/pinctrl/mediatek/pinctrl-mt6765.c | 1 + + drivers/pinctrl/mediatek/pinctrl-mt6779.c | 1 + + drivers/pinctrl/mediatek/pinctrl-mt7622.c | 1 + + drivers/pinctrl/mediatek/pinctrl-mt7623.c | 1 + + drivers/pinctrl/mediatek/pinctrl-mt7629.c | 1 + + drivers/pinctrl/mediatek/pinctrl-mt8127.c | 1 + + drivers/pinctrl/mediatek/pinctrl-mt8135.c | 1 + + drivers/pinctrl/mediatek/pinctrl-mt8167.c | 1 + + drivers/pinctrl/mediatek/pinctrl-mt8173.c | 1 + + drivers/pinctrl/mediatek/pinctrl-mt8183.c | 1 + + drivers/pinctrl/mediatek/pinctrl-mt8192.c | 1 + + drivers/pinctrl/mediatek/pinctrl-mt8195.c | 1 + + drivers/pinctrl/mediatek/pinctrl-mt8365.c | 1 + + drivers/pinctrl/mediatek/pinctrl-mt8516.c | 1 + + 22 files changed, 53 insertions(+), 5 deletions(-) + +--- a/drivers/pinctrl/mediatek/mtk-eint.c ++++ b/drivers/pinctrl/mediatek/mtk-eint.c +@@ -24,6 +24,7 @@ + #define MTK_EINT_EDGE_SENSITIVE 0 + #define MTK_EINT_LEVEL_SENSITIVE 1 + #define MTK_EINT_DBNC_SET_DBNC_BITS 4 ++#define MTK_EINT_DBNC_MAX 16 + #define MTK_EINT_DBNC_RST_BIT (0x1 << 1) + #define MTK_EINT_DBNC_SET_EN (0x1 << 0) + +@@ -48,6 +49,18 @@ static const struct mtk_eint_regs mtk_ge + .dbnc_clr = 0x700, + }; + ++const unsigned int debounce_time_mt2701[] = { ++ 500, 1000, 16000, 32000, 64000, 128000, 256000, 0 ++}; ++ ++const unsigned int debounce_time_mt6765[] = { ++ 125, 250, 500, 1000, 16000, 32000, 64000, 128000, 256000, 512000, 0 ++}; ++ ++const unsigned int debounce_time_mt6795[] = { ++ 500, 1000, 16000, 32000, 64000, 128000, 256000, 512000, 0 ++}; ++ + static void __iomem *mtk_eint_get_offset(struct mtk_eint *eint, + unsigned int eint_num, + unsigned int offset) +@@ -407,10 +420,11 @@ int mtk_eint_set_debounce(struct mtk_ein + int virq, eint_offset; + unsigned int set_offset, bit, clr_bit, clr_offset, rst, i, unmask, + dbnc; +- static const unsigned int debounce_time[] = {500, 1000, 16000, 32000, +- 64000, 128000, 256000}; + struct irq_data *d; + ++ if (!eint->hw->db_time) ++ return -EOPNOTSUPP; ++ + virq = irq_find_mapping(eint->domain, eint_num); + eint_offset = (eint_num % 4) * 8; + d = irq_get_irq_data(virq); +@@ -421,9 +435,9 @@ int mtk_eint_set_debounce(struct mtk_ein + if (!mtk_eint_can_en_debounce(eint, eint_num)) + return -EINVAL; + +- dbnc = ARRAY_SIZE(debounce_time); +- for (i = 0; i < ARRAY_SIZE(debounce_time); i++) { +- if (debounce <= debounce_time[i]) { ++ dbnc = eint->num_db_time; ++ for (i = 0; i < eint->num_db_time; i++) { ++ if (debounce <= eint->hw->db_time[i]) { + dbnc = i; + break; + } +@@ -497,6 +511,13 @@ int mtk_eint_do_init(struct mtk_eint *ei + if (!eint->domain) + return -ENOMEM; + ++ if (eint->hw->db_time) { ++ for (i = 0; i < MTK_EINT_DBNC_MAX; i++) ++ if (eint->hw->db_time[i] == 0) ++ break; ++ eint->num_db_time = i; ++ } ++ + mtk_eint_hw_init(eint); + for (i = 0; i < eint->hw->ap_num; i++) { + int virq = irq_create_mapping(eint->domain, i); +--- a/drivers/pinctrl/mediatek/mtk-eint.h ++++ b/drivers/pinctrl/mediatek/mtk-eint.h +@@ -37,8 +37,13 @@ struct mtk_eint_hw { + u8 ports; + unsigned int ap_num; + unsigned int db_cnt; ++ const unsigned int *db_time; + }; + ++extern const unsigned int debounce_time_mt2701[]; ++extern const unsigned int debounce_time_mt6765[]; ++extern const unsigned int debounce_time_mt6795[]; ++ + struct mtk_eint; + + struct mtk_eint_xt { +@@ -62,6 +67,7 @@ struct mtk_eint { + /* Used to fit into various EINT device */ + const struct mtk_eint_hw *hw; + const struct mtk_eint_regs *regs; ++ u16 num_db_time; + + /* Used to fit into various pinctrl device */ + void *pctl; +--- a/drivers/pinctrl/mediatek/pinctrl-mt2701.c ++++ b/drivers/pinctrl/mediatek/pinctrl-mt2701.c +@@ -531,6 +531,7 @@ static const struct mtk_pinctrl_devdata + .ports = 6, + .ap_num = 169, + .db_cnt = 16, ++ .db_time = debounce_time_mt2701, + }, + }; + +--- a/drivers/pinctrl/mediatek/pinctrl-mt2712.c ++++ b/drivers/pinctrl/mediatek/pinctrl-mt2712.c +@@ -584,6 +584,7 @@ static const struct mtk_pinctrl_devdata + .ports = 8, + .ap_num = 229, + .db_cnt = 40, ++ .db_time = debounce_time_mt2701, + }, + }; + +--- a/drivers/pinctrl/mediatek/pinctrl-mt6765.c ++++ b/drivers/pinctrl/mediatek/pinctrl-mt6765.c +@@ -1062,6 +1062,7 @@ static const struct mtk_eint_hw mt6765_e + .ports = 6, + .ap_num = 160, + .db_cnt = 13, ++ .db_time = debounce_time_mt6765, + }; + + static const struct mtk_pin_soc mt6765_data = { +--- a/drivers/pinctrl/mediatek/pinctrl-mt6779.c ++++ b/drivers/pinctrl/mediatek/pinctrl-mt6779.c +@@ -737,6 +737,7 @@ static const struct mtk_eint_hw mt6779_e + .ports = 6, + .ap_num = 195, + .db_cnt = 13, ++ .db_time = debounce_time_mt2701, + }; + + static const struct mtk_pin_soc mt6779_data = { +--- a/drivers/pinctrl/mediatek/pinctrl-mt7622.c ++++ b/drivers/pinctrl/mediatek/pinctrl-mt7622.c +@@ -846,6 +846,7 @@ static const struct mtk_eint_hw mt7622_e + .ports = 7, + .ap_num = ARRAY_SIZE(mt7622_pins), + .db_cnt = 20, ++ .db_time = debounce_time_mt6765, + }; + + static const struct mtk_pin_soc mt7622_data = { +--- a/drivers/pinctrl/mediatek/pinctrl-mt7623.c ++++ b/drivers/pinctrl/mediatek/pinctrl-mt7623.c +@@ -1369,6 +1369,7 @@ static const struct mtk_eint_hw mt7623_e + .ports = 6, + .ap_num = 169, + .db_cnt = 20, ++ .db_time = debounce_time_mt2701, + }; + + static struct mtk_pin_soc mt7623_data = { +--- a/drivers/pinctrl/mediatek/pinctrl-mt7629.c ++++ b/drivers/pinctrl/mediatek/pinctrl-mt7629.c +@@ -402,6 +402,7 @@ static const struct mtk_eint_hw mt7629_e + .ports = 7, + .ap_num = ARRAY_SIZE(mt7629_pins), + .db_cnt = 16, ++ .db_time = debounce_time_mt2701, + }; + + static struct mtk_pin_soc mt7629_data = { +--- a/drivers/pinctrl/mediatek/pinctrl-mt8127.c ++++ b/drivers/pinctrl/mediatek/pinctrl-mt8127.c +@@ -300,6 +300,7 @@ static const struct mtk_pinctrl_devdata + .ports = 6, + .ap_num = 143, + .db_cnt = 16, ++ .db_time = debounce_time_mt2701, + }, + }; + +--- a/drivers/pinctrl/mediatek/pinctrl-mt8135.c ++++ b/drivers/pinctrl/mediatek/pinctrl-mt8135.c +@@ -313,6 +313,7 @@ static const struct mtk_pinctrl_devdata + .ports = 6, + .ap_num = 192, + .db_cnt = 16, ++ .db_time = debounce_time_mt2701, + }, + }; + +--- a/drivers/pinctrl/mediatek/pinctrl-mt8167.c ++++ b/drivers/pinctrl/mediatek/pinctrl-mt8167.c +@@ -332,6 +332,7 @@ static const struct mtk_pinctrl_devdata + .ports = 6, + .ap_num = 169, + .db_cnt = 64, ++ .db_time = debounce_time_mt6795, + }, + }; + +--- a/drivers/pinctrl/mediatek/pinctrl-mt8173.c ++++ b/drivers/pinctrl/mediatek/pinctrl-mt8173.c +@@ -340,6 +340,7 @@ static const struct mtk_pinctrl_devdata + .ports = 6, + .ap_num = 224, + .db_cnt = 16, ++ .db_time = debounce_time_mt2701, + }, + }; + +--- a/drivers/pinctrl/mediatek/pinctrl-mt8183.c ++++ b/drivers/pinctrl/mediatek/pinctrl-mt8183.c +@@ -545,6 +545,7 @@ static const struct mtk_eint_hw mt8183_e + .ports = 6, + .ap_num = 212, + .db_cnt = 13, ++ .db_time = debounce_time_mt6765, + }; + + static const struct mtk_pin_soc mt8183_data = { +--- a/drivers/pinctrl/mediatek/pinctrl-mt8192.c ++++ b/drivers/pinctrl/mediatek/pinctrl-mt8192.c +@@ -1339,6 +1339,7 @@ static const struct mtk_eint_hw mt8192_e + .ports = 7, + .ap_num = 224, + .db_cnt = 32, ++ .db_time = debounce_time_mt6765, + }; + + static const struct mtk_pin_reg_calc mt8192_reg_cals[PINCTRL_PIN_REG_MAX] = { +--- a/drivers/pinctrl/mediatek/pinctrl-mt8195.c ++++ b/drivers/pinctrl/mediatek/pinctrl-mt8195.c +@@ -805,6 +805,7 @@ static const struct mtk_eint_hw mt8195_e + .ports = 7, + .ap_num = 225, + .db_cnt = 32, ++ .db_time = debounce_time_mt6765, + }; + + static const struct mtk_pin_soc mt8195_data = { +--- a/drivers/pinctrl/mediatek/pinctrl-mt8365.c ++++ b/drivers/pinctrl/mediatek/pinctrl-mt8365.c +@@ -466,6 +466,7 @@ static const struct mtk_pinctrl_devdata + .ports = 5, + .ap_num = 160, + .db_cnt = 160, ++ .db_time = debounce_time_mt6765, + }, + }; + +--- a/drivers/pinctrl/mediatek/pinctrl-mt8516.c ++++ b/drivers/pinctrl/mediatek/pinctrl-mt8516.c +@@ -332,6 +332,7 @@ static const struct mtk_pinctrl_devdata + .ports = 6, + .ap_num = 169, + .db_cnt = 64, ++ .db_time = debounce_time_mt6795, + }, + }; + diff --git a/target/linux/mediatek/patches-5.15/825-v6.1-pinctrl-mediatek-Export-debounce-time-tables.patch b/target/linux/mediatek/patches-5.15/825-v6.1-pinctrl-mediatek-Export-debounce-time-tables.patch new file mode 100644 index 000000000000..92f4e842e8ac --- /dev/null +++ b/target/linux/mediatek/patches-5.15/825-v6.1-pinctrl-mediatek-Export-debounce-time-tables.patch @@ -0,0 +1,37 @@ +From 2e35b25dd8e666b8619355fc3defb1b246a5dc02 Mon Sep 17 00:00:00 2001 +From: Linus Walleij +Date: Tue, 15 Nov 2022 09:11:07 +0100 +Subject: [PATCH] pinctrl: mediatek: Export debounce time tables + +The kernel test robot complains that in certain combinations +when building the Mediatek drivers as modules we lack some +debounce table symbols, so export them. + +Reported-by: kernel test robot +Fixes: e1ff91f9d230 ("pinctrl: mediatek: Fix EINT pins input debounce time configuration") +Cc: AngeloGioacchino Del Regno +Signed-off-by: Linus Walleij +--- + drivers/pinctrl/mediatek/mtk-eint.c | 3 +++ + 1 file changed, 3 insertions(+) + +--- a/drivers/pinctrl/mediatek/mtk-eint.c ++++ b/drivers/pinctrl/mediatek/mtk-eint.c +@@ -52,14 +52,17 @@ static const struct mtk_eint_regs mtk_ge + const unsigned int debounce_time_mt2701[] = { + 500, 1000, 16000, 32000, 64000, 128000, 256000, 0 + }; ++EXPORT_SYMBOL_GPL(debounce_time_mt2701); + + const unsigned int debounce_time_mt6765[] = { + 125, 250, 500, 1000, 16000, 32000, 64000, 128000, 256000, 512000, 0 + }; ++EXPORT_SYMBOL_GPL(debounce_time_mt6765); + + const unsigned int debounce_time_mt6795[] = { + 500, 1000, 16000, 32000, 64000, 128000, 256000, 512000, 0 + }; ++EXPORT_SYMBOL_GPL(debounce_time_mt6795); + + static void __iomem *mtk_eint_get_offset(struct mtk_eint *eint, + unsigned int eint_num, diff --git a/target/linux/mediatek/patches-5.15/826-v6.2-pinctrl-mediatek-extend-pinctrl-moore-to-support-new.patch b/target/linux/mediatek/patches-5.15/826-v6.2-pinctrl-mediatek-extend-pinctrl-moore-to-support-new.patch new file mode 100644 index 000000000000..f130fdbc5669 --- /dev/null +++ b/target/linux/mediatek/patches-5.15/826-v6.2-pinctrl-mediatek-extend-pinctrl-moore-to-support-new.patch @@ -0,0 +1,129 @@ +From fae82621ac33e2a4a96220c56e90d1ec6237d394 Mon Sep 17 00:00:00 2001 +From: Sam Shih +Date: Sun, 6 Nov 2022 09:01:12 +0100 +Subject: [PATCH] pinctrl: mediatek: extend pinctrl-moore to support new bias + functions + +Commit fb34a9ae383a ("pinctrl: mediatek: support rsel feature") +introduced SoC specify 'pull_type' attribute to mtk_pinconf_bias_set_combo +and mtk_pinconf_bias_get_combo, and make the functions able to support +almost all Mediatek SoCs that use pinctrl-mtk-common-v2.c. + +This patch enables pinctrl_moore to support these functions. + +Signed-off-by: Sam Shih +Signed-off-by: Frank Wunderlich +Reviewed-by: AngeloGioacchino Del Regno +Link: https://lore.kernel.org/r/20221106080114.7426-6-linux@fw-web.de +Signed-off-by: Linus Walleij +--- + drivers/pinctrl/mediatek/pinctrl-moore.c | 49 ++++++++++++++++++++---- + 1 file changed, 42 insertions(+), 7 deletions(-) + +--- a/drivers/pinctrl/mediatek/pinctrl-moore.c ++++ b/drivers/pinctrl/mediatek/pinctrl-moore.c +@@ -8,6 +8,7 @@ + * + */ + ++#include + #include + #include "pinctrl-moore.h" + +@@ -105,7 +106,7 @@ static int mtk_pinconf_get(struct pinctr + { + struct mtk_pinctrl *hw = pinctrl_dev_get_drvdata(pctldev); + u32 param = pinconf_to_config_param(*config); +- int val, val2, err, reg, ret = 1; ++ int val, val2, err, pullup, reg, ret = 1; + const struct mtk_pin_desc *desc; + + desc = (const struct mtk_pin_desc *)&hw->soc->pins[pin]; +@@ -114,7 +115,13 @@ static int mtk_pinconf_get(struct pinctr + + switch (param) { + case PIN_CONFIG_BIAS_DISABLE: +- if (hw->soc->bias_disable_get) { ++ if (hw->soc->bias_get_combo) { ++ err = hw->soc->bias_get_combo(hw, desc, &pullup, &ret); ++ if (err) ++ return err; ++ if (ret != MTK_PUPD_SET_R1R0_00 && ret != MTK_DISABLE) ++ return -EINVAL; ++ } else if (hw->soc->bias_disable_get) { + err = hw->soc->bias_disable_get(hw, desc, &ret); + if (err) + return err; +@@ -123,7 +130,15 @@ static int mtk_pinconf_get(struct pinctr + } + break; + case PIN_CONFIG_BIAS_PULL_UP: +- if (hw->soc->bias_get) { ++ if (hw->soc->bias_get_combo) { ++ err = hw->soc->bias_get_combo(hw, desc, &pullup, &ret); ++ if (err) ++ return err; ++ if (ret == MTK_PUPD_SET_R1R0_00 || ret == MTK_DISABLE) ++ return -EINVAL; ++ if (!pullup) ++ return -EINVAL; ++ } else if (hw->soc->bias_get) { + err = hw->soc->bias_get(hw, desc, 1, &ret); + if (err) + return err; +@@ -132,7 +147,15 @@ static int mtk_pinconf_get(struct pinctr + } + break; + case PIN_CONFIG_BIAS_PULL_DOWN: +- if (hw->soc->bias_get) { ++ if (hw->soc->bias_get_combo) { ++ err = hw->soc->bias_get_combo(hw, desc, &pullup, &ret); ++ if (err) ++ return err; ++ if (ret == MTK_PUPD_SET_R1R0_00 || ret == MTK_DISABLE) ++ return -EINVAL; ++ if (pullup) ++ return -EINVAL; ++ } else if (hw->soc->bias_get) { + err = hw->soc->bias_get(hw, desc, 0, &ret); + if (err) + return err; +@@ -235,7 +258,11 @@ static int mtk_pinconf_set(struct pinctr + + switch (param) { + case PIN_CONFIG_BIAS_DISABLE: +- if (hw->soc->bias_disable_set) { ++ if (hw->soc->bias_set_combo) { ++ err = hw->soc->bias_set_combo(hw, desc, 0, MTK_DISABLE); ++ if (err) ++ return err; ++ } else if (hw->soc->bias_disable_set) { + err = hw->soc->bias_disable_set(hw, desc); + if (err) + return err; +@@ -244,7 +271,11 @@ static int mtk_pinconf_set(struct pinctr + } + break; + case PIN_CONFIG_BIAS_PULL_UP: +- if (hw->soc->bias_set) { ++ if (hw->soc->bias_set_combo) { ++ err = hw->soc->bias_set_combo(hw, desc, 1, arg); ++ if (err) ++ return err; ++ } else if (hw->soc->bias_set) { + err = hw->soc->bias_set(hw, desc, 1); + if (err) + return err; +@@ -253,7 +284,11 @@ static int mtk_pinconf_set(struct pinctr + } + break; + case PIN_CONFIG_BIAS_PULL_DOWN: +- if (hw->soc->bias_set) { ++ if (hw->soc->bias_set_combo) { ++ err = hw->soc->bias_set_combo(hw, desc, 0, arg); ++ if (err) ++ return err; ++ } else if (hw->soc->bias_set) { + err = hw->soc->bias_set(hw, desc, 0); + if (err) + return err;