From: Mathias Kresin <dev@kresin.me>
Date: Wed, 22 Aug 2018 05:30:36 +0000 (+0200)
Subject: ramips: fix mt7620 pinmux for second SPI
X-Git-Tag: v18.06.5~87
X-Git-Url: http://git.lede-project.org./?a=commitdiff_plain;h=3bbd16da46ba85c4c50c1bb3eda9b0b11f8cc5c8;p=openwrt%2Fstaging%2Fchunkeey.git

ramips: fix mt7620 pinmux for second SPI

The mt7620 doesn't have a pinmux group named spi_cs1. The cs1 is part
of the "spi refclk" group. The function "spi refclk" enables the second
chip select.

On reset, the pins of the "spi refclk" group are used as reference
clock and GPIO.

Signed-off-by: Mathias Kresin <dev@kresin.me>
(cherry picked from commit 3601c3de23f15e2735adc4becdca14c803b6b1a5)
---

diff --git a/target/linux/ramips/dts/mt7620a.dtsi b/target/linux/ramips/dts/mt7620a.dtsi
index 62e1985aa2..d1edc3bdf7 100644
--- a/target/linux/ramips/dts/mt7620a.dtsi
+++ b/target/linux/ramips/dts/mt7620a.dtsi
@@ -339,8 +339,8 @@
 
 		spi_cs1: spi1 {
 			spi1 {
-				ralink,group = "spi_cs1";
-				ralink,function = "spi_cs1";
+				ralink,group = "spi refclk";
+				ralink,function = "spi refclk";
 			};
 		};
 
diff --git a/target/linux/ramips/dts/mt7620n.dtsi b/target/linux/ramips/dts/mt7620n.dtsi
index 58fd263d7d..7ca1471347 100644
--- a/target/linux/ramips/dts/mt7620n.dtsi
+++ b/target/linux/ramips/dts/mt7620n.dtsi
@@ -260,8 +260,8 @@
 
 		spi_cs1: spi1 {
 			spi1 {
-				ralink,group = "spi_cs1";
-				ralink,function = "spi_cs1";
+				ralink,group = "spi refclk";
+				ralink,function = "spi refclk";
 			};
 		};