From: Gabor Juhos <juhosg@openwrt.org>
Date: Tue, 7 Jul 2009 13:57:57 +0000 (+0000)
Subject: AR7240 requires different IRQ unmasking code
X-Git-Url: http://git.lede-project.org./?a=commitdiff_plain;h=3b47053fb34e5f5f19b4c690894cba543bc33b78;p=openwrt%2Fstaging%2Fstintel.git

AR7240 requires different IRQ unmasking code

SVN-Revision: 16734
---

diff --git a/target/linux/ar71xx/files/arch/mips/ar71xx/irq.c b/target/linux/ar71xx/files/arch/mips/ar71xx/irq.c
index a912f38920..6bc1c6d5c4 100644
--- a/target/linux/ar71xx/files/arch/mips/ar71xx/irq.c
+++ b/target/linux/ar71xx/files/arch/mips/ar71xx/irq.c
@@ -297,6 +297,22 @@ static void ar71xx_misc_irq_unmask(unsigned int irq)
 	ar71xx_reset_rr(AR71XX_RESET_REG_MISC_INT_ENABLE);
 }
 
+static void ar724x_misc_irq_unmask(unsigned int irq)
+{
+	irq -= AR71XX_MISC_IRQ_BASE;
+	ar71xx_reset_wr(AR71XX_RESET_REG_MISC_INT_ENABLE,
+		ar71xx_reset_rr(AR71XX_RESET_REG_MISC_INT_ENABLE) | (1 << irq));
+
+	/* flush write */
+	ar71xx_reset_rr(AR71XX_RESET_REG_MISC_INT_ENABLE);
+
+	ar71xx_reset_wr(AR71XX_RESET_REG_MISC_INT_STATUS,
+		ar71xx_reset_rr(AR71XX_RESET_REG_MISC_INT_STATUS) & ~(1 << irq));
+
+	/* flush write */
+	ar71xx_reset_rr(AR71XX_RESET_REG_MISC_INT_STATUS);
+}
+
 static void ar71xx_misc_irq_mask(unsigned int irq)
 {
 	irq -= AR71XX_MISC_IRQ_BASE;
@@ -326,6 +342,9 @@ static void __init ar71xx_misc_irq_init(void)
 	ar71xx_reset_wr(AR71XX_RESET_REG_MISC_INT_ENABLE, 0);
 	ar71xx_reset_wr(AR71XX_RESET_REG_MISC_INT_STATUS, 0);
 
+	if (ar71xx_soc == AR71XX_SOC_AR7240)
+		ar71xx_misc_irq_chip.unmask = ar724x_misc_irq_unmask;
+
 	for (i = AR71XX_MISC_IRQ_BASE;
 	     i < AR71XX_MISC_IRQ_BASE + AR71XX_MISC_IRQ_COUNT; i++) {
 		irq_desc[i].status = IRQ_DISABLED;