From: Rafał Miłecki Date: Mon, 15 Aug 2016 08:19:10 +0000 (+0200) Subject: bcm53xx: add temporary BCM53573 ILP clock driver X-Git-Tag: v17.01.0-rc1~1722 X-Git-Url: http://git.lede-project.org./?a=commitdiff_plain;h=38750ce739803bcf2b183a7fb3738eb685d21dff;p=openwrt%2Fstaging%2Fchunkeey.git bcm53xx: add temporary BCM53573 ILP clock driver It wasn't accepted upstream as there was a discusson on Northstar vs. BCM53573. Once we get a new ARM arch Kconfig entry it should be possible to upstream it. Signed-off-by: Rafał Miłecki --- diff --git a/target/linux/bcm53xx/patches-4.4/830-clk-bcm-Add-driver-for-Northstar-ILP-clock.patch b/target/linux/bcm53xx/patches-4.4/830-clk-bcm-Add-driver-for-Northstar-ILP-clock.patch new file mode 100644 index 0000000000..4cf9b71416 --- /dev/null +++ b/target/linux/bcm53xx/patches-4.4/830-clk-bcm-Add-driver-for-Northstar-ILP-clock.patch @@ -0,0 +1,235 @@ +From 65acc8219d271d29b918ae4d6fe4d520203f25ae Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= +Date: Fri, 29 Jul 2016 14:48:19 +0200 +Subject: [PATCH V3] clk: bcm: Add driver for Northstar ILP clock +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +This clock is present on cheaper Northstar devices like BCM53573 or +BCM47189 using Corex-A7. ILP is a part of PMU (Power Management Unit) +and so it should be defined as one of its subnodes (subdevices). For +more details see Documentation entry. + +Unfortunately there isn't a set of registers related to ILP clock only. +We use registers 0x66c, 0x674 and 0x6dc and between them there are e.g. +"retention*" and "control_ext" regs. This is why this driver maps all +0x1000 B of space. + +Signed-off-by: Rafał Miłecki +--- +V2: Rebase on top of clk-next + Use ALP as parent clock + Improve comments + Switch from ioremap_nocache to ioremap + Check of_clk_add_provide result for error +V3: Drop #include + Make ILP DT entry part of PMU + Describe ILP as subdevice of PMU in Documentation +--- + .../devicetree/bindings/clock/brcm,ns-ilp.txt | 40 ++++++ + drivers/clk/bcm/Makefile | 1 + + drivers/clk/bcm/clk-ns-ilp.c | 146 +++++++++++++++++++++ + 3 files changed, 187 insertions(+) + create mode 100644 Documentation/devicetree/bindings/clock/brcm,ns-ilp.txt + create mode 100644 drivers/clk/bcm/clk-ns-ilp.c + +--- /dev/null ++++ b/Documentation/devicetree/bindings/clock/brcm,ns-ilp.txt +@@ -0,0 +1,40 @@ ++Broadcom Northstar ILP clock ++============================ ++ ++This binding uses the common clock binding: ++ Documentation/devicetree/bindings/clock/clock-bindings.txt ++ ++This binding is used for ILP clock (sometimes referred as "slow clock") ++on Broadcom Northstar devices using Corex-A7 CPU. ++ ++This clock is part of PMU (Power Management Unit), a Broadcom's device ++handing power-related aspects. Please note PMU contains more subdevices, ++ILP is only one of them. ++ ++ILP's rate has to be calculated on runtime and it depends on ALP clock ++which has to be referenced. ++ ++Required properties: ++- compatible: "brcm,ns-ilp" ++- reg: iomem address range of PMU (Power Management Unit) ++- reg-names: "pmu", the only needed & supported reg right now ++- clocks: has to reference an ALP clock ++- #clock-cells: should be <0> ++ ++Example: ++ ++pmu@18012000 { ++ compatible = "simple-bus"; ++ ranges = <0x00000000 0x18012000 0x00001000>; ++ #address-cells = <1>; ++ #size-cells = <1>; ++ ++ ilp: ilp@0 { ++ compatible = "brcm,ns-ilp"; ++ reg = <0 0x1000>; ++ reg-names = "pmu"; ++ clocks = <&alp>; ++ #clock-cells = <0>; ++ clock-output-names = "ilp"; ++ }; ++}; +--- a/drivers/clk/bcm/Makefile ++++ b/drivers/clk/bcm/Makefile +@@ -8,3 +8,4 @@ obj-$(CONFIG_COMMON_CLK_IPROC) += clk-ns + obj-$(CONFIG_ARCH_BCM_CYGNUS) += clk-cygnus.o + obj-$(CONFIG_ARCH_BCM_NSP) += clk-nsp.o + obj-$(CONFIG_ARCH_BCM_5301X) += clk-nsp.o ++obj-$(CONFIG_ARCH_BCM_5301X) += clk-ns-ilp.o +--- /dev/null ++++ b/drivers/clk/bcm/clk-ns-ilp.c +@@ -0,0 +1,146 @@ ++/* ++ * Copyright (C) 2016 Rafał Miłecki ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation. ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#define PMU_XTAL_FREQ_RATIO 0x66c ++#define XTAL_ALP_PER_4ILP 0x00001fff ++#define XTAL_CTL_EN 0x80000000 ++#define PMU_SLOW_CLK_PERIOD 0x6dc ++ ++struct ns_ilp { ++ struct clk *clk; ++ struct clk_hw hw; ++ void __iomem *pmu; ++}; ++ ++static int ns_ilp_enable(struct clk_hw *hw) ++{ ++ struct ns_ilp *ilp = container_of(hw, struct ns_ilp, hw); ++ ++ writel(0x10199, ilp->pmu + PMU_SLOW_CLK_PERIOD); ++ writel(0x10000, ilp->pmu + 0x674); ++ ++ return 0; ++} ++ ++static unsigned long ns_ilp_recalc_rate(struct clk_hw *hw, ++ unsigned long parent_rate) ++{ ++ struct ns_ilp *ilp = container_of(hw, struct ns_ilp, hw); ++ void __iomem *pmu = ilp->pmu; ++ u32 last_val, cur_val; ++ u32 sum = 0, num = 0, loop_num = 0; ++ u32 avg; ++ ++ /* Enable measurement */ ++ writel(XTAL_CTL_EN, pmu + PMU_XTAL_FREQ_RATIO); ++ ++ /* Read initial value */ ++ last_val = readl(pmu + PMU_XTAL_FREQ_RATIO) & XTAL_ALP_PER_4ILP; ++ ++ /* ++ * At minimum we should loop for a bit to let hardware do the ++ * measurement. This isn't very accurate however, so for a better ++ * precision lets try getting 20 different values for and use average. ++ */ ++ while (num < 20) { ++ cur_val = readl(pmu + PMU_XTAL_FREQ_RATIO) & XTAL_ALP_PER_4ILP; ++ ++ if (cur_val != last_val) { ++ /* Got different value, use it */ ++ sum += cur_val; ++ num++; ++ loop_num = 0; ++ last_val = cur_val; ++ } else if (++loop_num > 5000) { ++ /* Same value over and over, give up */ ++ sum += cur_val; ++ num++; ++ break; ++ } ++ } ++ ++ /* Disable measurement to save power */ ++ writel(0x0, pmu + PMU_XTAL_FREQ_RATIO); ++ ++ avg = sum / num; ++ ++ return parent_rate * 4 / avg; ++} ++ ++static const struct clk_ops ns_ilp_clk_ops = { ++ .enable = ns_ilp_enable, ++ .recalc_rate = ns_ilp_recalc_rate, ++}; ++ ++static void ns_ilp_init(struct device_node *np) ++{ ++ struct ns_ilp *ilp; ++ struct resource res; ++ struct clk_init_data init = { 0 }; ++ const char *parent_name; ++ int index; ++ int err; ++ ++ ilp = kzalloc(sizeof(*ilp), GFP_KERNEL); ++ if (!ilp) ++ return; ++ ++ parent_name = of_clk_get_parent_name(np, 0); ++ if (!parent_name) { ++ err = -ENOENT; ++ goto err_free_ilp; ++ } ++ ++ /* TODO: This looks generic, try making it OF helper. */ ++ index = of_property_match_string(np, "reg-names", "pmu"); ++ if (index < 0) { ++ err = index; ++ goto err_free_ilp; ++ } ++ err = of_address_to_resource(np, index, &res); ++ if (err) ++ goto err_free_ilp; ++ ilp->pmu = ioremap(res.start, resource_size(&res)); ++ if (IS_ERR(ilp->pmu)) { ++ err = PTR_ERR(ilp->pmu); ++ goto err_free_ilp; ++ } ++ ++ init.name = np->name; ++ init.ops = &ns_ilp_clk_ops; ++ init.parent_names = &parent_name; ++ init.num_parents = 1; ++ ++ ilp->hw.init = &init; ++ ilp->clk = clk_register(NULL, &ilp->hw); ++ if (WARN_ON(IS_ERR(ilp->clk))) ++ goto err_unmap_pmu; ++ ++ err = of_clk_add_provider(np, of_clk_src_simple_get, ilp->clk); ++ if (err) ++ goto err_clk_unregister; ++ ++ return; ++ ++err_clk_unregister: ++ clk_unregister(ilp->clk); ++err_unmap_pmu: ++ iounmap(ilp->pmu); ++err_free_ilp: ++ kfree(ilp); ++ pr_err("Failed to init ILP clock: %d\n", err); ++} ++CLK_OF_DECLARE(ns_ilp_clk, "brcm,ns-ilp", ns_ilp_init);