From: Rafał Miłecki Date: Thu, 4 Nov 2021 06:00:21 +0000 (+0100) Subject: bcm53xx: add first 5.17 DTS changes X-Git-Tag: v21.02.6~117 X-Git-Url: http://git.lede-project.org./?a=commitdiff_plain;h=37d535129be0244c11a4f61ef6beb3eadd9dc161;p=openwrt%2Fopenwrt.git bcm53xx: add first 5.17 DTS changes Signed-off-by: Rafał Miłecki (cherry picked from commit 1ee6d3d24e328e29fcf068e90953c760305462d4) --- diff --git a/target/linux/bcm53xx/patches-5.4/038-v5.17-0001-ARM-dts-NSP-MX65-add-qca8k-falling-edge-PLL-properti.patch b/target/linux/bcm53xx/patches-5.4/038-v5.17-0001-ARM-dts-NSP-MX65-add-qca8k-falling-edge-PLL-properti.patch new file mode 100644 index 0000000000..a0be1eda4d --- /dev/null +++ b/target/linux/bcm53xx/patches-5.4/038-v5.17-0001-ARM-dts-NSP-MX65-add-qca8k-falling-edge-PLL-properti.patch @@ -0,0 +1,42 @@ +From 58d3d07985c1adab31a3ed76360d016bb1c5b358 Mon Sep 17 00:00:00 2001 +From: Matthew Hagan +Date: Fri, 15 Oct 2021 23:50:22 +0100 +Subject: [PATCH] ARM: dts: NSP: MX65: add qca8k falling-edge, PLL properties + +This patch enables two properties for the QCA8337 switches on the MX65. + +Set the SGMII transmit clock to falling edge +"qca,sgmii-txclk-falling-edge" to conform to the OEM configuration [1]. + +The new explicit PLL enable option "qca,sgmii-enable-pll" is required +[2]. + +[1] https://git.kernel.org/netdev/net-next/c/6c43809bf1be +[2] https://git.kernel.org/netdev/net-next/c/bbc4799e8bb6 + +Signed-off-by: Matthew Hagan +Signed-off-by: Florian Fainelli +--- + arch/arm/boot/dts/bcm958625-meraki-alamo.dtsi | 4 ++++ + 1 file changed, 4 insertions(+) + +--- a/arch/arm/boot/dts/bcm958625-meraki-alamo.dtsi ++++ b/arch/arm/boot/dts/bcm958625-meraki-alamo.dtsi +@@ -118,6 +118,8 @@ + reg = <0>; + ethernet = <&sgmii1>; + phy-mode = "sgmii"; ++ qca,sgmii-enable-pll; ++ qca,sgmii-txclk-falling-edge; + fixed-link { + speed = <1000>; + full-duplex; +@@ -194,6 +196,8 @@ + reg = <0>; + ethernet = <&sgmii0>; + phy-mode = "sgmii"; ++ qca,sgmii-enable-pll; ++ qca,sgmii-txclk-falling-edge; + fixed-link { + speed = <1000>; + full-duplex; diff --git a/target/linux/bcm53xx/patches-5.4/038-v5.17-0002-ARM-dts-BCM5301X-remove-unnecessary-address-size-cel.patch b/target/linux/bcm53xx/patches-5.4/038-v5.17-0002-ARM-dts-BCM5301X-remove-unnecessary-address-size-cel.patch new file mode 100644 index 0000000000..3c3725adec --- /dev/null +++ b/target/linux/bcm53xx/patches-5.4/038-v5.17-0002-ARM-dts-BCM5301X-remove-unnecessary-address-size-cel.patch @@ -0,0 +1,29 @@ +From 835992e7eca4b29a87c204cefff2f7863fd087f3 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Ar=C4=B1n=C3=A7=20=C3=9CNAL?= +Date: Wed, 27 Oct 2021 00:57:03 +0800 +Subject: [PATCH] ARM: dts: BCM5301X: remove unnecessary address & size cells + from Asus RT-AC88U +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +Remove the unnecessary #address-cells & #size-cells in the gpio-keys node +from the device tree of Asus RT-AC88U. + +Signed-off-by: Arınç ÜNAL +Signed-off-by: Florian Fainelli +--- + arch/arm/boot/dts/bcm47094-asus-rt-ac88u.dts | 2 -- + 1 file changed, 2 deletions(-) + +--- a/arch/arm/boot/dts/bcm47094-asus-rt-ac88u.dts ++++ b/arch/arm/boot/dts/bcm47094-asus-rt-ac88u.dts +@@ -68,8 +68,6 @@ + + gpio-keys { + compatible = "gpio-keys"; +- #address-cells = <1>; +- #size-cells = <0>; + + wps { + label = "WPS"; diff --git a/target/linux/bcm53xx/patches-5.4/038-v5.17-0003-ARM-dts-BCM5301X-define-RTL8365MB-switch-on-Asus-RT-.patch b/target/linux/bcm53xx/patches-5.4/038-v5.17-0003-ARM-dts-BCM5301X-define-RTL8365MB-switch-on-Asus-RT-.patch new file mode 100644 index 0000000000..562d5a22c7 --- /dev/null +++ b/target/linux/bcm53xx/patches-5.4/038-v5.17-0003-ARM-dts-BCM5301X-define-RTL8365MB-switch-on-Asus-RT-.patch @@ -0,0 +1,104 @@ +From b6c99228c8edc5e67d8229ba1c5f76cce210ddfc Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Ar=C4=B1n=C3=A7=20=C3=9CNAL?= +Date: Wed, 27 Oct 2021 00:57:06 +0800 +Subject: [PATCH] ARM: dts: BCM5301X: define RTL8365MB switch on Asus RT-AC88U +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +Define the Realtek RTL8365MB switch without interrupt support on the device +tree of Asus RT-AC88U. + +Signed-off-by: Arınç ÜNAL +Acked-by: Alvin Å ipraga +Signed-off-by: Florian Fainelli +--- + arch/arm/boot/dts/bcm47094-asus-rt-ac88u.dts | 77 ++++++++++++++++++++ + 1 file changed, 77 insertions(+) + +--- a/arch/arm/boot/dts/bcm47094-asus-rt-ac88u.dts ++++ b/arch/arm/boot/dts/bcm47094-asus-rt-ac88u.dts +@@ -93,6 +93,83 @@ + gpios = <&chipcommon 4 GPIO_ACTIVE_LOW>; + }; + }; ++ ++ switch { ++ compatible = "realtek,rtl8365mb"; ++ /* 7 = MDIO (has input reads), 6 = MDC (clock, output only) */ ++ mdc-gpios = <&chipcommon 6 GPIO_ACTIVE_HIGH>; ++ mdio-gpios = <&chipcommon 7 GPIO_ACTIVE_HIGH>; ++ reset-gpios = <&chipcommon 10 GPIO_ACTIVE_LOW>; ++ realtek,disable-leds; ++ dsa,member = <1 0>; ++ ++ ports { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ reg = <0>; ++ ++ port@0 { ++ reg = <0>; ++ label = "lan5"; ++ phy-handle = <ðphy0>; ++ }; ++ ++ port@1 { ++ reg = <1>; ++ label = "lan6"; ++ phy-handle = <ðphy1>; ++ }; ++ ++ port@2 { ++ reg = <2>; ++ label = "lan7"; ++ phy-handle = <ðphy2>; ++ }; ++ ++ port@3 { ++ reg = <3>; ++ label = "lan8"; ++ phy-handle = <ðphy3>; ++ }; ++ ++ port@6 { ++ reg = <6>; ++ label = "cpu"; ++ ethernet = <&sw0_p5>; ++ phy-mode = "rgmii"; ++ tx-internal-delay-ps = <2000>; ++ rx-internal-delay-ps = <2000>; ++ ++ fixed-link { ++ speed = <1000>; ++ full-duplex; ++ pause; ++ }; ++ }; ++ }; ++ ++ mdio { ++ compatible = "realtek,smi-mdio"; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ ethphy0: ethernet-phy@0 { ++ reg = <0>; ++ }; ++ ++ ethphy1: ethernet-phy@1 { ++ reg = <1>; ++ }; ++ ++ ethphy2: ethernet-phy@2 { ++ reg = <2>; ++ }; ++ ++ ethphy3: ethernet-phy@3 { ++ reg = <3>; ++ }; ++ }; ++ }; + }; + + &srab {