From: Andrew Thoelke <andrew.thoelke@arm.com>
Date: Thu, 11 Jun 2015 13:12:14 +0000 (+0100)
Subject: Fix incorrect assertions in bl1_main()
X-Git-Url: http://git.lede-project.org./?a=commitdiff_plain;h=354ab57dba7f81bfa2f2878a3864c39e1839bd06;p=project%2Fbcm63xx%2Fatf.git

Fix incorrect assertions in bl1_main()

The validation of the caching enable state in bl1_main() was
incorrect resulting in the state not being checked. Using the right
operator fixes this.

Change-Id: I2a99478f420281a1dcdf365d3d4fd8394cd21b51
---

diff --git a/bl1/bl1_main.c b/bl1/bl1_main.c
index a5db0855..a7a872ce 100644
--- a/bl1/bl1_main.c
+++ b/bl1/bl1_main.c
@@ -126,9 +126,9 @@ void bl1_main(void)
 	 * Ensure that MMU/Caches and coherency are turned on
 	 */
 	val = read_sctlr_el3();
-	assert(val | SCTLR_M_BIT);
-	assert(val | SCTLR_C_BIT);
-	assert(val | SCTLR_I_BIT);
+	assert(val & SCTLR_M_BIT);
+	assert(val & SCTLR_C_BIT);
+	assert(val & SCTLR_I_BIT);
 	/*
 	 * Check that Cache Writeback Granule (CWG) in CTR_EL0 matches the
 	 * provided platform value