From: Marek Vasut <marek.vasut+renesas@gmail.com>
Date: Sun, 14 Jul 2019 09:19:18 +0000 (+0200)
Subject: rcar_gen3: drivers: ddr-a: Inline ddr_init_e3.h
X-Git-Url: http://git.lede-project.org./?a=commitdiff_plain;h=32e6b50ed5aa92e44cf03649b09165af995580b1;p=project%2Fbcm63xx%2Fatf.git

rcar_gen3: drivers: ddr-a: Inline ddr_init_e3.h

Partly inline ddr_init_e3.h into ddr_init_e3.c . Drop duplicate
INITDRAM_* macros, which are defined in boot_init_dram.h .

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Change-Id: I758661d337a86b6a07f82cd4067fbc149cbaed1e
---

diff --git a/drivers/staging/renesas/rcar/ddr/ddr_a/ddr_init_e3.c b/drivers/staging/renesas/rcar/ddr/ddr_a/ddr_init_e3.c
index 8b25546d..71bd696c 100644
--- a/drivers/staging/renesas/rcar/ddr/ddr_a/ddr_init_e3.c
+++ b/drivers/staging/renesas/rcar/ddr/ddr_a/ddr_init_e3.c
@@ -9,11 +9,23 @@
 
 #include <common/debug.h>
 
+#include "boot_init_dram.h"
 #include "boot_init_dram_regdef.h"
-#include "ddr_init_e3.h"
 
 #include "../dram_sub_func.h"
 
+#define RCAR_E3_DDR_VERSION    "rev.0.12"
+
+#ifdef ddr_qos_init_setting
+#define REFRESH_RATE	3900	/* Average periodic refresh interval[ns]. Support 3900,7800 */
+#else
+#if RCAR_REF_INT == 1
+#define REFRESH_RATE	7800
+#else
+#define REFRESH_RATE	3900
+#endif
+#endif
+
 /*******************************************************************************
  *  variables
  ******************************************************************************/
diff --git a/drivers/staging/renesas/rcar/ddr/ddr_a/ddr_init_e3.h b/drivers/staging/renesas/rcar/ddr/ddr_a/ddr_init_e3.h
deleted file mode 100644
index 1a96a69c..00000000
--- a/drivers/staging/renesas/rcar/ddr/ddr_a/ddr_init_e3.h
+++ /dev/null
@@ -1,33 +0,0 @@
-/*
- * Copyright (c) 2015-2019, Renesas Electronics Corporation. All rights reserved.
- *
- * SPDX-License-Identifier: BSD-3-Clause
- */
-
-#ifndef DDR_INIT_E3_H
-#define DDR_INIT_E3_H
-
-#include <stdint.h>
-
-#define RCAR_E3_DDR_VERSION    "rev.0.12"
-
-#ifdef ddr_qos_init_setting
-   #define REFRESH_RATE  3900               /*  Average periodic refresh interval[ns]. Support 3900,7800 */
-#else
-   #if RCAR_REF_INT == 0
-      #define REFRESH_RATE  3900
-   #elif RCAR_REF_INT == 1
-      #define REFRESH_RATE  7800
-   #else
-      #define REFRESH_RATE  3900
-   #endif
-#endif
-
-extern int32_t rcar_dram_init(void);
-#define INITDRAM_OK (0)
-#define INITDRAM_NG (0xffffffff)
-#define INITDRAM_ERR_I (0xffffffff)
-#define INITDRAM_ERR_O (0xfffffffe)
-#define INITDRAM_ERR_T (0xfffffff0)
-
-#endif /* DDR_INIT_E3_H */