From: Gabor Juhos Date: Tue, 17 Dec 2013 16:27:46 +0000 (+0000) Subject: ar71xx: ag71xx: compute the RX buffer size from the maximum frame size X-Git-Url: http://git.lede-project.org./?a=commitdiff_plain;h=31de995025ff8d59e9588f2eb04485168a5e355f;p=openwrt%2Fstaging%2Fblocktrron.git ar71xx: ag71xx: compute the RX buffer size from the maximum frame size Currently, the AG71XX_RX_PKT_SIZE value limits the received frame size to 1514/1516 bytes with/without a VLAN header respectively. However the hardware limit is controlled by the value the AG71XX_REG_MAC_MFL register which contains the value of the max_frame_len field. Compute the RX buffer size from the max_frame_len field to get rid of the 1514/1516 byte limitation. Also remove the unused AG71XX_RX_PKT_SIZE definition. Signed-off-by: Gabor Juhos SVN-Revision: 39121 --- diff --git a/target/linux/ar71xx/files/drivers/net/ethernet/atheros/ag71xx/ag71xx.h b/target/linux/ar71xx/files/drivers/net/ethernet/atheros/ag71xx/ag71xx.h index f3f9f14801..b0df017571 100644 --- a/target/linux/ar71xx/files/drivers/net/ethernet/atheros/ag71xx/ag71xx.h +++ b/target/linux/ar71xx/files/drivers/net/ethernet/atheros/ag71xx/ag71xx.h @@ -51,8 +51,6 @@ #define AG71XX_INT_INIT (AG71XX_INT_ERR | AG71XX_INT_POLL) #define AG71XX_TX_MTU_LEN 1540 -#define AG71XX_RX_PKT_SIZE \ - (ETH_FRAME_LEN + ETH_FCS_LEN + VLAN_HLEN) #define AG71XX_TX_RING_SIZE_DEFAULT 32 #define AG71XX_RX_RING_SIZE_DEFAULT 128 diff --git a/target/linux/ar71xx/files/drivers/net/ethernet/atheros/ag71xx/ag71xx_main.c b/target/linux/ar71xx/files/drivers/net/ethernet/atheros/ag71xx/ag71xx_main.c index 04e1e586c2..622ffed1ea 100644 --- a/target/linux/ar71xx/files/drivers/net/ethernet/atheros/ag71xx/ag71xx_main.c +++ b/target/linux/ar71xx/files/drivers/net/ethernet/atheros/ag71xx/ag71xx_main.c @@ -609,7 +609,7 @@ static int ag71xx_open(struct net_device *dev) struct ag71xx *ag = netdev_priv(dev); int ret; - ag->rx_buf_size = AG71XX_RX_PKT_SIZE + NET_SKB_PAD + NET_IP_ALIGN; + ag->rx_buf_size = ag->max_frame_len + NET_SKB_PAD + NET_IP_ALIGN; ret = ag71xx_rings_init(ag); if (ret)