From: Linus Torvalds Date: Sat, 17 Aug 2019 17:36:47 +0000 (-0700) Subject: Merge tag 'riscv/for-v5.3-rc5' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv... X-Git-Url: http://git.lede-project.org./?a=commitdiff_plain;h=2f478b60118f48bf66eaddcca0d23e80f87a682d;p=openwrt%2Fstaging%2Fblogic.git Merge tag 'riscv/for-v5.3-rc5' of git://git./linux/kernel/git/riscv/linux Pull RISC-V fixes from Paul Walmsley: - Two patches to fix significant bugs in floating point register context handling - A minor fix in RISC-V flush_tlb_page(), to supply a valid end address to flush_tlb_range() - Two minor defconfig additions: to build the virtio hwrng driver by default (for QEMU targets), and to partially synchronize the 32-bit defconfig with the 64-bit defconfig * tag 'riscv/for-v5.3-rc5' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux: riscv: Make __fstate_clean() work correctly. riscv: Correct the initialized flow of FP register riscv: defconfig: Update the defconfig riscv: rv32_defconfig: Update the defconfig riscv: fix flush_tlb_range() end address for flush_tlb_page() --- 2f478b60118f48bf66eaddcca0d23e80f87a682d