From: John Crispin Date: Tue, 5 Aug 2008 20:57:38 +0000 (+0000) Subject: fixes reset button on atheros platform, ar5312 gpio_irqs will be added later X-Git-Url: http://git.lede-project.org./?a=commitdiff_plain;h=2dd9146ddf847c3c518850c7e6f921f85fae9773;p=openwrt%2Fstaging%2Fldir.git fixes reset button on atheros platform, ar5312 gpio_irqs will be added later SVN-Revision: 12164 --- diff --git a/target/linux/atheros/files/arch/mips/atheros/Makefile b/target/linux/atheros/files/arch/mips/atheros/Makefile index 0d00336fd4..2c2b991bc4 100644 --- a/target/linux/atheros/files/arch/mips/atheros/Makefile +++ b/target/linux/atheros/files/arch/mips/atheros/Makefile @@ -8,6 +8,6 @@ # Copyright (C) 2006 Felix Fietkau # -obj-y += board.o prom.o reset.o gpio.o +obj-y += board.o prom.o reset.o obj-$(CONFIG_ATHEROS_AR5312) += ar5312/ obj-$(CONFIG_ATHEROS_AR5315) += ar5315/ diff --git a/target/linux/atheros/files/arch/mips/atheros/ar5312/irq.c b/target/linux/atheros/files/arch/mips/atheros/ar5312/irq.c index e2117a2ddd..0cbdc8ed22 100644 --- a/target/linux/atheros/files/arch/mips/atheros/ar5312/irq.c +++ b/target/linux/atheros/files/arch/mips/atheros/ar5312/irq.c @@ -55,8 +55,6 @@ asmlinkage void ar5312_irq_dispatch(void) (void)sysRegRead(AR531X_TIMER); } else if (ar531x_misc_intrs & AR531X_ISR_AHBPROC) do_IRQ(AR531X_MISC_IRQ_AHB_PROC); - else if (ar531x_misc_intrs & AR531X_ISR_GPIO) - ar5312_gpio_irq_dispatch(); else if ((ar531x_misc_intrs & AR531X_ISR_UART0)) do_IRQ(AR531X_MISC_IRQ_UART0); else if (ar531x_misc_intrs & AR531X_ISR_WD) diff --git a/target/linux/atheros/files/arch/mips/atheros/gpio.c b/target/linux/atheros/files/arch/mips/atheros/gpio.c deleted file mode 100644 index c51de6164d..0000000000 --- a/target/linux/atheros/files/arch/mips/atheros/gpio.c +++ /dev/null @@ -1,339 +0,0 @@ -/* - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - * - * Copyright (C) 2003 Atheros Communications, Inc., All Rights Reserved. - * Copyright (C) 2006 FON Technology, SL. - * Copyright (C) 2006 Imre Kaloz - * Copyright (C) 2007 Othello - */ - -/* - * Support for AR531X GPIO -- General Purpose Input/Output Pins - */ - -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include -#include "ar531x.h" -/* - GPIO Interrupt Support - Make use of request_irq() and the function gpio_to_irq() to trap gpio events - */ - -/* Global variables */ -static u32 ar531x_gpio_intr_Mask = 0; -/* - AR5312: I don't have any devices with this chip. Assumed to be similar to AR5215 - will someone who has one try the code and remove this message if it works? - */ - -#ifdef CONFIG_ATHEROS_AR5315 -/* - AR5315: Up to 2 GPIO pins may be monitored simultaneously - specifying more pins if you already have 2 will not have any effect - however, the excess gpio irqs will also be triggered if a valid gpio being monitored triggers - only high, low or edge triggered interrupt supported - */ -static unsigned int ar5315_gpio_set_type_gpio = 0; -static unsigned int ar5315_gpio_set_type_lvl = IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING; -#endif - -#ifdef CONFIG_ATHEROS_AR5312 -/* Enable the specified AR5312_GPIO_IRQ interrupt */ -static void ar5312_gpio_intr_enable(unsigned int irq) { - u32 reg; - unsigned int gpio; - unsigned int imr; - - gpio = irq - (AR531X_GPIO_IRQ(0)); - if (gpio >= AR531X_NUM_GPIO) - return; - ar531x_gpio_intr_Mask |= (1<= AR531X_NUM_GPIO) - return; - - reg = sysRegRead(AR531X_GPIO_CR); - reg &= ~(AR531X_GPIO_CR_M(gpio) | AR531X_GPIO_CR_UART(gpio) | AR531X_GPIO_CR_INT(gpio)); - reg |= AR531X_GPIO_CR_I(gpio); - /* No GPIO_CR_INT bit */ - - sysRegWrite(AR531X_GPIO_CR, reg); - (void)sysRegRead(AR531X_GPIO_CR); /* flush to hardware */ - - /* Disable Interrupt if no gpio needs triggering */ - if (ar531x_gpio_intr_Mask != 0) { - unsigned int imr; - - imr = sysRegRead(AR531X_IMR); - imr &= ~AR531X_ISR_GPIO; - sysRegWrite(AR531X_IMR, imr); - imr = sysRegRead(AR531X_IMR); /* flush write buffer */ - } - - ar531x_gpio_intr_Mask &= ~(1<= AR5315_NUM_GPIO) - return; - ar531x_gpio_intr_Mask |= (1<= AR5315_NUM_GPIO) - return; - - reg = sysRegRead(AR5315_GPIO_CR); - reg &= ~(AR5315_GPIO_CR_M(gpio)); - reg |= AR5315_GPIO_CR_I(gpio); - sysRegWrite(AR5315_GPIO_CR, reg); - (void)sysRegRead(AR5315_GPIO_CR); /* flush write to hardware */ - - /* Locate a the correct register slot to disable gpio intr */ - reg = sysRegRead(AR5315_GPIO_INT); - for (i=0 ; i<=AR5315_GPIO_INT_MAX_Y ; i++) { - /* If this correct */ - if ( AR5315_GPIO_INT_S(i) == - (reg & AR5315_GPIO_INT_M) ) { - /* Clear the gpio level trigger mode */ - reg &= ~(AR5315_GPIO_INT_LVL_M); - - sysRegWrite(AR5315_GPIO_INT, reg); - (void)sysRegRead(AR5315_GPIO_INT); /* flush write to hardware */ - break; - } /* end if trigger level for slot i is 0 */ - } /* end for each slot */ - - /* Disable interrupt only if no gpio needs triggering */ - if (ar531x_gpio_intr_Mask != 0) { - unsigned int imr; - - imr = sysRegRead(AR5315_IMR); - imr &= ~AR5315_ISR_GPIO; - sysRegWrite(AR5315_IMR, imr); - imr = sysRegRead(AR5315_IMR); /* flush write buffer */ - } - - ar531x_gpio_intr_Mask &= ~(1< AR5315_NUM_GPIO) - return -EINVAL; - switch (flow_type & IRQF_TRIGGER_MASK) { - case IRQF_TRIGGER_RISING: - case IRQF_TRIGGER_FALLING: - printk(KERN_WARNING "AR5315 GPIO %u falling back to edge triggered\n", ar5315_gpio_set_type_gpio); - case IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING: - ar5315_gpio_set_type_lvl = AR5315_GPIO_INT_LVL_EDGE; - break; - case IRQF_TRIGGER_LOW: - ar5315_gpio_set_type_lvl = AR5315_GPIO_INT_LVL_LOW; - break; - case IRQF_TRIGGER_HIGH: - ar5315_gpio_set_type_lvl = AR5315_GPIO_INT_LVL_HIGH; - break; - default: - return -EINVAL; - } - return 0; -} - -asmlinkage void ar5315_gpio_irq_dispatch(void){ - int i; - u32 gpioIntPending; - gpioIntPending = sysRegRead(AR5315_GPIO_DI) & ar531x_gpio_intr_Mask; - sysRegWrite(AR5315_ISR, sysRegRead(AR5315_IMR) | ~AR5315_ISR_GPIO); - for (i=0; i #include -#define AR531X_RESET_GPIO_IRQ (AR531X_GPIO_IRQ_BASE + bcfg->resetConfigGpio) +#define AR531X_RESET_GPIO_IRQ (AR531X_GPIO_IRQ(bcfg->resetConfigGpio)) struct event_t { struct work_struct wq; diff --git a/target/linux/atheros/files/include/asm-mips/mach-atheros/ar531x.h b/target/linux/atheros/files/include/asm-mips/mach-atheros/ar531x.h index ba52a2b326..8148b76fba 100644 --- a/target/linux/atheros/files/include/asm-mips/mach-atheros/ar531x.h +++ b/target/linux/atheros/files/include/asm-mips/mach-atheros/ar531x.h @@ -54,7 +54,7 @@ extern void (*board_time_init)(void); /* GPIO Interrupts [0..7], share AR531X_MISC_IRQ_GPIO */ #define AR531X_GPIO_IRQ_NONE AR531X_GPIO_IRQ_BASE+0 -#define AR531X_GPIO_IRQ(n) AR531X_GPIO_IRQ_BASE+(n)+1 +#define AR531X_GPIO_IRQ(n) AR531X_GPIO_IRQ_BASE+n #define AR531X_GPIO_IRQ_COUNT 22 #define sysRegRead(phys) \