From: Rafał Miłecki Date: Thu, 3 Dec 2015 11:03:07 +0000 (+0000) Subject: bcm53xx: move BCM5301X patches to use 08x prefix X-Git-Url: http://git.lede-project.org./?a=commitdiff_plain;h=2bcbe28580e50b12dcd39865575e7a8576a89cd1;p=openwrt%2Fstaging%2Fkaloz.git bcm53xx: move BCM5301X patches to use 08x prefix Signed-off-by: Rafał Miłecki SVN-Revision: 47713 --- diff --git a/target/linux/bcm53xx/patches-4.4/032-ARM-BCM5301X-Add-missing-Netgear-R8000-LEDs.patch b/target/linux/bcm53xx/patches-4.4/032-ARM-BCM5301X-Add-missing-Netgear-R8000-LEDs.patch new file mode 100644 index 0000000000..14554a6267 --- /dev/null +++ b/target/linux/bcm53xx/patches-4.4/032-ARM-BCM5301X-Add-missing-Netgear-R8000-LEDs.patch @@ -0,0 +1,56 @@ +From 9789f1fd1fd1d0551132778414faf8e2254408c1 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= +Date: Fri, 30 Oct 2015 15:44:01 +0100 +Subject: [PATCH] ARM: BCM5301X: Add missing Netgear R8000 LEDs +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +Add a bunch of LEDs missing for the Netgear R8000: wireless, wps, 5Ghz radio +and USB LEDs. + +Signed-off-by: Rafał Miłecki +Signed-off-by: Florian Fainelli +--- + arch/arm/boot/dts/bcm4709-netgear-r8000.dts | 30 +++++++++++++++++++++++++++++ + 1 file changed, 30 insertions(+) + +--- a/arch/arm/boot/dts/bcm4709-netgear-r8000.dts ++++ b/arch/arm/boot/dts/bcm4709-netgear-r8000.dts +@@ -50,6 +50,36 @@ + gpios = <&chipcommon 13 GPIO_ACTIVE_LOW>; + linux,default-trigger = "default-off"; + }; ++ ++ wireless { ++ label = "bcm53xx:white:wireless"; ++ gpios = <&chipcommon 14 GPIO_ACTIVE_HIGH>; ++ linux,default-trigger = "default-off"; ++ }; ++ ++ wps { ++ label = "bcm53xx:white:wps"; ++ gpios = <&chipcommon 15 GPIO_ACTIVE_HIGH>; ++ linux,default-trigger = "default-off"; ++ }; ++ ++ 5ghz-2 { ++ label = "bcm53xx:white:5ghz-2"; ++ gpios = <&chipcommon 16 GPIO_ACTIVE_LOW>; ++ linux,default-trigger = "default-off"; ++ }; ++ ++ usb3 { ++ label = "bcm53xx:white:usb3"; ++ gpios = <&chipcommon 17 GPIO_ACTIVE_LOW>; ++ linux,default-trigger = "default-off"; ++ }; ++ ++ usb2 { ++ label = "bcm53xx:white:usb2"; ++ gpios = <&chipcommon 18 GPIO_ACTIVE_LOW>; ++ linux,default-trigger = "default-off"; ++ }; + }; + + gpio-keys { diff --git a/target/linux/bcm53xx/patches-4.4/033-dt-bindings-add-SMP-enable-method-for-Broadcom-NSP.patch b/target/linux/bcm53xx/patches-4.4/033-dt-bindings-add-SMP-enable-method-for-Broadcom-NSP.patch new file mode 100644 index 0000000000..ad560261d3 --- /dev/null +++ b/target/linux/bcm53xx/patches-4.4/033-dt-bindings-add-SMP-enable-method-for-Broadcom-NSP.patch @@ -0,0 +1,70 @@ +From fa20071c74be69a1d84df85e5d1e72a40a156b89 Mon Sep 17 00:00:00 2001 +From: Kapil Hali +Date: Tue, 1 Dec 2015 11:24:05 -0500 +Subject: [PATCH] dt-bindings: add SMP enable-method for Broadcom NSP + +Add a compatible string "brcm,bcm-nsp-smp" for Broadcom's +Northstar Plus CPU to the 32-bit ARM CPU device tree binding +documentation file and create a new binding documentation for +Northstar Plus CPU. + +Signed-off-by: Kapil Hali +Signed-off-by: Florian Fainelli +--- + .../bindings/arm/bcm/brcm,nsp-cpu-method.txt | 39 ++++++++++++++++++++++ + Documentation/devicetree/bindings/arm/cpus.txt | 1 + + 2 files changed, 40 insertions(+) + create mode 100644 Documentation/devicetree/bindings/arm/bcm/brcm,nsp-cpu-method.txt + +--- /dev/null ++++ b/Documentation/devicetree/bindings/arm/bcm/brcm,nsp-cpu-method.txt +@@ -0,0 +1,39 @@ ++Broadcom Northstar Plus SoC CPU Enable Method ++--------------------------------------------- ++This binding defines the enable method used for starting secondary ++CPUs in the following Broadcom SoCs: ++ BCM58522, BCM58525, BCM58535, BCM58622, BCM58623, BCM58625, BCM88312 ++ ++The enable method is specified by defining the following required ++properties in the "cpus" device tree node: ++ - enable-method = "brcm,bcm-nsp-smp"; ++ - secondary-boot-reg = <...>; ++ ++The secondary-boot-reg property is a u32 value that specifies the ++physical address of the register which should hold the common ++entry point for a secondary CPU. This entry is cpu node specific ++and should be added per cpu. E.g., in case of NSP (BCM58625) which ++is a dual core CPU SoC, this entry should be added to cpu1 node. ++ ++ ++Example: ++ cpus { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ enable-method = "brcm,bcm-nsp-smp"; ++ ++ cpu0: cpu@0 { ++ device_type = "cpu"; ++ compatible = "arm,cortex-a9"; ++ next-level-cache = <&L2>; ++ reg = <0>; ++ }; ++ ++ cpu1: cpu@1 { ++ device_type = "cpu"; ++ compatible = "arm,cortex-a9"; ++ next-level-cache = <&L2>; ++ reg = <1>; ++ secondary-boot-reg = <0xffff042c>; ++ }; ++ }; +--- a/Documentation/devicetree/bindings/arm/cpus.txt ++++ b/Documentation/devicetree/bindings/arm/cpus.txt +@@ -190,6 +190,7 @@ nodes to be present and contain the properties described below. + "allwinner,sun6i-a31" + "allwinner,sun8i-a23" + "arm,psci" ++ "brcm,bcm-nsp-smp" + "brcm,brahma-b15" + "marvell,armada-375-smp" + "marvell,armada-380-smp" diff --git a/target/linux/bcm53xx/patches-4.4/081-ARM-BCM5301X-Add-missing-Netgear-R8000-LEDs.patch b/target/linux/bcm53xx/patches-4.4/081-ARM-BCM5301X-Add-missing-Netgear-R8000-LEDs.patch deleted file mode 100644 index 14554a6267..0000000000 --- a/target/linux/bcm53xx/patches-4.4/081-ARM-BCM5301X-Add-missing-Netgear-R8000-LEDs.patch +++ /dev/null @@ -1,56 +0,0 @@ -From 9789f1fd1fd1d0551132778414faf8e2254408c1 Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= -Date: Fri, 30 Oct 2015 15:44:01 +0100 -Subject: [PATCH] ARM: BCM5301X: Add missing Netgear R8000 LEDs -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -Add a bunch of LEDs missing for the Netgear R8000: wireless, wps, 5Ghz radio -and USB LEDs. - -Signed-off-by: Rafał Miłecki -Signed-off-by: Florian Fainelli ---- - arch/arm/boot/dts/bcm4709-netgear-r8000.dts | 30 +++++++++++++++++++++++++++++ - 1 file changed, 30 insertions(+) - ---- a/arch/arm/boot/dts/bcm4709-netgear-r8000.dts -+++ b/arch/arm/boot/dts/bcm4709-netgear-r8000.dts -@@ -50,6 +50,36 @@ - gpios = <&chipcommon 13 GPIO_ACTIVE_LOW>; - linux,default-trigger = "default-off"; - }; -+ -+ wireless { -+ label = "bcm53xx:white:wireless"; -+ gpios = <&chipcommon 14 GPIO_ACTIVE_HIGH>; -+ linux,default-trigger = "default-off"; -+ }; -+ -+ wps { -+ label = "bcm53xx:white:wps"; -+ gpios = <&chipcommon 15 GPIO_ACTIVE_HIGH>; -+ linux,default-trigger = "default-off"; -+ }; -+ -+ 5ghz-2 { -+ label = "bcm53xx:white:5ghz-2"; -+ gpios = <&chipcommon 16 GPIO_ACTIVE_LOW>; -+ linux,default-trigger = "default-off"; -+ }; -+ -+ usb3 { -+ label = "bcm53xx:white:usb3"; -+ gpios = <&chipcommon 17 GPIO_ACTIVE_LOW>; -+ linux,default-trigger = "default-off"; -+ }; -+ -+ usb2 { -+ label = "bcm53xx:white:usb2"; -+ gpios = <&chipcommon 18 GPIO_ACTIVE_LOW>; -+ linux,default-trigger = "default-off"; -+ }; - }; - - gpio-keys { diff --git a/target/linux/bcm53xx/patches-4.4/082-dt-bindings-add-SMP-enable-method-for-Broadcom-NSP.patch b/target/linux/bcm53xx/patches-4.4/082-dt-bindings-add-SMP-enable-method-for-Broadcom-NSP.patch deleted file mode 100644 index ad560261d3..0000000000 --- a/target/linux/bcm53xx/patches-4.4/082-dt-bindings-add-SMP-enable-method-for-Broadcom-NSP.patch +++ /dev/null @@ -1,70 +0,0 @@ -From fa20071c74be69a1d84df85e5d1e72a40a156b89 Mon Sep 17 00:00:00 2001 -From: Kapil Hali -Date: Tue, 1 Dec 2015 11:24:05 -0500 -Subject: [PATCH] dt-bindings: add SMP enable-method for Broadcom NSP - -Add a compatible string "brcm,bcm-nsp-smp" for Broadcom's -Northstar Plus CPU to the 32-bit ARM CPU device tree binding -documentation file and create a new binding documentation for -Northstar Plus CPU. - -Signed-off-by: Kapil Hali -Signed-off-by: Florian Fainelli ---- - .../bindings/arm/bcm/brcm,nsp-cpu-method.txt | 39 ++++++++++++++++++++++ - Documentation/devicetree/bindings/arm/cpus.txt | 1 + - 2 files changed, 40 insertions(+) - create mode 100644 Documentation/devicetree/bindings/arm/bcm/brcm,nsp-cpu-method.txt - ---- /dev/null -+++ b/Documentation/devicetree/bindings/arm/bcm/brcm,nsp-cpu-method.txt -@@ -0,0 +1,39 @@ -+Broadcom Northstar Plus SoC CPU Enable Method -+--------------------------------------------- -+This binding defines the enable method used for starting secondary -+CPUs in the following Broadcom SoCs: -+ BCM58522, BCM58525, BCM58535, BCM58622, BCM58623, BCM58625, BCM88312 -+ -+The enable method is specified by defining the following required -+properties in the "cpus" device tree node: -+ - enable-method = "brcm,bcm-nsp-smp"; -+ - secondary-boot-reg = <...>; -+ -+The secondary-boot-reg property is a u32 value that specifies the -+physical address of the register which should hold the common -+entry point for a secondary CPU. This entry is cpu node specific -+and should be added per cpu. E.g., in case of NSP (BCM58625) which -+is a dual core CPU SoC, this entry should be added to cpu1 node. -+ -+ -+Example: -+ cpus { -+ #address-cells = <1>; -+ #size-cells = <0>; -+ enable-method = "brcm,bcm-nsp-smp"; -+ -+ cpu0: cpu@0 { -+ device_type = "cpu"; -+ compatible = "arm,cortex-a9"; -+ next-level-cache = <&L2>; -+ reg = <0>; -+ }; -+ -+ cpu1: cpu@1 { -+ device_type = "cpu"; -+ compatible = "arm,cortex-a9"; -+ next-level-cache = <&L2>; -+ reg = <1>; -+ secondary-boot-reg = <0xffff042c>; -+ }; -+ }; ---- a/Documentation/devicetree/bindings/arm/cpus.txt -+++ b/Documentation/devicetree/bindings/arm/cpus.txt -@@ -190,6 +190,7 @@ nodes to be present and contain the properties described below. - "allwinner,sun6i-a31" - "allwinner,sun8i-a23" - "arm,psci" -+ "brcm,bcm-nsp-smp" - "brcm,brahma-b15" - "marvell,armada-375-smp" - "marvell,armada-380-smp"