From: Chukun Pan Date: Sat, 18 Nov 2023 15:10:25 +0000 (+0800) Subject: sunxi: add support for Orange Pi Zero 3 X-Git-Url: http://git.lede-project.org./?a=commitdiff_plain;h=29b8ba75fa52d2a9db98521644dfcc61fcd6b6a1;p=openwrt%2Fstaging%2Fthess.git sunxi: add support for Orange Pi Zero 3 Key features: Allwinner H618 SoC (Quad core Cortex-A53) 1/1.5/2/4 GiB LPDDR4 DRAM 1 USB 2.0 type C port (Power + OTG) 1 USB 2.0 host port 1Gbps Ethernet port Micro-HDMI port MicroSD slot Installation: Write the image to SD Card with dd. Signed-off-by: Chukun Pan --- diff --git a/package/boot/uboot-sunxi/Makefile b/package/boot/uboot-sunxi/Makefile index de07dbdec2..112ea47d21 100644 --- a/package/boot/uboot-sunxi/Makefile +++ b/package/boot/uboot-sunxi/Makefile @@ -339,6 +339,15 @@ define U-Boot/orangepi_zero2 ATF:=h616 endef +define U-Boot/orangepi_zero3 + BUILD_SUBTARGET:=cortexa53 + NAME:=Xunlong Orange Pi Zero3 + BUILD_DEVICES:=xunlong_orangepi-zero3 + DEPENDS:=+PACKAGE_u-boot-orangepi_zero3:trusted-firmware-a-sunxi-h616 + UENV:=h616 + ATF:=h616 +endef + define U-Boot/Bananapi_M2_Ultra BUILD_SUBTARGET:=cortexa7 NAME:=Bananapi M2 Ultra @@ -402,6 +411,7 @@ UBOOT_TARGETS := \ orangepi_2 \ orangepi_pc2 \ orangepi_zero2 \ + orangepi_zero3 \ pangolin \ pine64_plus \ Sinovoip_BPI_M3 \ diff --git a/target/linux/sunxi/cortexa53/config-6.1 b/target/linux/sunxi/cortexa53/config-6.1 index 5331352386..55bcd4e8e5 100644 --- a/target/linux/sunxi/cortexa53/config-6.1 +++ b/target/linux/sunxi/cortexa53/config-6.1 @@ -54,6 +54,7 @@ CONFIG_MDIO_BUS_MUX=y CONFIG_MICREL_PHY=y # CONFIG_MITIGATE_SPECTRE_BRANCH_HISTORY is not set CONFIG_MODULES_USE_ELF_RELA=y +CONFIG_MOTORCOMM_PHY=y CONFIG_MUSB_PIO_ONLY=y CONFIG_NEED_SG_DMA_LENGTH=y CONFIG_NOP_USB_XCEIV=y diff --git a/target/linux/sunxi/image/cortexa53.mk b/target/linux/sunxi/image/cortexa53.mk index 80718b34bf..63ada59f85 100644 --- a/target/linux/sunxi/image/cortexa53.mk +++ b/target/linux/sunxi/image/cortexa53.mk @@ -29,6 +29,11 @@ define Device/sun50i-h616 $(Device/sun50i) endef +define Device/sun50i-h618 + SOC := sun50i-h618 + $(Device/sun50i) +endef + define Device/friendlyarm_nanopi-neo-plus2 DEVICE_VENDOR := FriendlyARM DEVICE_MODEL := NanoPi NEO Plus2 @@ -120,6 +125,13 @@ define Device/xunlong_orangepi-zero2 endef TARGET_DEVICES += xunlong_orangepi-zero2 +define Device/xunlong_orangepi-zero3 + DEVICE_VENDOR := Xunlong + DEVICE_MODEL := Orange Pi Zero 3 + $(Device/sun50i-h618) +endef +TARGET_DEVICES += xunlong_orangepi-zero3 + define Device/xunlong_orangepi-zero-plus DEVICE_VENDOR := Xunlong DEVICE_MODEL := Orange Pi Zero Plus diff --git a/target/linux/sunxi/patches-6.1/005-v6.6-arm64-dts-allwinner-h616-Split-Orange-Pi-Zero-2-DT.patch b/target/linux/sunxi/patches-6.1/005-v6.6-arm64-dts-allwinner-h616-Split-Orange-Pi-Zero-2-DT.patch new file mode 100644 index 0000000000..0747e6a8e0 --- /dev/null +++ b/target/linux/sunxi/patches-6.1/005-v6.6-arm64-dts-allwinner-h616-Split-Orange-Pi-Zero-2-DT.patch @@ -0,0 +1,305 @@ +From 322bf103204b8f786547acbeed85569254e7088f Mon Sep 17 00:00:00 2001 +From: Andre Przywara +Date: Fri, 4 Aug 2023 18:08:54 +0100 +Subject: [PATCH] arm64: dts: allwinner: h616: Split Orange Pi Zero 2 DT + +The Orange Pi Zero 2 got a successor (Zero 3), which shares quite some +DT nodes with the Zero 2, but comes with a different PMIC. + +Move the common parts (except the PMIC) into a new shared file, and +include that from the existing board .dts file. + +No functional change, the generated DTB is the same, except for some +phandle numbering differences. + +Signed-off-by: Andre Przywara +Acked-by: Jernej Skrabec +Link: https://lore.kernel.org/r/20230804170856.1237202-2-andre.przywara@arm.com +Signed-off-by: Jernej Skrabec +--- + .../allwinner/sun50i-h616-orangepi-zero.dtsi | 134 ++++++++++++++++++ + .../allwinner/sun50i-h616-orangepi-zero2.dts | 119 +--------------- + 2 files changed, 135 insertions(+), 118 deletions(-) + create mode 100644 arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero.dtsi + +--- /dev/null ++++ b/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero.dtsi +@@ -0,0 +1,134 @@ ++// SPDX-License-Identifier: (GPL-2.0+ or MIT) ++/* ++ * Copyright (C) 2020 Arm Ltd. ++ * ++ * DT nodes common between Orange Pi Zero 2 and Orange Pi Zero 3. ++ * Excludes PMIC nodes and properties, since they are different between the two. ++ */ ++ ++#include "sun50i-h616.dtsi" ++ ++#include ++#include ++#include ++ ++/ { ++ aliases { ++ ethernet0 = &emac0; ++ serial0 = &uart0; ++ }; ++ ++ chosen { ++ stdout-path = "serial0:115200n8"; ++ }; ++ ++ leds { ++ compatible = "gpio-leds"; ++ ++ led-0 { ++ function = LED_FUNCTION_POWER; ++ color = ; ++ gpios = <&pio 2 12 GPIO_ACTIVE_HIGH>; /* PC12 */ ++ default-state = "on"; ++ }; ++ ++ led-1 { ++ function = LED_FUNCTION_STATUS; ++ color = ; ++ gpios = <&pio 2 13 GPIO_ACTIVE_HIGH>; /* PC13 */ ++ }; ++ }; ++ ++ reg_vcc5v: vcc5v { ++ /* board wide 5V supply directly from the USB-C socket */ ++ compatible = "regulator-fixed"; ++ regulator-name = "vcc-5v"; ++ regulator-min-microvolt = <5000000>; ++ regulator-max-microvolt = <5000000>; ++ regulator-always-on; ++ }; ++ ++ reg_usb1_vbus: regulator-usb1-vbus { ++ compatible = "regulator-fixed"; ++ regulator-name = "usb1-vbus"; ++ regulator-min-microvolt = <5000000>; ++ regulator-max-microvolt = <5000000>; ++ vin-supply = <®_vcc5v>; ++ enable-active-high; ++ gpio = <&pio 2 16 GPIO_ACTIVE_HIGH>; /* PC16 */ ++ }; ++}; ++ ++&ehci1 { ++ status = "okay"; ++}; ++ ++/* USB 2 & 3 are on headers only. */ ++ ++&emac0 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&ext_rgmii_pins>; ++ phy-mode = "rgmii"; ++ phy-handle = <&ext_rgmii_phy>; ++ allwinner,rx-delay-ps = <3100>; ++ allwinner,tx-delay-ps = <700>; ++ status = "okay"; ++}; ++ ++&mdio0 { ++ ext_rgmii_phy: ethernet-phy@1 { ++ compatible = "ethernet-phy-ieee802.3-c22"; ++ reg = <1>; ++ }; ++}; ++ ++&mmc0 { ++ cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */ ++ bus-width = <4>; ++ status = "okay"; ++}; ++ ++&ohci1 { ++ status = "okay"; ++}; ++ ++&spi0 { ++ status = "okay"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&spi0_pins>, <&spi0_cs0_pin>; ++ ++ flash@0 { ++ #address-cells = <1>; ++ #size-cells = <1>; ++ compatible = "jedec,spi-nor"; ++ reg = <0>; ++ spi-max-frequency = <40000000>; ++ }; ++}; ++ ++&uart0 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&uart0_ph_pins>; ++ status = "okay"; ++}; ++ ++&usbotg { ++ /* ++ * PHY0 pins are connected to a USB-C socket, but a role switch ++ * is not implemented: both CC pins are pulled to GND. ++ * The VBUS pins power the device, so a fixed peripheral mode ++ * is the best choice. ++ * The board can be powered via GPIOs, in this case port0 *can* ++ * act as a host (with a cable/adapter ignoring CC), as VBUS is ++ * then provided by the GPIOs. Any user of this setup would ++ * need to adjust the DT accordingly: dr_mode set to "host", ++ * enabling OHCI0 and EHCI0. ++ */ ++ dr_mode = "peripheral"; ++ status = "okay"; ++}; ++ ++&usbphy { ++ usb1_vbus-supply = <®_usb1_vbus>; ++ status = "okay"; ++}; +--- a/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero2.dts ++++ b/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero2.dts +@@ -5,95 +5,19 @@ + + /dts-v1/; + +-#include "sun50i-h616.dtsi" +- +-#include +-#include +-#include ++#include "sun50i-h616-orangepi-zero.dtsi" + + / { + model = "OrangePi Zero2"; + compatible = "xunlong,orangepi-zero2", "allwinner,sun50i-h616"; +- +- aliases { +- ethernet0 = &emac0; +- serial0 = &uart0; +- }; +- +- chosen { +- stdout-path = "serial0:115200n8"; +- }; +- +- leds { +- compatible = "gpio-leds"; +- +- led-0 { +- function = LED_FUNCTION_POWER; +- color = ; +- gpios = <&pio 2 12 GPIO_ACTIVE_HIGH>; /* PC12 */ +- default-state = "on"; +- }; +- +- led-1 { +- function = LED_FUNCTION_STATUS; +- color = ; +- gpios = <&pio 2 13 GPIO_ACTIVE_HIGH>; /* PC13 */ +- }; +- }; +- +- reg_vcc5v: vcc5v { +- /* board wide 5V supply directly from the USB-C socket */ +- compatible = "regulator-fixed"; +- regulator-name = "vcc-5v"; +- regulator-min-microvolt = <5000000>; +- regulator-max-microvolt = <5000000>; +- regulator-always-on; +- }; +- +- reg_usb1_vbus: regulator-usb1-vbus { +- compatible = "regulator-fixed"; +- regulator-name = "usb1-vbus"; +- regulator-min-microvolt = <5000000>; +- regulator-max-microvolt = <5000000>; +- vin-supply = <®_vcc5v>; +- enable-active-high; +- gpio = <&pio 2 16 GPIO_ACTIVE_HIGH>; /* PC16 */ +- }; +-}; +- +-&ehci1 { +- status = "okay"; + }; + +-/* USB 2 & 3 are on headers only. */ +- + &emac0 { +- pinctrl-names = "default"; +- pinctrl-0 = <&ext_rgmii_pins>; +- phy-mode = "rgmii"; +- phy-handle = <&ext_rgmii_phy>; + phy-supply = <®_dcdce>; +- allwinner,rx-delay-ps = <3100>; +- allwinner,tx-delay-ps = <700>; +- status = "okay"; +-}; +- +-&mdio0 { +- ext_rgmii_phy: ethernet-phy@1 { +- compatible = "ethernet-phy-ieee802.3-c22"; +- reg = <1>; +- }; + }; + + &mmc0 { + vmmc-supply = <®_dcdce>; +- cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */ +- bus-width = <4>; +- status = "okay"; +-}; +- +-&ohci1 { +- status = "okay"; + }; + + &r_rsb { +@@ -211,44 +135,3 @@ + vcc-ph-supply = <®_aldo1>; + vcc-pi-supply = <®_aldo1>; + }; +- +-&spi0 { +- status = "okay"; +- pinctrl-names = "default"; +- pinctrl-0 = <&spi0_pins>, <&spi0_cs0_pin>; +- +- flash@0 { +- #address-cells = <1>; +- #size-cells = <1>; +- compatible = "jedec,spi-nor"; +- reg = <0>; +- spi-max-frequency = <40000000>; +- }; +-}; +- +-&uart0 { +- pinctrl-names = "default"; +- pinctrl-0 = <&uart0_ph_pins>; +- status = "okay"; +-}; +- +-&usbotg { +- /* +- * PHY0 pins are connected to a USB-C socket, but a role switch +- * is not implemented: both CC pins are pulled to GND. +- * The VBUS pins power the device, so a fixed peripheral mode +- * is the best choice. +- * The board can be powered via GPIOs, in this case port0 *can* +- * act as a host (with a cable/adapter ignoring CC), as VBUS is +- * then provided by the GPIOs. Any user of this setup would +- * need to adjust the DT accordingly: dr_mode set to "host", +- * enabling OHCI0 and EHCI0. +- */ +- dr_mode = "peripheral"; +- status = "okay"; +-}; +- +-&usbphy { +- usb1_vbus-supply = <®_usb1_vbus>; +- status = "okay"; +-}; diff --git a/target/linux/sunxi/patches-6.1/006-v6.6-arm64-dts-allwinner-h616-Add-OrangePi-Zero-3-board.patch b/target/linux/sunxi/patches-6.1/006-v6.6-arm64-dts-allwinner-h616-Add-OrangePi-Zero-3-board.patch new file mode 100644 index 0000000000..4081a82d52 --- /dev/null +++ b/target/linux/sunxi/patches-6.1/006-v6.6-arm64-dts-allwinner-h616-Add-OrangePi-Zero-3-board.patch @@ -0,0 +1,140 @@ +From f1b3ddb3ecc2eec1f912383e01156c226daacfab Mon Sep 17 00:00:00 2001 +From: Andre Przywara +Date: Fri, 4 Aug 2023 18:08:56 +0100 +Subject: [PATCH] arm64: dts: allwinner: h616: Add OrangePi Zero 3 board + support + +The OrangePi Zero 3 is a development board based on the Allwinner H618 SoC, +which seems to be just an H616 with more L2 cache. The board itself is a +slightly updated version of the Orange Pi Zero 2. It features: +- Four ARM Cortex-A53 cores, Mali-G31 MP2 GPU +- 1/1.5/2/4 GiB LPDDR4 DRAM SKUs (only up to 1GB on the Zero2) +- AXP313a PMIC (more capable AXP305 on the Zero2) +- Raspberry-Pi-1 compatible GPIO header +- extra 13 pin expansion header, exposing pins for 2x USB 2.0 ports +- 1 USB 2.0 host port +- 1 USB 2.0 type C port (power supply + OTG) +- MicroSD slot +- on-board 16MiB bootable SPI NOR flash (only 2MB on the Zero2) +- 1Gbps Ethernet port (via Motorcomm YT8531 PHY) (RTL8211 on the Zero2) +- micro-HDMI port +- (yet) unsupported Allwinner WiFi/BT chip + +Add the devicetree file describing the currently supported features, +namely LEDs, SD card, PMIC, SPI flash, USB. Ethernet seems unstable at +the moment, though the basic functionality works. + +Signed-off-by: Andre Przywara +Reviewed-by: Jernej Skrabec +Link: https://lore.kernel.org/r/20230804170856.1237202-4-andre.przywara@arm.com +Signed-off-by: Jernej Skrabec +--- + arch/arm64/boot/dts/allwinner/Makefile | 1 + + .../allwinner/sun50i-h618-orangepi-zero3.dts | 94 +++++++++++++++++++ + 2 files changed, 95 insertions(+) + create mode 100644 arch/arm64/boot/dts/allwinner/sun50i-h618-orangepi-zero3.dts + +--- a/arch/arm64/boot/dts/allwinner/Makefile ++++ b/arch/arm64/boot/dts/allwinner/Makefile +@@ -40,3 +40,4 @@ dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h6-ta + dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h6-tanix-tx6-mini.dtb + dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h616-orangepi-zero2.dtb + dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h616-x96-mate.dtb ++dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h618-orangepi-zero3.dtb +--- /dev/null ++++ b/arch/arm64/boot/dts/allwinner/sun50i-h618-orangepi-zero3.dts +@@ -0,0 +1,94 @@ ++// SPDX-License-Identifier: (GPL-2.0+ or MIT) ++/* ++ * Copyright (C) 2023 Arm Ltd. ++ */ ++ ++/dts-v1/; ++ ++#include "sun50i-h616-orangepi-zero.dtsi" ++ ++/ { ++ model = "OrangePi Zero3"; ++ compatible = "xunlong,orangepi-zero3", "allwinner,sun50i-h618"; ++}; ++ ++&emac0 { ++ phy-supply = <®_dldo1>; ++}; ++ ++&ext_rgmii_phy { ++ motorcomm,clk-out-frequency-hz = <125000000>; ++}; ++ ++&mmc0 { ++ /* ++ * The schematic shows the card detect pin wired up to PF6, via an ++ * inverter, but it just doesn't work. ++ */ ++ broken-cd; ++ vmmc-supply = <®_dldo1>; ++}; ++ ++&r_i2c { ++ status = "okay"; ++ ++ axp313: pmic@36 { ++ compatible = "x-powers,axp313a"; ++ reg = <0x36>; ++ #interrupt-cells = <1>; ++ interrupt-controller; ++ interrupt-parent = <&pio>; ++ interrupts = <2 9 IRQ_TYPE_LEVEL_LOW>; /* PC9 */ ++ ++ vin1-supply = <®_vcc5v>; ++ vin2-supply = <®_vcc5v>; ++ vin3-supply = <®_vcc5v>; ++ ++ regulators { ++ /* Supplies VCC-PLL, so needs to be always on. */ ++ reg_aldo1: aldo1 { ++ regulator-always-on; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ regulator-name = "vcc1v8"; ++ }; ++ ++ /* Supplies VCC-IO, so needs to be always on. */ ++ reg_dldo1: dldo1 { ++ regulator-always-on; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ regulator-name = "vcc3v3"; ++ }; ++ ++ reg_dcdc1: dcdc1 { ++ regulator-always-on; ++ regulator-min-microvolt = <810000>; ++ regulator-max-microvolt = <990000>; ++ regulator-name = "vdd-gpu-sys"; ++ }; ++ ++ reg_dcdc2: dcdc2 { ++ regulator-always-on; ++ regulator-min-microvolt = <810000>; ++ regulator-max-microvolt = <1100000>; ++ regulator-name = "vdd-cpu"; ++ }; ++ ++ reg_dcdc3: dcdc3 { ++ regulator-always-on; ++ regulator-min-microvolt = <1100000>; ++ regulator-max-microvolt = <1100000>; ++ regulator-name = "vdd-dram"; ++ }; ++ }; ++ }; ++}; ++ ++&pio { ++ vcc-pc-supply = <®_dldo1>; ++ vcc-pf-supply = <®_dldo1>; ++ vcc-pg-supply = <®_aldo1>; ++ vcc-ph-supply = <®_dldo1>; ++ vcc-pi-supply = <®_dldo1>; ++}; diff --git a/target/linux/sunxi/patches-6.1/007-v6.7-arm64-dts-allwinner-h616-update-emac-for-Orange-Pi.patch b/target/linux/sunxi/patches-6.1/007-v6.7-arm64-dts-allwinner-h616-update-emac-for-Orange-Pi.patch new file mode 100644 index 0000000000..a492eed551 --- /dev/null +++ b/target/linux/sunxi/patches-6.1/007-v6.7-arm64-dts-allwinner-h616-update-emac-for-Orange-Pi.patch @@ -0,0 +1,57 @@ +From b9622937d95809ef89904583191571a9fa326402 Mon Sep 17 00:00:00 2001 +From: Chukun Pan +Date: Sun, 29 Oct 2023 15:40:09 +0800 +Subject: [PATCH] arm64: dts: allwinner: h616: update emac for Orange Pi Zero 3 + +The current emac setting is not suitable for Orange Pi Zero 3, +move it back to Orange Pi Zero 2 DT. Also update phy mode and +delay values for emac on Orange Pi Zero 3. +With these changes, Ethernet now looks stable. + +Fixes: 322bf103204b ("arm64: dts: allwinner: h616: Split Orange Pi Zero 2 DT") +Signed-off-by: Chukun Pan +Reviewed-by: Jernej Skrabec +Link: https://lore.kernel.org/r/20231029074009.7820-2-amadeus@jmu.edu.cn +Signed-off-by: Jernej Skrabec +--- + arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero.dtsi | 3 --- + arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero2.dts | 3 +++ + arch/arm64/boot/dts/allwinner/sun50i-h618-orangepi-zero3.dts | 2 ++ + 3 files changed, 5 insertions(+), 3 deletions(-) + +--- a/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero.dtsi ++++ b/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero.dtsi +@@ -68,10 +68,7 @@ + &emac0 { + pinctrl-names = "default"; + pinctrl-0 = <&ext_rgmii_pins>; +- phy-mode = "rgmii"; + phy-handle = <&ext_rgmii_phy>; +- allwinner,rx-delay-ps = <3100>; +- allwinner,tx-delay-ps = <700>; + status = "okay"; + }; + +--- a/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero2.dts ++++ b/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero2.dts +@@ -13,6 +13,9 @@ + }; + + &emac0 { ++ allwinner,rx-delay-ps = <3100>; ++ allwinner,tx-delay-ps = <700>; ++ phy-mode = "rgmii"; + phy-supply = <®_dcdce>; + }; + +--- a/arch/arm64/boot/dts/allwinner/sun50i-h618-orangepi-zero3.dts ++++ b/arch/arm64/boot/dts/allwinner/sun50i-h618-orangepi-zero3.dts +@@ -13,6 +13,8 @@ + }; + + &emac0 { ++ allwinner,tx-delay-ps = <700>; ++ phy-mode = "rgmii-rxid"; + phy-supply = <®_dldo1>; + }; +