From: Felix Fietkau <nbd@openwrt.org>
Date: Tue, 24 Mar 2009 23:41:29 +0000 (+0000)
Subject: atheros: fix a spiflash write performance regression
X-Git-Url: http://git.lede-project.org./?a=commitdiff_plain;h=28b9fea4e759470fd3e1f285b228b7101b15b18b;p=openwrt%2Fstaging%2Flinusw.git

atheros: fix a spiflash write performance regression

SVN-Revision: 15027
---

diff --git a/target/linux/atheros/patches-2.6.28/120-spiflash.patch b/target/linux/atheros/patches-2.6.28/120-spiflash.patch
index e661365066..e33733ecfb 100644
--- a/target/linux/atheros/patches-2.6.28/120-spiflash.patch
+++ b/target/linux/atheros/patches-2.6.28/120-spiflash.patch
@@ -288,10 +288,10 @@
 +}
 +
 +static void
-+spiflash_wait_complete(struct spiflash_priv *priv)
++spiflash_wait_complete(struct spiflash_priv *priv, unsigned int timeout)
 +{
 +	busy_wait(priv, spiflash_sendcmd(priv, SPI_RD_STATUS, 0) &
-+		SPI_STATUS_WIP, 20);
++		SPI_STATUS_WIP, timeout);
 +	spiflash_done(priv);
 +}
 +
@@ -321,7 +321,7 @@
 +	reg |= op->tx_cnt | SPI_CTL_START;
 +	spiflash_write_reg(priv, SPI_FLASH_CTL, reg);
 +
-+	spiflash_wait_complete(priv);
++	spiflash_wait_complete(priv, 20);
 +
 +	instr->state = MTD_ERASE_DONE;
 +	if (instr->callback)
@@ -418,7 +418,7 @@
 +		reg |= (read_len + 4) | SPI_CTL_START;
 +		spiflash_write_reg(priv, SPI_FLASH_CTL, reg);
 +
-+		spiflash_wait_complete(priv);
++		spiflash_wait_complete(priv, 1);
 +
 +		bytes_left -= read_len;
 +		to += read_len;