From: Rodrigo Balerdi Date: Sat, 9 Apr 2022 21:26:17 +0000 (-0300) Subject: ipq806x: fix USB bug in 5.10 dtsi additions X-Git-Tag: v23.05.0-rc1~3611 X-Git-Url: http://git.lede-project.org./?a=commitdiff_plain;h=284f2c2ae0e569660effa61c9f8d0f6459a2ae19;p=openwrt%2Fstaging%2Fhauke.git ipq806x: fix USB bug in 5.10 dtsi additions The existing device tree has incorrect definitions for usb3_0 and usb3_1 and the blocks they depend upon: their addresses and interrupts are swapped. However, their clocks and resets are not. The result is that the USB blocks are non-functional if only one of them is enabled. This fix backports the definitions from mainline Linux 5.15 to OpenWrt's 5.10 dtsi additions. See the relevant mainline code here: https://github.com/torvalds/linux/blob/v5.17/arch/arm/boot/dts/qcom-ipq8064.dtsi#L1062-L1148 This fix does not break existing ports. But some ports may have enabled both USB blocks even thought their board only implements one, because enabling a single USB block would not have worked before this fix. This means that revisiting all ports of ipq806x devices that implement a single USB port is advised. This work must be done by maintainers that can determine which USB block corresponds to the implemented port on their hardware. Note that this fix swaps the names of the hardware ports. This is unfortunate, but will happen anyway when switching to kernel 5.15. Thus, it is best to do this ASAP, before users get to depend on port names. It is strongly recommended that this fix is backported to 22.03 before its release. This will minimize the number of users affected by the port name swap. Signed-off-by: Rodrigo Balerdi --- diff --git a/target/linux/ipq806x/patches-5.10/083-ipq8064-dtsi-additions.patch b/target/linux/ipq806x/patches-5.10/083-ipq8064-dtsi-additions.patch index e74e6ad55d..a1a97ae941 100644 --- a/target/linux/ipq806x/patches-5.10/083-ipq8064-dtsi-additions.patch +++ b/target/linux/ipq806x/patches-5.10/083-ipq8064-dtsi-additions.patch @@ -681,7 +681,7 @@ + + hs_phy_0: hs_phy_0 { + compatible = "qcom,ipq806x-usb-phy-hs"; -+ reg = <0x110f8800 0x30>; ++ reg = <0x100f8800 0x30>; + clocks = <&gcc USB30_0_UTMI_CLK>; + clock-names = "ref"; + #phy-cells = <0>; @@ -689,17 +689,17 @@ + + ss_phy_0: ss_phy_0 { + compatible = "qcom,ipq806x-usb-phy-ss"; -+ reg = <0x110f8830 0x30>; ++ reg = <0x100f8830 0x30>; + clocks = <&gcc USB30_0_MASTER_CLK>; + clock-names = "ref"; + #phy-cells = <0>; + }; + -+ usb3_0: usb3@110f8800 { ++ usb3_0: usb3@100f8800 { + compatible = "qcom,dwc3", "syscon"; + #address-cells = <1>; + #size-cells = <1>; -+ reg = <0x110f8800 0x8000>; ++ reg = <0x100f8800 0x8000>; + clocks = <&gcc USB30_0_MASTER_CLK>; + clock-names = "core"; + @@ -710,10 +710,10 @@ + + status = "disabled"; + -+ dwc3_0: dwc3@11000000 { ++ dwc3_0: dwc3@10000000 { + compatible = "snps,dwc3"; -+ reg = <0x11000000 0xcd00>; -+ interrupts = ; ++ reg = <0x10000000 0xcd00>; ++ interrupts = ; + phys = <&hs_phy_0>, <&ss_phy_0>; + phy-names = "usb2-phy", "usb3-phy"; + dr_mode = "host"; @@ -723,7 +723,7 @@ + + hs_phy_1: hs_phy_1 { + compatible = "qcom,ipq806x-usb-phy-hs"; -+ reg = <0x100f8800 0x30>; ++ reg = <0x110f8800 0x30>; + clocks = <&gcc USB30_1_UTMI_CLK>; + clock-names = "ref"; + #phy-cells = <0>; @@ -731,17 +731,17 @@ + + ss_phy_1: ss_phy_1 { + compatible = "qcom,ipq806x-usb-phy-ss"; -+ reg = <0x100f8830 0x30>; ++ reg = <0x110f8830 0x30>; + clocks = <&gcc USB30_1_MASTER_CLK>; + clock-names = "ref"; + #phy-cells = <0>; + }; + -+ usb3_1: usb3@100f8800 { ++ usb3_1: usb3@110f8800 { + compatible = "qcom,dwc3", "syscon"; + #address-cells = <1>; + #size-cells = <1>; -+ reg = <0x100f8800 0x8000>; ++ reg = <0x110f8800 0x8000>; + clocks = <&gcc USB30_1_MASTER_CLK>; + clock-names = "core"; + @@ -752,10 +752,10 @@ + + status = "disabled"; + -+ dwc3_1: dwc3@10000000 { ++ dwc3_1: dwc3@11000000 { + compatible = "snps,dwc3"; -+ reg = <0x10000000 0xcd00>; -+ interrupts = ; ++ reg = <0x11000000 0xcd00>; ++ interrupts = ; + phys = <&hs_phy_1>, <&ss_phy_1>; + phy-names = "usb2-phy", "usb3-phy"; + dr_mode = "host";