From: Aya Mahfouz <mahfouz.saif.elyazal@gmail.com>
Date: Thu, 26 Feb 2015 09:29:04 +0000 (+0200)
Subject: staging: rtl8723au: rewrite the right hand side of an assignment
X-Git-Url: http://git.lede-project.org./?a=commitdiff_plain;h=26aab2b14cfef377e8a339348d8c5057bcba30e8;p=openwrt%2Fstaging%2Fblogic.git

staging: rtl8723au: rewrite the right hand side of an assignment

This patch rewrites the right hand side of an assignment for
expressions of the form:
a = (a <op> b);
to be:
a <op>= b;
where <op> = << | >>.

This issue was detected and resolved using the following
coccinelle script:

@@
identifier i;
expression e;
@@

-i = (i >> e);
+i >>= e;

@@
identifier i;
expression e;
@@

-i = (i << e);
+i <<= e;

Signed-off-by: Aya Mahfouz <mahfouz.saif.elyazal@gmail.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---

diff --git a/drivers/staging/rtl8723au/hal/hal_com.c b/drivers/staging/rtl8723au/hal/hal_com.c
index a7751c9aecad..c9bb3e1ff0e8 100644
--- a/drivers/staging/rtl8723au/hal/hal_com.c
+++ b/drivers/staging/rtl8723au/hal/hal_com.c
@@ -231,7 +231,7 @@ void HalSetBrateCfg23a(struct rtw_adapter *padapter, u8 *mBratesOS)
 	rate_index = 0;
 	/*  Set RTS initial rate */
 	while (brate_cfg > 0x1) {
-		brate_cfg = (brate_cfg >> 1);
+		brate_cfg >>= 1;
 		rate_index++;
 	}
 		/*  Ziv - Check */